Neuromorphic chip simulator

Abstract

The invention proposes a neuromorphic chip simulator. The simulator comprises a plurality of processing cores and a plurality of routers. Each processing core comprises an input buffer area, a processing module, a dendritic calculation unit, a cell body calculation unit and an output buffer area. The dendritic calculation unit comprises a memory array and N simulated neurons; each simulated neuron comprises M axon inputs; and the dendritic calculation unit performs multiplication on the axon input of each position on each simulated neuron and a synaptic weight of a corresponding position, accumulates multiplication results, and combines accumulated results obtained by all the simulated neurons as output data of the dendritic calculation unit. The cell body calculation unit comprises N simulated neurons; each simulated neuron performs accumulation on a result obtained by multiplication and addition in the dendritic calculation unit and a numerical value accumulated by the previous simulated neuron; and pulses are generated when an accumulated numerical value exceeds a preset threshold. The output buffer area stores pulse-containing data packets. According to the simulator, the quality and efficiency of a neuromorphic chip design process can be ensured and designers can design neuromorphic chips with higher quality more quickly.

Description

technical field [0001] The invention relates to the technical field of neuromorphic chips, in particular to a neuromorphic chip simulator. Background technique [0002] Compared with the traditional von Neumann computer, the brain has the characteristics of ultra-low power consumption and high fault tolerance. It has significant advantages in processing unstructured information and intelligence. With the development of brain science, it has become an emerging development direction to construct new computing systems by drawing on the computing models of the brain. [0003] The basic unit of the brain is neurons, which are connected to each other through synapses and communicate by sending and receiving action potentials (called spikes). Each neuron is usually connected with 100 to 10,000 synapses, and a large number of neurons are connected to each other through synapses to form a complex neural network. [0004] Simulating neuromorphic networks is a very important and effe...

AI Technical Summary

Problems solved by technology

The disadvantage of this solution is that Compass is a behavioral simulator, which can verify the chip functionally, but cannot provide specific information at the structural level, such as operating performance and power consumption.

[0018] In addition, neuromorphic chips and their applications have a feature that existing traditional processor chips (and their applications) do not have, that is, the same neural network application can be converted into a neural network application under different hardware constraints through certain software methods. Different neural networks (mainly reflected in the connectivity of neurons and the bit width representation of synaptic weights) perform the same function at the same time, but the accuracy will be different

Therefore, this gives new requirements for software simulation (i.e., flexible configuration to simulate different neuron connectivity and bit-width representation of synaptic weights) and new co-design exploration space (the relationship between error and hardware overhead, simulation performance, etc.) relationship), and the current related technologies obviously cannot meet the above requirements

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