Internal pulse storage neural network based on current integration

Abstract

The invention provides an in-memory pulse neural network based on current integration. Calculation based on a charge domain is naturally compatible with a working mechanism of neurons. In one aspect, in order to avoid non-ideality of employing NVM materials, memory cells of a synaptic array in an architecture employ silicon-based SRAM cells. In addition, the modified NVM unit can benefit from the architecture of the built-in pulse neural network designed by the invention. When the synaptic array adopts an SRAM (Static Random Access Memory) unit as a storage unit, the design of a post-neuron circuit corresponds to the SRAM unit, so that the SNN architecture in the storage can be used for calculating a multi-bit synaptic weight, and the combined column number is programmable. Further, in order to improve the use efficiency of the area and save energy efficiency, in the calculation of the multi-bit synaptic weight, the circuit is designed to be in a time multiplexing form of resource sharing. Finally, an automatic calibration circuit is provided to counteract the change of the conduction current caused by factors such as process, voltage, temperature (PVT) and the like, so that the calculation result is more accurate.

Description

technical field [0001] The present application belongs to the field of neural networks, and more specifically, relates to an in-memory pulse neural network based on current integration. Background technique [0002] Inspired by biological neural networks, neuromorphic computing, or more specifically, Spiking Neural Networks (SNNs), is considered a promising future evolution of the currently popular artificial neural networks. SNN uses pulses to communicate between arbitrarily connected pairs of neurons (mostly unidirectional), and neurons in SNN are active only when they receive or send out pulse signals. If the sparsity of pulse activity can be guaranteed , this unique event-driven feature may bring about significant energy savings. Industry and academia have been enthusiastically studying the circuits and architectures of SNNs. Some recent representative examples, such as IBM's TrueNorth, use complementary metal oxide semiconductor (Complementary Metal Oxide Semiconducto...

AI Technical Summary

Problems solved by technology

[0005] In the prior art, units such as SRAM have been applied to intersecting synaptic arrays. For example, Chinese patent CN111010162A mentions that the units in the intersecting array can be SRAM units, CN109165730A mentions that 6T SRAM can be used, and CN103189880B mentions that the synaptic devices included The memory unit can be SRAM, but there is no further design of the SNN architecture of in-SRAM and the signal transmission between the synapse array and the neuron circuit after using the SRAM unit

Images