Neuromorphic processing devices

A processing device and neuromorphic technology, applied in neural architecture, biological neural network model, physical realization, etc.

Active Publication Date: 2018-01-19
IBM CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

While scalable and efficient memory synapses have been explained, the concrete realization of actual artifici

Method used

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  • Neuromorphic processing devices
  • Neuromorphic processing devices
  • Neuromorphic processing devices

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Embodiment Construction

[0019] figure 1 A neuromorphic processing device 1 embodying the invention is shown having a device input 2 for receiving an input data signal to be processed. The device 1 comprises a collection 3 of neuronal circuits, also referred to herein by analogy with biological systems as a "population" of neurons. As indicated by the dashed box in the figure, an assembly 3 may generally comprise a single population of neurons or multiple component populations or "sub-aggregations", as discussed further below. The input signal generator 4 is connected to the device input 2 and the set 3 of neuron circuits. In operation, the input signal generator 4 is operable to generate a neuron input signal for the set of neurons 3 from the input data signal. The device output circuit 5 is connected to the set of neurons 3 for receiving neuron output signals from the neuron circuits of the set. In operation, the device output circuit 5 is operable to generate a device output signal from the aggr...

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Abstract

A neuromorphic processing device (1) has a device input (2), for receiving an input data signal, and an assemblage of neuron circuits (3). Each neuron circuit (3) comprises a resistive memory cell (14) which is arranged to store a neuron state, indicated by cell resistance, and to receive neuron input signals (11) for programming cell resistance to vary the neuron state, and a neuron output circuit (15) for supplying a neuron output signals (12) in response to cell resistance traversing a threshold. The device (1) includes an input signal generator (4) connected to the device input (2) and theassemblage of neuron circuits (3), for generating neuron input signals (11) for the assemblage in dependence on the input data signal. The device (1) further includes a device output circuit (5), connected to neuron output circuits (15) of the assemblage, for producing a device output signal dependent on neuron output signals (12) of the assemblage, whereby the processing device (1) exploits stochasticity of resistive memory cells of the assemblage.

Description

Background technique [0001] The present invention relates generally to neuromorphic processing devices, and more particularly, to such devices employing resistive memory cell-based neuronal circuit ensembles. [0002] Neuromorphic technologies involve computing systems inspired by the biological architecture of the nervous system. Traditional computing models based on CMOS logic and von Neumann architecture are becoming increasingly inadequate to meet the expanded processing demands of modern computer systems. It is also very inefficient in terms of power consumption and space requirements compared to biological systems. These problems have prompted a considerable amount of research work to understand the efficient computational patterns of the human brain and to create artificial cognitive systems with unprecedented computational capabilities. [0003] Neurons, along with synapses, are the basic units of computation in the brain. A neuron can integrate the input signal it ...

Claims

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Application Information

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IPC IPC(8): G06N3/04
CPCG06N3/049G06N3/065
Inventor E.S.埃莱夫特里乌M.勒加洛A.潘塔齐A.塞巴斯蒂安T.图马
Owner IBM CORP
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