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889results about How to "Reduce chip area" patented technology

Semiconductor device and method for fabricating such device

InactiveUS6911694B2Stable operational characteristicAvoid layeringTransistorSolid-state devicesLDMOSGate dielectric
An LDMOS transistor and a bipolar transistor with LDMOS structures are disclosed for suitable use in high withstand voltage device applications, among others. The LDMOS transistor includes a drain well region 21 formed in P-type substrate 1, and also formed therein spatially separated one another are a channel well region 23 and a medium concentration drain region 24 having an impurity concentration larger than that of drain well region 21, which are simultaneously formed having a large diffusion depth through thermal processing. A source 11s is formed in channel well region 23, while a drain 11d is formed in drain region 24 having an impurity concentration larger than that of drain region 24. In addition, a gate electrode 11g is formed over the well region, overlying the partially overlapped portions with well region 23 and drain region 24 and being separated from drain 11d. Since the source 11s, well region 23, and drain region 24 are respectively self-aligned to the gate electrode 11g, resultant transistor characteristics are stabilized, and the decrease in the on resistance and improved drain threshold voltages can be achieved. Also disclosed herein are bipolar transistors with LDMOS structures, which are capable of obviating the breakdown of gate dielectric layers even at high applied voltage and achieving improved stability in transistor characteristics.
Owner:RICOH KK

Miniature MEMS switching line phase shifter

ActiveCN101202369ALow insertion loss performanceReduce chip areaWaveguide type devicesAntennasHigh resistanceEngineering
The invention provides a miniaturized MEMS switch-line phase shifter, comprising an MEMS switch, a reference phase shifting transmission line, a phase delay transmission line, a switch offset line, a back surface grounding layer, a medium liner, a microwave grounding terminal, and a micro-mechanical through hole. The invention has the advantages of keeping low insertion loss of a transmission passage and reducing the chip area of a large phase shifting unit bit transmission line of the phase shifter by distribution-typed elements with high resistance and a phase delay transmission network formed by the microwave grounding of a collecting element and the micro-mechanical through hole, reducing the chip area of a small phase shifting unit bit delay line of the phase shifter, reducing the area of the chip, minimizing the chip area occupied by the MEME switch by selecting miniaturized MEMS switches such as a built-in cantilever MEMS switch, keeping the broad band performance of the MEMS switch and the phase shifter and minimizing the chip area occupied by the MEMS switch offset circuit by separating a microwave signal from a switch driving signal, and leading to simple and convenient design of microwave grounding of the chip and reducing the area of the chip to the most extent by the micro-mechanical through hole technology.
Owner:NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD

A novel trench structure power mosfet device and its manufacturing method

The invention relates to a power MOSFET (Metal-Oxide -Semiconductor Field Effect Transistor) device of a novel groove structure and a manufacture method thereof. The unit cell of the element zone of the power MOSFET device adopts groove structure; an insulating oxide layer is arranged in the unit cell groove; the thickness of a second isolated gate oxide layer in the unit cell groove is more thanthe thickness of a first isolated gate oxide layer; conductive polysilicon is deposited in the cell unit groove; the extending distance of the first conductive polysilicon is more than the extending distance of the second conductive polysilicon in the unit cell groove; the groove mouth of the unit cell groove is covered by an insulating medium layer; a source electrode contact hole is filled withsecond contract hole filling metal; the second contract hole filling metal, a first conductive type filling zone and a second conductive type layer are in ohmic contact; source electrode metal is arranged above the unit cell groove; the source electrode metal and the second contact hole filling metal are electrically connected; and the first conductive polysilicon, the source electrode metal and the like are in potential connection. The power MOSFET device has the advantages of low conduction resistance, small grid leak electric charge Qgd, low switching speed, low switching loss, simple technology and low cost.
Owner:WUXI NCE POWER
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