1166 results about "Multi port" patented technology

Semiconductor devices, packaging architectures and associated methods are disclosed. In one embodiment, a multi-chip module (MCM) is disclosed. The MCM includes a package substrate and an interposer disposed on a portion of the package substrate. A first integrated circuit (IC) chip is disposed on the interposer. A first memory device is disposed on the interposer and includes a first port interface including an interposer-compliant mechanical interface for coupling to the first IC chip via a first set of traces formed in the interposer. A second port interface includes a non-interposer-compliant mechanical interface for coupling to an off-interposer device. Transactions between the first IC chip and the off-interposer device pass through the first port interface and the second port interface of the first memory device.

The invention relates to the technical field of computer network communication, and relates to a reconfigurable router architecture based on buffer sharing and a dynamic routing method. The router architecture comprises a demultiplexer used for distributing data packets to centralized buffer areas of other ports according to port load states; the virtual channel distribution module is configured to determine an output port of the data packet according to a routing algorithm and generate a corresponding virtual channel ID; the centralized buffer area supports multi-port sharing and is divided into a plurality of logic sub-channels according to virtual channel IDs, and each sub-channel manages a data packet queue through a head pointer and a tail pointer; the credit management module is used for monitoring the idle capacity of the centralized buffer area and transmitting congestion information through a reserved bit of a data packet; and the congestion register dynamically records the congestion state of the neighbor node through the congestion information table. According to the invention, the problems of unbalanced load, low utilization rate of a buffer area and high congestion control cost of a traditional router are solved.

The invention provides a method and device for realizing cache sharing among lossless network ports, and the method comprises the steps: dividing a receiving side total cache space into a port private space and a multi-port shared space, and setting an upper limit value of the shared space which can be used by each port; based on the port private space residual value and the corrected shared subspace residual value, calculating a credit value representing the corrected total residual space of the port of the side, and feeding back the credit value to the sending side; initiating data message transmission when the sending side equipment meets a preset message sending condition based on the credit value; when the port of the receiving side receives the data message, retransmission verification is carried out, whether the residual cache space is sufficient or not is judged, the message is stored or discarded, an ACK / NAK / CNAK response is triggered, and the response is sent to the sending side equipment; and when the sending side equipment receives the response, analyzing the message serial number in the response and executing retransmission operation or releasing the message retransmission cache space. According to the scheme, the cache utilization rate is increased.

The embodiment of the invention discloses a battery equalization management method and device based on port multiplexing. The method comprises the following steps: calculating a state-of-charge value of each single battery according to a sampling value of an electrical basic physical quantity; calculating a difference value between the state-of-charge value of each single battery and an average state-of-charge value of the battery pack to which the single battery belongs; determining the single batteries of which the difference values exceed a preset equalization threshold value as unbalanced batteries; and formulating an equalization sequence of the unbalanced batteries, and conducting the selection switch and the multiplexing switch according to the equalization sequence, so that the unbalanced batteries are connected with a primary side port of the multi-port converter for energy adjustment. According to the embodiment of the invention, the hardware complexity and the system cost are reduced by greatly reducing the usage amount of switch components. Meanwhile, the framework also improves the equalization efficiency and flexibility of the retired battery pack.

A power converter configured to be connected to three or more voltage parts, includes three or more power-conversion circuitries to be connected to respective ones of the three or more voltage parts, and a multi-port transformer connected to the three or more power-conversion circuitries at respectively different ports. The three or more voltage parts include a vehicle drive battery and a plurality of alternating-current (AC) voltage parts. Each of the plurality of AC voltage parts is configured to provide at least one of power input to a multi-port transformer side and power output from the multi-port transformer side.

A modular multiport converter system includes a plurality of distributed controllers, associated with different ports of the system that are able to synchronize to ensure that power drawn from the system is equal to power supplied to the system with precise timing. The distributed controllers are able to receive a clock signal from a leader controller, or from a vice leader controller in the event that leader controller is unable to function.

Semiconductor devices, packaging architectures and associated methods are disclosed. In one embodiment, a chiplet-based multi-chip module (MCM) is disclosed. The chiplet-based MCM includes a package substrate and a first processing integrated circuit (IC) chiplet disposed on the package substrate. A second processing IC chiplet is disposed on the package substrate. At least one first row multi-port memory chiplet is disposed on the package substrate and coupled between the first processing IC chiplet and the second IC processing chiplet. Data transfers between the first processing IC chiplet and a destination IC chiplet are routed through the at least one first row multi-port memory chiplet.

Semiconductor devices, packaging architectures and associated methods are disclosed. In one embodiment, a multi-chip module (MCM) is disclosed. The MCM includes a common substrate and a first integrated circuit (IC) chip disposed on the common substrate. The first IC chip includes a first memory interface. A second IC chip is disposed on the common substrate and includes a second memory interface. A first memory device is disposed on the common substrate and includes memory and a first port coupled to the memory. The first port is configured for communicating with the first memory interface of the first IC chip. A second port is coupled to the memory and communicates with the second memory interface of the second IC chip. In-memory processing circuitry is coupled to the memory and controls transactions between the first memory device and the first and second IC chips.

The invention belongs to the technical field of intelligent substations, and particularly relates to an intelligent nuclear phase method and system for a substation. According to the method, a dynamic priority evaluation model is constructed, multi-source data of four kinds of basic factors including voltage phase difference, environment temperature and humidity, equipment vibration and historical errors are synthesized, and a fuzzy comprehensive evaluation method is utilized to calculate weights and dynamically sort the weights; a multi-port phase scattering model is constructed based on transformer substation topology, impedance mismatch points are analyzed by means of a Smith chart, and dual-stage optimization is implemented; constructing a three-layer decision input set according to the optimization model, designing a fuzzy logic driven adaptive rule engine, dynamically outputting a working condition level and matching a nuclear phase strategy; multi-dimensional quality evaluation, dynamic updating of factor weights and optimization of fuzzy model parameters are carried out by monitoring indexes such as reflection coefficients in real time, abnormal mode recognition and compensation strategy solidification are realized by fusing LSTM and a graph neural network, a self-evolution closed-loop system is formed, and finally, crossing of a nuclear phase process from accurate matching to autonomous evolution is realized.

The present invention relates to the field of array antenna design, and to a multi-port array antenna layout detection method, including: obtaining layout information of the array antenna; selecting any port of the array antenna as a target port, exciting the target port and detecting the response of each port of the array antenna under the excitation, constructing a linear equation system based on the response of each port of the array antenna under the excitation, and obtaining the scattering parameters of the target port; extracting the coefficient characteristics of the linear equation system and constructing a preconditioning operator based on the coefficient characteristics; calculating the scattering parameters of the ports in the antenna array except the target port according to the preconditioning operator; determining the isolation between the ports of the array antenna according to the scattering parameters of each port of the array antenna, and judging whether the array antenna layout design meets the standard according to the isolation between the ports of the array antenna, and obtaining the array antenna layout detection result. The present invention can improve the detection efficiency of the multi-port isolation of a large-scale array antenna.

The invention relates to the field of transformer control, and discloses a solid-state distribution transformer control system and method for improving access of a distributed power supply, which are used for solving the problem that original controller parameters are not representative due to access change of the distributed power supply when the solid-state distribution transformer is controlled. The method comprises the following steps: constructing a solid-state distribution transformer with a multi-port power regulation capability, setting initial control parameters, obtaining equivalent impedance influenced data, evaluating according to the equivalent impedance influenced data to obtain an equivalent impedance change index, judging whether the equivalent impedance is changed according to the equivalent impedance change index, and if the equivalent impedance is judged to be changed, judging whether the equivalent impedance is changed or not. If yes, dynamically correcting the initial control parameter according to the equivalent impedance change index to obtain an actual control parameter, and adjusting the output of the solid-state transformer according to the actual control parameter, thereby effectively improving the accuracy of transformer control and the reliability of energy supply.

The embodiment of the invention discloses a unipolar battery equalization method and device for an energy storage system. The unipolar battery equalization method comprises the steps of calculating a state-of-charge value of each single battery according to a sampling value of an electrical basic physical quantity; calculating a difference value between the state-of-charge value of each single battery and an average state-of-charge value of a battery pack to which the single battery belongs; determining the single batteries of which the difference values exceed a preset equalization threshold value as unbalanced batteries; and switching on a selection switch corresponding to the unbalanced battery so as to enable the unbalanced battery to be connected with a primary side port of the multi-port converter, and setting the working state of the multi-port converter as the balanced electric quantity of the unbalanced battery. By adopting the embodiment of the invention, energy storage elements required in a multi-pole framework can be reduced, the integration level is higher, the system is simpler, the reliability of the system can be improved, and the hardware cost can be reduced.

The invention relates to the field of chip testing, in particular to a chip signal integrity test analysis method, device and equipment and a storage medium. The method comprises the following steps: extracting a chip performance index based on a chip design requirement document; performing saturation frequency excitation setting based on the chip performance index to generate an excitation test signal; performing a multi-port signal excitation test and parallel signal sampling based on the excitation test signal to generate a high signal-to-noise ratio response data set; obtaining a chip layout design file; performing chip communication link analysis on the chip layout design file, and constructing communication line layout data; performing signal mapping and waveform quality evaluation on the communication line layout data based on the high signal-to-noise ratio response data set to obtain a node signal distortion rate; and performing signal integrity quantization and theoretical signal integrity score comparison based on the node signal distortion rate, and marking a fault node. According to the invention, the chip testing efficiency is improved, and the signal abnormal part of the chip is accurately and efficiently detected.

A different network address is assigned to each port of a first device and a second device that are configured to exchange traffic over a multi-path connection of a transport layer protocol. When a timeout is detected by the first device indicating that a packet sent to a first network address assigned to a first port of the second device was not received, the first device can regenerate the packet with a second network address assigned to a second port of the second device, and send the regenerated packet to the second network address of the second device. The first device can send heartbeat packets to the first port in an exponential backoff manner and, upon receiving a heartbeat acknowledgement from the first port, resume sending the packets to the first port.

The invention provides a railway flexible traction system based on multi-source fusion. The system is composed of a central control unit, a V / v traction transformer unit and a multi-port flexible interconnection unit. The V / v traction transformer unit comprises a first power supply arm, a second power supply arm and a third power supply arm, the input ends of the V / v traction transformer unit are connected with a public power grid, the first and second power supply arms are connected to the multi-port flexible interconnection unit, and the third power supply arm provides passive support for a traction network. The multi-port flexible interconnection unit comprises a two-phase rectification module, a photovoltaic power generation module, an energy storage module and a single-phase inversion module which are commonly connected to a DC bus. The central control unit adjusts the output power of the multi-port flexible interconnection system and the control strategy of the single-phase inversion module in real time so as to realize flexible consumption of new energy and improvement of power supply stability. The system has the advantages of compatibility, cost effectiveness, new energy access and consumption, power supply reliability improvement, electric energy quality optimization, high adaptability and the like, and is suitable for upgrading and reconstruction of newly-built railway lines and existing railway lines.

The invention discloses a multi-port test equipment resource allocation management system and method, particularly relates to the technical field of equipment resource allocation, and is used for solving the problem that port and resource allocation in multi-port test equipment is not clear. According to the method, the bandwidth, the frequency, the voltage demand and the signal type of the task are extracted, the feature vector is constructed and normalized, the task is classified by using a K-means clustering algorithm, the resource demand of the task is accurately identified, the adaptive capability score of each port is dynamically calculated in combination with the task feature and the port resource capability, and the port load is monitored in real time, so that the adaptive capacity of each port is improved. According to the method, the task is reasonably allocated to the most appropriate port, the port resource allocation is optimized and the port allocation task is intelligently selected by continuously updating the adaptive capability score and combining the greedy algorithm and the optimal scheduling algorithm, so that the resource conflict and waste are avoided, the task delay is reduced, and the task processing capability and the resource utilization efficiency of the system are improved.

The invention belongs to the field of PCIe (Peripheral Component Interconnect Express) chips, and relates to a CXL switching chip of a multi-core-grain architecture and a cross-core-grain routing switching method thereof, and a plurality of CXL switching core grains with uniform specifications are packaged and interconnected to form the CXL switching chip; each CXL switching core particle comprises a plurality of ports, each port can be configured to be in a CXL mode and a D2D mode, and the port of each CXL switching core particle at least comprises a physical layer, a CXL link layer, a CXL transaction layer, a D2D routing layer, a bypass and a multipath selection module; the CXL switching chip further comprises a multi-VC on-chip CXL switching network, and the multi-VC on-chip CXL switching network comprises at least one order-preserving switching VC and one out-of-order switching VC. According to the method, CXL switching chips of various specifications can be flexibly constructed, the design complexity and verification difficulty of the large-scale or multi-port CXL switching chips are effectively reduced, and the production yield of the chips is improved.

The invention relates to the technical field of solid state disks, and discloses a port switching circuit, a controller, a solid state disk, a storage product and a server, the port switching circuit comprises a mode recognition circuit and a gating circuit, when the mode recognition circuit recognizes that a plurality of external devices are connected, the mode recognition circuit outputs a multi-port signal to the gating circuit, and when the mode recognition circuit outputs the multi-port signal to the storage product; the multi-port signal is used for controlling the gating circuit to transmit control signals and data between one external device and one corresponding storage device. According to the access number of the external devices, the bus interfaces connected with the gating circuit are determined, that is, when one external device is accessed, only one bus interface is used, and the storage device is in a single-port mode, and when a plurality of external devices are accessed, each external device uses one bus interface, and the storage device is in a multi-port mode. Therefore, the single-port / multi-port SSD design is realized on a set of hardware single board, and the product specification of the multi-port SSD is made up.

The invention discloses an offshore wind power collecting and sending-out system and method based on a multi-port multi-frequency alternating current and direct current hybrid integrated platform, and belongs to the field of power transmission and distribution of power systems. The system comprises an intermediate-frequency, power-frequency and low-frequency wind power collection subsystem, an offshore integrated platform, a direct-current sending-out submarine cable, a low-frequency sending-out submarine cable, an onshore converter station and an onshore frequency conversion station. The various wind power collection subsystems respectively collect wind turbine generator group outputs with corresponding frequencies and send the wind turbine generator group outputs to the offshore integrated platform; the offshore integrated platform converts intermediate-frequency, power-frequency and partial low-frequency electric energy into direct current and then transmits the direct current to the onshore converter station through the direct-current sending-out submarine cable, and the converter station converts the direct current into power-frequency alternating current; and after being boosted, the other low-frequency electric energy is sent to a land frequency conversion station through a low-frequency sending-out submarine cable to be converted into power-frequency alternating current, so that efficient collection and grid-connected sending-out of multi-frequency wind power resources are realized. According to the invention, the problem that a plurality of independent platforms need to be built in a complex multi-point grid-connected scene in the prior art can be solved.

The invention discloses a topological design method and system for a multi-port flexible interconnection system, and relates to the technical field of power systems, and the method comprises the steps: designing a topological structure based on a power distribution network demand objective function and constraint conditions; based on the topological structure, a model is constructed for simulation verification, and a simulation verification result is obtained; and optimizing the topological structure based on a simulation verification result. According to the topology design method of the multi-port flexible interconnection system, the multi-port flexible interconnection system technology is introduced, the particle swarm optimization algorithm and the analytic hierarchy process are combined, and systematic optimization design of equipment layout and a topology connection mode is achieved. Compared with a traditional method, the dynamic adaptive capacity and the system stability of the power distribution network are improved, different load changes and fault conditions can be effectively handled, and the recovery time after system faults is shortened. Meanwhile, the optimized scheme has better performance in the aspects of cost effectiveness, flexibility and the like, and the reliability and effectiveness of the design scheme in actual operation are ensured.

A multi-port interface device for connecting multiple computing devices for data and power transfer includes a housing with an internal power source. A processor is electrically coupled to the internal power source. A power input port electrically coupled to the internal power source is designed to receive a power cord. The power cord is electrically couplable to an extrinsic power source to transfer power from the extrinsic power source to the internal power source. A plurality of ports electrically coupled to the processor is inset into the housing. Each port of the plurality of ports is exposed within the housing. The plurality of ports includes a plurality of universal serial bus ports and a memory card port.

A multi-port valve assembly, including a housing, a plurality of ports formed as part of the housing, and a rotor disposed in the housing, the rotor selectively in fluid communication with the ports. A first channel is integrally formed as part of the rotor, and a circumferential wall is part of the first channel, the circumferential wall at least partially surrounding a circular aperture which is also part of the first channel. The multi-port valve assembly also includes a second channel integrally formed as part of the rotor, the second channel fluidically isolated from the first channel, and at least two flow paths formed by the orientation of the rotor relative to the housing and the ports. The rotor is placed in one of a plurality of configurations relative to the ports and the housing such that each of the plurality of configurations includes the flow paths.

A cover for a fiber optic ferrule and ferrule push includes a sleeve extending lengthwise between opposed front and rear ends and defines a lengthwise-extending opening that opens through the rear end for receiving at least a portion of the fiber optic fiber optic ferrule and the ferrule push. The sleeve also includes a top side and an opposing bottom side, and two side walls extending between the top side and the bottom side and along at least a portion of the sleeve. A receiver is disposed in the top side to receive a projection associated with the ferrule push.

Methods related to wireless communication systems and uplink (UL) rank adaptation are provided. A user equipment (UE) receives, from a base station (BS), a configuration indicating a resource associated with a plurality of UL reference signal ports. The UE determines, based on at least one of an overheating status, a throughput, or a latency, a quantity of transmission layers for a transmission. The UE transmits, to the BS, an indication of at least one of (1) one or more UL reference signal ports of the plurality of UL reference signal resources associated with the UL reference signal resource based on the quantity of transmission layers, or (2) a number of UL reference signal ports associated with the multi-port UL reference signal resource based on the quantity of transmission layers.

The invention discloses a load insertion detection circuit, a control method thereof and a multi-port charger, and belongs to the technical field of multi-port charging. The load insertion detection circuit comprises a comparison unit, a first input end is connected with a load access node, a second input end is used for accessing a reference voltage, and the comparison unit outputs a first signal when the voltage of the first input end is greater than the voltage of the second input end; each pull-up circuit comprises a switch and a resistor which are connected in series, the first end of each pull-up circuit is electrically connected with the same power supply voltage node, the second end of each pull-up circuit is electrically connected with the load access node, and the resistance values of the resistors are different; the control circuit is electrically connected with the driving end of each switch and the output end of the comparison unit, the control circuit controls the corresponding switches to be switched on according to the sequence that the resistance values of the resistors are decreased progressively until the comparison unit outputs the first signal, the switching-on state of the switch which is switched on currently is maintained, load insertion detection is carried out, the detection range is enlarged, and the anti-interference performance is improved.

The invention discloses a configuration management method and device of a physical layer retimer and a storage medium, which are applied to the technical field of cloud computing and aim to solve the problem of low configuration efficiency in related technologies, the method is applied to a multi-port controller, the input end of the multi-port controller is connected with the output end of a substrate management controller, and the input end of the multi-port controller is connected with the output end of the substrate management controller. Each first communication port of the multi-port controller is used for being connected with the first end of a physical layer retimer, each second communication port is used for being connected with the first end of an optical module, the second end is connected with a corresponding graphic processor, the third end is linked with the second end of the optical module, and the fourth end is connected with a flash memory. The method comprises the following steps: acquiring configuration information corresponding to each electrified physical layer retimer; each piece of configuration information is written into a retimer register corresponding to each powered-on physical layer retimer so as to configure the corresponding powered-on physical layer retimer; the invention can shorten the configuration time and improve the configuration efficiency.

The invention belongs to the technical field of analog integrated circuit design and memory read-write, and provides a multi-valued RRAM read-write circuit with a write-and-read function. The multi-valued RRAM read-write circuit is a multi-port device capable of performing read-write simultaneously, in write operation, a low dropout regulator is utilized to provide voltage for the RRAM circuit and the standard resistance circuit, mirror current is generated, the resistance value of the RRAM is set to be the total resistance of the standard resistance circuit, an operational amplifier is connected into the circuit through a CMOS switch, and feedback is formed to stabilize the voltage at the two ends of the RRAM; and in the read operation, the CMOS switch is used for disconnecting the operational amplifier, and the voltage at the two ends of the RRAM device is directly read. Compared with an existing multi-valued read-write circuit, the multi-valued RRAM read-write circuit has the advantages that write-and-read multi-valued RRAM read-write is realized, and meanwhile, the read-write circuit is not separated, so that the write-in speed is increased, and the area of the read-write circuit is saved.

In one embodiment, an apparatus includes a host controller to implement one or more layers of a Universal Serial Bus (USB)-based protocol to provide an interconnect for a plurality of devices. The host controller is to monitor control plane messages on the interconnect, detect, in the control plane messages, a power state change command for a device coupled to the interconnect, wherein the devices utilizes a tunneled protocol on the interconnect, and modify power distribution for one or more other devices of the interconnect based on detecting the power state change command.

The invention belongs to the field of electromagnetic field numerical solution, and particularly provides a finite element mesh adaptive method for network parameter analysis of a multi-port microwave device, which comprises the following steps: firstly, establishing a geometric structure of the multi-port microwave device, setting simulation frequency, excitation and boundary conditions, and establishing an electromagnetic simulation model; secondly, performing preliminary division and finite element electromagnetic simulation calculation on a computational domain by adopting a tetrahedral mesh to obtain a numerical solution corresponding to each group of excitation, and synthesizing results based on a posterior error estimation method for posterior error estimation; and finally, according to a posterior error indication grid encryption parameter, carrying out simulation calculation again after encryption, and repeating the process until the solution meets the precision requirement. In conclusion, by combining the characteristics of a finite element algorithm and the characteristics of an error estimation algorithm, in the microwave device network parameter analysis process, multiple sets of excited numerical solutions are comprehensively used for posterior error estimation and grid adaptive encryption indication, so that the analysis precision of network parameters is improved.

The invention provides a wind generating set, a differential speed regulation device and a control method thereof, the wind generating set comprises the differential speed regulation device, a multi-port converter and an electro-magnetic synchronous generator, and the differential speed regulation device comprises a permanent magnet motor, a differential planetary gear train, a quasi planetary gear train and a speed regulation motor. A permanent magnet motor rotor is connected with a differential planetary gear train planet carrier, and a speed regulating motor rotor is connected with a quasi planetary gear train sun gear. The differential planetary gear train sun gear drives the electro-magnetic synchronous generator rotor to operate at a first preset rotating speed. One port of the multi-port converter is connected with the permanent magnet motor stator, one port is connected with the speed regulation motor stator, and the other port is connected with the electro-magnetic synchronous generator rotor through the slip ring. According to the differential speed regulation device, variable-speed input, self-energized speed regulation and constant-speed output are achieved, and the differential speed regulation device is compact in overall structure, small in size and light in weight; the black start can be realized without taking power from a power grid; and the electro-magnetic synchronous generator is directly connected to the grid, so that the power grid supporting capacity is high.