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156 results about "Common source" patented technology
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In electronics, a common-source amplifier is one of three basic single-stage field-effect transistor (FET) amplifier topologies, typically used as a voltage or transconductance amplifier. The easiest way to tell if a FET is common source, common drain, or common gate is to examine where the signal enters and leaves. The remaining terminal is what is known as "common". In this example, the signal enters the gate, and exits the drain. The only terminal remaining is the source. This is a common-source FET circuit. The analogous bipolar junction transistor circuit may be viewed as a transconductance amplifier or as a voltage amplifier. (See classification of amplifiers). As a transconductance amplifier, the input voltage is seen as modulating the current going to the load. As a voltage amplifier, input voltage modulates the amount of current flowing through the FET, changing the voltage across the output resistance according to Ohm's law. However, the FET device's output resistance typically is not high enough for a reasonable transconductance amplifier (ideally infinite), nor low enough for a decent voltage amplifier (ideally zero). Another major drawback is the amplifier's limited high-frequency response. Therefore, in practice the output often is routed through either a voltage follower (common-drain or CD stage), or a current follower (common-gate or CG stage), to obtain more favorable output and frequency characteristics. The CS–CG combination is called a cascode amplifier.
Read-only memory array and read-only memory thereof
The disclosure describes a read-only memory array and a read-only memory thereof. The read-only memory array includes common-source lines, word bit lines perpendicular to the common-source lines, and sub-memory arrays. The common-source lines include a first common-source line and a second common-source line. The word bit lines include a first word bit line and a second word bit line. Each sub-memory array includes four memory cells. Each memory cell has a control terminal coupled to the corresponding word bit line and a data terminal coupled to the corresponding common-source line and the corresponding word bit line. The read-only memory includes a field-effect transistor and a capacitor formed in a semiconductor region. The field-effect transistor and the capacitor commonly include a doped well. The doped well, overlapping the common-source line, is coupled to the common-source line.
Owner:YIELD MICROELECTRONICS CORP
Non-volatile memory with stacked transistor pairs
A bit cell (100) is disclosed that includes a non-volatile memory element (110) and a transistor arrangement (120) configured to provide a write signal that switches a state of the memory element. A first terminal (111) of the memory element is connected to a bit line (BL), a second terminal (112) of the memory element is connected to a first common source / drain terminal (121) of the transistor arrangement, and a second common source / drain terminal (122) of the transistor arrangement is connected to a source line (SL). The transistor device includes a pair of stacked complementary transistors, where a gate (213) of an upper transistor is connected to a first word line (WLN), and where a gate (233) of a lower transistor is connected to a second word line (WLP). A memory device including an array of such bit cells, and a method for controlling bit cells are also disclosed.
Owner:INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
Semiconductor memory and method of making the same, electronic device
The application provides a semiconductor memory and a manufacturing method thereof and an electronic device, comprising: a substrate; a plurality of control gate stack structures and a plurality of array common source isolation layers alternately and separately arranged on one side surface of the substrate; an array common source connection layer on the side of the array common source isolation layer away from the substrate; an insulating filling layer covering the side of the array common source connection layer away from the substrate and filling into a groove between adjacent array common source connection layers, the insulating filling layer comprising a via hole corresponding to the array common source connection layer; and a bridge wire on the side of the insulating filling layer away from the substrate and connecting the adjacent two array common source connection layers through the via hole.
Owner:YANGTZE MEMORY TECH CO LTD
Bidirectional switch semiconductor packaging device, AC / DC converter and automobile
The utility model discloses a bidirectional switch semiconductor packaging device, an AC / DC converter and an automobile, and relates to the technical field of power supplies, the device comprises a first switch chip, a second switch chip, a plastic package shell and a heat dissipation substrate; the drain electrode or the source electrode of the first switch chip is electrically connected with the drain electrode or the source electrode corresponding to the second switch chip through the same heat dissipation substrate, so that a bidirectional switch structure with the common drain electrode or the common source electrode is formed, and heat dissipation can be carried out on the two switch chips at the same time by utilizing a single heat dissipation substrate. Meanwhile, on the surface of the plastic package shell, a creepage path extension part used for increasing the creepage distance is arranged between the heat dissipation substrate and any group of pins located on the two sides of the plastic package shell. Through the structure, the packaging size of the bidirectional switch semiconductor packaging device can be kept as small as possible, and meanwhile, the problems of power output control, heat dissipation, electrical safety and the like caused by the too small packaging size can be prevented.
Owner:SUZHOU INOSA UNITED POWER SYST CO LTD
Electronics unit for an electric device
The invention relates to an electronics unit (10) for controlling a load current (I) of an electric load (12), in particular of an electric motor (14), of an electric device by means of at least one power transistor (18) which has at least one control electrode (34) and two power electrodes (36, 38), wherein a control circuit (48) of the power transistor (18) comprises a driver circuit (26) controlling the control electrode (34) and a power circuit (52) of the power transistor (18) comprises the two power electrodes (36, 38) and the electric load (12), and wherein a parasitic inductance of the control circuit (48) and at least one parasitic inductance of the power circuit (52) form a common source inductance (LCSH, LCSH1, LCSH2). According to the invention, the switching behaviour of the at least one power transistor (18) can be influenced during a switching phase (T2, T7), in particular a switch-off phase T7), in which the load current (I) changes over time, by means of at least one controlled current source (54) which is connected to one of the power electrodes (38), in such a way that a negative voltage feedback to the control electrode (34) takes place as a result of the change over time of the load current (dI / dt) via the common source inductance (LCSH, LCSH1, LCSH2). In addition, the invention relates to an electric device, in particular a motor-operated electric device, comprising an electronics unit (10) according to the invention for controlling an electric load (12), in particular a one-phase or multiphase electric motor (14).
Owner:ROBERT BOSCH GMBH
A variable gain amplifier with high temperature stability
PendingCN122119534AAmplifier modifications to reduce temperature/voltage variationAmplifier combinationsVariable-gain amplifierHemt circuits
The embodiment of the present disclosure provides a variable gain amplifier with high temperature stability, which is applied to the technical field of electronic circuit. The amplifier comprises a constant transconductance bias circuit, a first variable gain amplifier and a second variable gain amplifier; wherein the output end of the constant transconductance bias circuit is connected with the input common source transistor of the first variable gain amplifier and the second variable gain amplifier, and is used for providing a constant transconductance bias signal which is compensated according to temperature change; the input end of the first variable gain amplifier is used for receiving an externally input differential signal, and the output end is connected with the input end of the second variable gain amplifier, and is used for transmitting the differential signal after coarse adjustment attenuation to the second variable gain amplifier; and the output end of the second variable gain amplifier is used for outputting an attenuation differential signal with temperature stability. In this way, by restraining the influence of temperature change on the transconductance characteristic of the input common source transistor of the variable gain amplifier, the stable attenuation characteristic of the variable gain amplifier in a wide temperature range is ensured.
Owner:TUOWEI ELECTRONIC TECH (SHANGHAI) CO LTD
Bidirectional power device module integrating a drive circuit and an active substrate clamp circuit
The application relates to a bidirectional power device module integrated with a driving circuit and an active substrate clamping circuit, which comprises a common-drain bidirectional power device, a driving circuit used for providing a driving signal to the common-drain bidirectional power device to turn on and turn off the device, and a substrate clamping circuit comprising a first switch tube and a second switch tube, wherein the first switch tube and the second switch tube are commonly connected to the substrate of the common-drain bidirectional power device, the drain of the first switch tube is connected to the first source of the common-drain bidirectional power device, and the gate is connected to the output end of a third driving unit; the drain of the second switch tube is connected to the second source of the common-drain bidirectional power device, and the gate is connected to the output end of a fourth driving unit; the input end of the third driving unit inputs a first PWM input signal which is subjected to logic processing; and the input end of the fourth driving unit inputs a second PWM input signal which is subjected to logic processing. The application can improve the substrate clamping speed and reduce the substrate potential.
Owner:SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
Semiconductor device and method for forming the same, electronic device
The application discloses a semiconductor device and a forming method thereof and an electronic device, wherein the semiconductor device comprises a substrate, a source layer is formed in the substrate, a plurality of discrete gate structures are formed in the substrate, the bottom of the gate structure is located on the surface of the source layer, a plurality of drains are formed in the substrate on both sides of the top of the gate structure, and each drain is located between two adjacent gates. The application can realize the common source scheme of the corresponding semiconductor device, reduce the size of the semiconductor device, and improve the area utilization of the chip.
Owner:SHANGHAI AIWEI SEMICON TECH CO LTD
Memory device, method of manufacturing memory device, and semiconductor device
To provide a method of manufacturing a semiconductor device having a three dimensional stacked structure, and a storage device.SOLUTION: A storage device 1000 includes a substrate 200 including an insulating surface 210 and a plurality of storage cells 100 arranged on the insulating surface, and includes a storage cell array in which the plurality of storage cells are repeatedly arranged along first and second horizontal directions and a vertical direction, and one transistor included in each storage cell includes a gate insulating layer 1112, a gate structure 1113, and an active layer 1111 parallel to the insulating surface. The gate structure includes a gate body portion side 1113A, the gate body portion includes a first gate 11131, the first gate extends along a sidewall of the active layer, the gate insulating layer is located between the first gate and the active layer and includes a common source structure including a common source 110 and a bit line structure 120, the bit line structure includes a plurality of bit lines extending along a first direction, and the active layer includes source terminals 11111 connected to the common source structure and drain terminals 11113 connected to the bit lines.SELECTED DRAWING: Figure 1
Owner:SWAYSURE TECHNOLOGY CO LTD
In-memory computing circuit and method and resistive change memory
The application provides an in-memory computing circuit and method and a resistance change type memory, the first transistor and the second transistor in the jth memory cell adopt a common gate and common source connection mode, so that the i bit line, the i complementary bit line and the i source line share charges, compared with the existing current convergence-based computing mode, the application provides no direct current in the computing process, solves the problem of excessive current convergence in the prior art, and reduces the power consumption of the in-memory computing circuit. The voltage on the i source line connected with the i voltage reading circuit is the result of the input value of the word line minus the positive and negative product of the memory cell, without the need to set more reading structures, thereby saving the occupied area and delay overhead of the in-memory computing circuit. Due to the connection mode of the memory cell and the bit line, the source line and the complementary bit line, the in-memory computing process is essentially equivalent to the calculation of a differential signal, thereby being able to suppress the influence of non-ideal factors such as process fluctuation on the calculation accuracy.
Owner:INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD
Radio-frequency amplifier accommodating high output voltage swing
PendingUS20260031773A1Amplifier modifications to reduce temperature/voltage variationRF amplifierInductorRadio frequency
An RFA (radio frequency amplifier) includes an NCSA (N-type common-source amplifier) established upon a first source node and configured to receive a first signal and output a first internal current; a first NCGA (N-type common-gate amplifier) configured to receive the first internal current and output a second internal current; a second NCGA configured to receive the second internal current and output a first output current; a PCSA (P-type common-source amplifier) established upon a second source node and configured to receive a second signal and output a third internal current; a first PCGA (P-type common-gate amplifier) configured to receive the third internal current and output a fourth internal current; a second PCGA configured to receive the fourth internal current and output a second output current; and a load network comprising a parallel connection of a primary inductor and a tuning capacitor configured to establish an output signal.
Owner:REALTEK SEMICON CORP
Non-volatile memory element and method of making the same
A non-volatile memory element and a method of making the same are disclosed. The non-volatile memory element includes a semiconductor substrate, a first floating gate, a first control gate, a first drain region, and a common source region. The semiconductor substrate has a recess extending downward from a surface of the substrate. The first floating gate is located in the recess and has a base and a sidewall connected to the base, and is electrically isolated from the semiconductor substrate. The first control gate is located above the first floating gate and is electrically isolated from the semiconductor substrate and the first floating gate. The first drain region is located in the semiconductor substrate in the recess. The common source region is located in the semiconductor substrate in the recess, is adjacent to the first floating gate, and includes a main portion and an extension. The main portion is located below a bottom surface of the recess and is adjacent to the base. The extension extends upward from the bottom surface and beyond the base, and is adjacent to the sidewall.
Owner:UNITED MICROELECTRONICS CORP
Phase-locked loop circuit
The invention belongs to the field of large-scale application-specific integrated circuit design, and particularly relates to a phase-locked loop circuit. The phase-locked loop circuit comprises a phase frequency detector, a charge pump, a low-pass filter, a voltage-controlled oscillator and a frequency divider; the voltage-controlled oscillator comprises a common-source amplifier, a multi-stage delay unit and a level conversion unit; the control end of the common source amplifier serves as the input end of the voltage-controlled oscillator, and the output end of the common source amplifier is connected with the voltage end of the multi-stage delay unit. The output end of the multi-stage delay unit is connected with the input end of the level conversion unit; the output end of the level conversion unit is used as the output end of the voltage-controlled oscillator; according to the voltage-controlled oscillator, the common-source amplifier is used for controlling the multi-stage delay unit along with the change of the control voltage output by the charge pump so as to adjust the oscillation frequency, and a multi-phase clock signal is output through the level conversion unit, so that the power consumption of the phase-locked loop is reduced, and the output clock has relatively small clock jitter.
Owner:SUZHOU GST INFOMATION TECH CO LTD +1
Semiconductor device and electronic system including the same
ActiveUS12635139B2Semiconductor/solid-state device detailsSolid-state devicesElectronic systemsDevice material
A semiconductor device includes a peripheral circuit structure including circuits, wiring layers, and via contacts, a plate common source line covering the peripheral circuit structure, an insulating plug passing through the plate common source line, a lateral insulating spacer between the peripheral circuit structure and the plate common source line, a memory stack structure including gate lines on the plate common source line, a through contact passing through at least one of the gate lines and the insulating plug, the through contact being connected to a first via contact of the via contacts, and a source line contact passing through the lateral insulating spacer, the source line contact being between a second via contact of the via contacts and the plate common source line, wherein a width of the first via contact is greater than a width of the insulating plug in a lateral direction.
Owner:SAMSUNG ELECTRONICS CO LTD
Hysteresis-adjustable high-speed comparator
The invention discloses a hysteresis-adjustable high-speed comparator which comprises a bias module, an input and output tube pair, an adjustable voltage output module, a first equivalent MOS tube MI, a second equivalent MOS tube MII and a load module. The common source node of the input and output tube pair is used for forming series current negative feedback, the grid and drain electrodes of part of MOS tubes in the first equivalent MOS tube MI and the second equivalent MOS tube MII form parallel voltage positive feedback, and the positive feedback coefficient of the parallel voltage positive feedback is set to be larger than the negative feedback coefficient of the series current negative feedback, so that the hysteresis comparison function is achieved. The transconductance of the first equivalent MOS tube MI and the transconductance of the second equivalent MOS tube MII are changed by changing the control voltage output by the adjustable voltage output module, so that the forward turning point and the reverse turning point of the hysteresis adjustable high-speed comparator are changed, the function of adjusting the hysteresis voltage is achieved, and the hysteresis adjustable high-speed comparator can be flexibly adjusted.
Owner:XIDIAN UNIV
Power device threshold voltage measurement circuit and operation method thereof
A power device threshold voltage measurement circuit and its operation method thereof are provided. The measurement circuit includes a switch component, a device under test, a common source capacitor and a decoupling capacitor. The switch component and the device under test forms a half bridge circuit and the common source capacitor is in series connected at the source of the device under test. The device under test is connected as a lower switch of the half bridge circuit and the decoupling capacitor is connected between the device under test and the common source capacitor. By applying an OFF-state stress mode and a measurement mode successively afterwards, a threshold voltage of the device under test is obtained. And the present invention is beneficial to achieving in shorter pulse width, faster measuring speed and inexpensive measuring equipment, and can thus be widely applied to group III-N based power devices.
Owner:NAT YANG MING CHIAO TUNG UNIV
Semiconductor device including nitride spacers
A semiconductor device comprising: a substrate; an electrode structure disposed on the substrate while extending in a first direction, the electrode structure including a plurality of electrodes stacked in a second direction which is a vertical direction of the substrate; a bit line disposed on the electrode structure; vertical structures extending through the electrode structure in the second direction and contacting the substrate, each of the vertical structures including a vertical semiconductor pattern electrically connected to the bit line, and a data storage pattern surrounding a side wall of the vertical semiconductor pattern; common source plugs extending through the electrode structure in the second direction and contacting the substrate under a condition that the vertical structures are disposed among the common source plugs; and spacers respectively disposed to surround side walls of the common source plugs, each of the spacers including regions respectively having different nitride (N) concentrations.
Owner:SAMSUNG ELECTRONICS CO LTD
Testing system, source measure unit therefor, and associated method of testing a device under test
PCT designated stageWO2026073339A1Overload protection arrangementsElectrical testingConvertersElectrical connection
The testing system can have a controller, and a plurality of channels which may have source measure units, each channel individually connectable to one or more electrical connection of a device under test (DUT). A source measure unit can have voltage sources connected to the controller; a pulse generator having an input port connected to the voltage sources, a control port connected to the controller, and an output port; an analog-to-digital converter (ADC); and a current-to-voltage (I / V) converter having a first output port connected to the ADC, an input port connected to the output port of the pulse generator, and a third port connectable to the DUT. The testing system or the source measure unit can further have current limitation units connected in series between the source measure units and / or a fixed voltage reference and the DUT, each current limitation unit having a first transistor and a second transistor configured in a common source or common drain configuration and each having a corresponding gate, the gates having an electrical potential controllable to an intermediary value by the controller.
Owner:ADVANCED MICROTESTING INC
Ka-band broadband low-noise amplifier based on hybrid feedback mode and design method and device thereof
PendingCN121841293AExcellent noise performance balanceguaranteed growthNegative-feedback-circuit arrangementsAmplifier modifications to reduce noise influenceLow noiseSoftware engineering
The invention discloses a Ka-band broadband low-noise amplifier based on a mixed feedback mode and a design method and device thereof. The Ka-band broadband low-noise amplifier comprises an input matching network, a single-section microstrip line coupling feedback network, an inter-stage matching network, a resistance negative feedback network, a three-section microstrip line coupling feedback network and an output matching network. And an active bias network is assisted to ensure the working stability. The circuit is composed of two stages of circuits, the preceding stage circuit adopts a cascode transistor amplifier to minimize noise, and the backward stage circuit adopts a cascode structure to improve linearity and bandwidth. Simulation results show that in the frequency band of 25-40 GHz, the amplifier achieves the excellent performance that the gain is higher than 20 dB, the flatness is 0.6 dB, the noise coefficient is 1.43-1.75 dB, the output 1dB compression point is larger than 5.5 dBm, and the direct-current power consumption is only 40.6 mW. According to the low-noise amplifier, the problems of gain roll-off, high noise, limited bandwidth and the like of a traditional low-noise amplifier in broadband application are solved by innovatively combining a resistance negative feedback technology and a microstrip line coupling feedback technology.
Owner:NANJING COLLEGE OF INFORMATION TECH
Current source resonance type line-to-line direct current power flow controller topology and frequency conversion control method
The invention provides a current source resonance type inter-line direct current power flow controller topology and a frequency conversion control method. The current source resonance type inter-line direct current power flow controller topology comprises a first current source type H bridge, a second current source type H bridge, an isolation transformer and a resonance capacitor, each H bridge serves as a port and is composed of four bidirectional switches, and each bidirectional switch comprises two power MOSFETs with common source electrodes connected in series; the turn ratio of the primary side to the secondary side of the isolation transformer is 1: 1; the two resonant capacitors and the leakage inductor of the isolation transformer form a CLC resonant circuit; wherein the direct current side of the first current source type H bridge is connected with a first direct current line, and the alternating current side is connected with the primary side of the isolation transformer through the CLC resonance circuit; the direct-current side of the second current source type H bridge is connected with a second direct-current line, and the alternating-current side is connected with the secondary side of the isolation transformer through the CLC resonance circuit; during operation, the first current source type H bridge and the second current source type H bridge invert direct current of a direct current line into alternating current in a square wave form and inject the alternating current into the CLC resonance circuit.
Owner:SHANGHAI JIAOTONG UNIV
Non-volatile memory device and operating method thereof and storage system
ActiveCN111916129BRead-only memoriesInput/output processes for data processingSoftware engineeringTransistor stacking
A method of operating a non-volatile memory device, wherein the non-volatile memory device includes a cell string, wherein the cell string includes a plurality of cell transistors stacked in a direction perpendicular to a substrate in series between a bit line and a common source line, the method comprising: programming an erase control transistor in the plurality of cell transistors; and after the erase control transistor is programmed, applying an erase voltage to the common source line or the bit line and applying an erase control voltage to an erase control line connected to the erase control transistor, wherein the erase control voltage is less than the erase voltage and greater than a ground voltage, and wherein the erase control transistor is between a ground select transistor in the plurality of cell transistors and the common source line or between a string select transistor in the plurality of cell transistors and the bit line.
Owner:SAMSUNG ELECTRONICS CO LTD
A high linearity low noise amplifier based on post-distortion technique
ActiveCN119135096BAmplifier modifications to reduce non-linear distortionAmplifier modifications to reduce noise influenceLow noiseAudio power amplifier
The application discloses a high linearity low noise amplifier based on a post-distortion technology, which comprises a common source and common gate structure circuit, an input matching circuit, an output matching circuit, an auxiliary amplification circuit and a neutralizing inductor; the common source and common gate structure circuit comprises a first common source tube and a second common gate tube; the auxiliary amplification circuit comprises a first common gate tube; the gate and the source of the first common source tube are connected with the input matching circuit; the drain of the first common source tube is connected with the output end of the neutralizing inductor and the source of the first common gate tube; the source of the second common gate tube is connected with the input end of the neutralizing inductor; the drain and the gate of the second common gate tube are connected with the output matching circuit; the source and the gate of the first common gate tube are connected with the auxiliary amplification circuit. The application can realize the balance of multiple indexes such as linearity, power consumption, gain and matching. The application can be widely applied in the field of radio frequency integrated circuit technology.
Owner:GUANGDONG UNIV OF TECH
Contact Integration in Complementary Field-Effect Transistor (CFET) Devices
A semiconductor structure forming a complementary field-effect transistor (CFET) includes a first common metal gate, a second common metal gate, and a bottom field-effect transistor (FET) module comprising a pair of bottom common source / drain (S / D) contacts, which are electrically connected to each other via a first direction through the first common metal gate through a first bottom S / D epitaxial (epi) region and via the second common metal gate through a second bottom S / D epi region. The upper FET module includes an FET module and an upper FET module stacked on the bottom FET module in a second direction orthogonal to the first direction, the upper FET module comprising: an upper common S / D contact; a first upper S / D contact electrically connected to the upper common S / D contact through a first common metal gate in the first direction via a first upper S / D epitaxial region; and a second upper S / D contact electrically connected to the upper common S / D contact through a second common metal gate in the first direction via a second upper S / D epitaxial region.
Owner:APPLIED MATERIALS INC
Non-volatile memory device and operating method that minimizes common source line bounce
A non-volatile memory device includes: N planes, each plane including a plurality of memory blocks; N discharge control circuits, each adjacent to the N planes and configured to connect a common source line of each of the N planes to a ground voltage terminal in response to each of the N discharge control signals; a plane selection circuit configured to select K planes among the N planes; and an operation control circuit configured to adjust the voltage level of the K discharge control signals according to the distance difference between the ground voltage terminal and each of the K discharge control circuits corresponding to the K planes.
Owner:SK HYNIX INC
Semiconductor device and method
Embodiments include a FinFET transistor including an embedded resistor disposed in the fin between the source epitaxial region and the source contact. A control contact may be used to bias the embedded resistor, thereby changing the resistivity of the resistor. Edge gates of the FinFET transistor may be replaced with insulating structures. Multiple ones of the FinFET / embedded resistor combination may be utilized together in a common drain / common source contact design.
Owner:TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
Semiconductor memory device and electronic system including the same
PendingUS20260045281A1Semiconductor/solid-state device detailsSolid-state devicesElectronic systemsHemt circuits
A semiconductor memory device includes a peripheral circuit structure and a cell structure stacked on the peripheral circuit structure. The cell structure includes a plurality of gate electrodes stacked and spaced apart from each other in a first direction, first and second channel structures elongated in the first direction and extending through the plurality of gate electrodes and spaced apart from each other. The first and second channel structures each includes a channel layer, and a vertical gate electrode spaced apart from the respective channel layer. The cell structure includes a common source layer connected to the first channel layer and the second channel layer, respectively and also first and second wiring plates connected to the respective vertical gate electrodes and spaced apart from each other. The cell structure includes a wiring isolation pattern disposed between the first wiring plate and the second wiring plate.
Owner:SAMSUNG ELECTRONICS CO LTD
Electronic device including radio frequency front end device and operating method thereof
PCT designated stageWO2026095663A1Spatial transmit diversityCommunications systemAudio power amplifier
According to an embodiment, a radio frequency front end (RFFE) device included in an electronic device in a communication system may comprise a power amplifier, and at least one antenna connected to the power amplifier. The power amplifier includes: a drive stage configured of a first common source amplifier in a differential mode; a main stage including the structure in which a first common gate amplifier is stacked on a second common source amplifier; and a stack stage including a second common gate amplifier stacked on an output stage of the power amplifier.
Owner:SAMSUNG ELECTRONICS CO LTD
Alternating current conversion equipment
The invention discloses alternating current conversion equipment, and belongs to the technical field of power conversion. In the alternating-current conversion equipment, an alternating-current conversion circuit is connected with an alternating-current source and a primary winding of a transformer, the alternating-current conversion circuit comprises at least one bridge arm, the two ends of the bridge arm are connected with the alternating-current source through bridge arm buses, the bridge arm comprises an upper bridge arm and a lower bridge arm which are connected in series, and each of the upper bridge arm and the lower bridge arm comprises two switching tubes. The two switch tubes of one of the upper bridge arm and the lower bridge arm are connected in series through common source electrodes, and the two switch tubes of the other one of the upper bridge arm and the lower bridge arm are connected in series through common drain electrodes; under the condition that the bridge arm is in the dead zone time period, the follow current module is provided with a follow current path, the alternating current conversion device is provided with a closed follow current loop, and the closed follow current loop comprises the follow current path, part of the switching tubes and the primary winding. According to the invention, a closed follow current loop is provided in a dead zone period, continuous current circulation is realized without interruption, tube pressure stress overshoot of a switching device is reduced, and the risk of damage to the switching device is reduced.
Owner:SUNGROW POWER SUPPLY CO LTD
Multistage feedback broadband low noise amplifier
PendingCN121508466AAmplifier modifications to reduce noise influenceAmplifier modifications to raise efficiencyCapacitanceLow noise
The invention discloses a multi-stage feedback broadband low-noise amplifier which comprises a first-stage amplifier, a second-stage amplifier and an output-stage buffer amplifier. The first-stage amplifier is composed of a cascode structure and a current multiplexing structure; the second-stage amplification electric appliance is composed of a complementary common-source structure and a current multiplexing structure. The output stage buffer amplification circuit is composed of a common source buffer structure and a current multiplexing structure. According to the invention, the cascade structure and the complementary common-source structure are connected in parallel, and inter-stage capacitance offset, source inductance and current multiplexing are adopted. By means of the mode, the use efficiency of current in the circuit is improved, the circuit gain and noise performance and the like are improved, on the other hand, the Miller effect is effectively restrained, a dominant pole is pushed to high frequency, and therefore the circuit bandwidth is greatly expanded.
Owner:GUILIN UNIV OF ELECTRONIC TECH
Silicon-based millimeter-wave broadband compact dual-drive doherty power amplifier
PendingCN122119528APower amplifiersAmplifier modifications to raise efficiencyModulation bandwidthCascode
The application relates to a silicon-based millimeter wave broadband compact double-drive high-efficiency Doherty power amplifier, belonging to the technical field of radio frequency integrated circuits, comprising an input quadrature coupler, a main and auxiliary two power amplifier paths and a broadband load modulation output network; wherein the power amplifier path adopts a differential common source and common gate unit with cross-coupling capacitance and a double-mode drive topology to improve the gain and efficiency of the millimeter wave frequency band; the output network adopts a slow wave transmission line structure combined with a cascade coupling line pair to realize broadband active load modulation and absorb transistor parasitic capacitance, and simultaneously optimize the chip area. Thus, the problem that the efficiency and bandwidth are difficult to be considered simultaneously due to the limited load modulation bandwidth and the decreased transistor gain of the traditional silicon-based millimeter wave Doherty power amplifier is solved.
Owner:XIDIAN UNIV