85 results about "Source plane" patented technology

A 3D memory device is described which includes bottom and top memory cubes having respective arrays of vertical NAND string structures. A common source plane comprising a layer of conductive material is between the top and bottom memory cubes. The source plane is supplied a bias voltage such as ground, and is selectively coupled to an end of the vertical NAND string structures of the bottom and top memory cubes. Memory cells in a particular memory cube are read using current through the particular vertical NAND string between the source plane and a corresponding bit line coupled to another end of the particular vertical NAND string.

A multi-layer memory device is provided. The multi-layer memory device includes multiple layers of memory core cells. A word plane electrically connecting each first active terminal of the multiple layers of the memory core cells intersected by the word plane is included. A drain plane substantially orthogonal to the word plane is provided. The drain plane electrically connects each second active terminal of the multiple layers of the memory core cells intersected by the drain plane. A source plane substantially orthogonal to both the word plane and the drain plane is included. The source plane electrically connects each third active terminal of the memory core cells within a single level. In one embodiment, the memory core cells are defined by a device having three active terminals.

An exposure system includes: an illumination optical system defining, in an effective illumination source plane, a center region forming a perpendicularly incident light and first and second eccentric regions forming obliquely incident lights having a perpendicular electric vector component perpendicular to a straight line connecting the first and second eccentric regions, the electric vector component being larger than a parallel electric vector component parallel to the straight line, and illuminating the mask pattern with the perpendicularly incident light and the obliquely incident lights; and a projection optical system projecting an image of the mask pattern to a processing object.

A 3D memory device includes bottom and top memory cubes having respective arrays of vertical NAND string structures. A common source plane comprising a layer of conductive material is between the top and bottom memory cubes. The source plane is supplied a bias voltage such as ground, and is selectively coupled to an end of the vertical NAND string structures of the bottom and top memory cubes. Memory cells in a particular memory cube are read using current through the particular vertical NAND string between the source plane and a corresponding bit line coupled to another end of the particular vertical NAND string.

The invention discloses a high-precision near-field acoustic holography algorithm adopting a weighted iteration equivalent source method, which is characterized in that a holographic plane H is arranged in a sound source near-field radiation area, and sound pressure PH on the holographic plane H is measured; an equivalent source plane Se is arranged at the side, which is away from the holographic plane H, of an object reconstruction plane T, and equivalent sources are arranged on the equivalent source plane Se; a relation between the sound pressure PH and each equivalent source is established by using a sound pressure transfer matrix between the equivalent source and the holographic plane H; and the source intensity Q of each equivalent source is solved by adopting a new iterative regularization algorithm with a posteriori weighted norm constraint penalty term, and then sound field data on the object reconstruction plane T is calculated by using the solved source intensity Q and the transfer matrix between the equivalent source and the object reconstruction plane T. According to the invention, the source intensity of each equivalent source is precisely solved by using the new iterative regularization algorithm with the posteriori weighted norm constraint penalty term, thereby avoiding source intensity energy leakage caused by a 2-norm penalty term in the Tikhonov regularization process. Compared with conventional equivalent source based near-field acoustic holography, a calculation result acquired by the method disclosed by the invention is more accurate.

An antenna comprising a substrate having a pair of oppositely directed surfaces. A source plane conductor is located on one of the surfaces and has a signal line connected thereto. A ground plane conductor is located on another of the surfaces. Each of the conductors has a slot extending therethrough with said slots sized and positioned relative to one another to inhibit the intensity of radiation emanating from the ground plane.

The invention discloses a method for generating a vortex light beam by use of a calculation hologram. The steps comprise: (1), utilizing a monocyclic Laguerre-Gaussian (LG) vortex light beam in a source plane (z=0m) coordinate system; (2), performing conjugate symmetrical extension on the complex amplitude of the vortex light beam, and obtaining symmetrical vortex light beam complex amplitude distribution; (3), performing Fourier transformation on the conjugate symmetrical vortex light beam complex amplitude distribution to obtain two-dimensional discrete real function distribution, performing DC component inhibition on real functions, and coding to form the vortex light beam calculation hologram; (4), performing Fourier inverse transformation on the calculation hologram, obtaining the light intensity distribution and the phase distribution of the vortex light beam, and taking the left half portions of the light intensity distribution and the phase distribution as the vortex light beam for digital reconstruction; and (5), loading the vortex light beam calculation hologram on a spatial light modulator, modulating incident laser and reconstructing the vortex light beam in a photoelectric mode. The method employs a conjugate symmetrical extension Fourier calculation holographic algorithm, the algorithm is rapid and simple, the calculation efficiency is high, and sidelobe-free high-quality vortex light beams can be generated.

The invention provides a method for sound field separation by double plane vibration speed measurement and equivalent source method, which is characterized in that a measurement plane S1 and an auxiliary measurement plane S2 parallel therewith and Delta h therefrom are provided in the measured sound field; normal direction particle vibration speed on the two planes are measured; two imaginary source planes S1* and S2* are provided, and equivalent source are distributed on the imaginary source planes; transfer relationship between the equivalent source and normal direction particle vibration speed on two measurement planes are established; strength of each equivalent source on the imaginary source planes S1* and S2* are determined according to the transfer relationship; sound pressure and normal direction particle vibration speed radiated by sound sources on both sides of the two measurement planes are separated according to strength of equivalent source on two imaginary source plane. The invention adopts equivalent source method as the sound source separation algorithm, which has great computation stability, high computation accuracy, and simple implementation; normal direction vibration speed on two measurement planes are used as input for the separation, therefore vibration speed of the separated normal direction particle has high accuracy. The method is widely applicable near-field acoustic holographic measurement under internal sound field or noise environment, material reflection coefficient measurement, scattering sound field separation.

The invention discloses an image-processing-technology-based plane footprint detection and analysis system and a method thereof. The system comprises an image processing subsystem used for extracting the footprint depth information of a source plane footprint image, and generating a target plane footprint image which carries the depth information. In such a way, by means of a computer system, the depth information in a restored plane footprint image is further analyzed to show a stress pressure, an abrasive surface, foot rising and falling and the like, reflecting the gait feature and the figure feature of a person, of a footprint; and specific indexes, such as the sex, the stature, the posture, the age, the step gait and the like, of a suspect are obtained by combining the footprint left on-site for performing contrastive analysis, and detecting aided with the functions such as butting, splicing, overlapping, gridding, measuring, feature marking and the like; therefore, the aims of reducing a screening object range and determining the identity of the suspect are fulfilled.

An antenna includes a substrate having a pair of oppositely directed surfaces. A source plane conductor is located on one of the surfaces and has a signal line connected thereto. A ground plane conductor is located on another of the surfaces. Each of the conductors has a slot extending therethrough with the slots sized and positioned relative to one another to inhibit the intensity of radiation emanating from the ground plane.

A wiring board includes a metal cap pad that is arranged so as to surround a mounting position of an electronic component and is connected to an end portion of a metal cap, a power source plane that is connected to the electronic component through a connection member and has a gap, a ground plane that is connected to the electronic component through a connection member, and a plurality of conductive body elements that are repeatedly arranged so as to surround the connection members and the gap. The power source plane and the ground plane extend so as to include at least a part of an area that is surrounded by the plurality of conductive body elements and at least a part of an area facing the plurality of conductive body elements.

A power source terminal and a ground terminal for a semiconductor integrated circuit are connected to a conductor pattern through a capacitor. The conductor pattern is connected, through a filter, to a plane conductor connected to neither a ground plane nor a power source plane. Thus, a common mode noise arising from between the power source and the ground is caused to flow into the plane conductor. This reduces the common mode noise flowing in the ground and the power source of the printed wiring board, which relatively act as antennas.

An exposure system includes: an illumination optical system defining, in an effective illumination source plane, a center region forming a perpendicularly incident light and first and second eccentric regions forming obliquely incident lights having a perpendicular electric vector component perpendicular to a straight line connecting the first and second eccentric regions, the electric vector component being larger than a parallel electric vector component parallel to the straight line, and illuminating the mask pattern with the perpendicularly incident light and the obliquely incident lights; and a projection optical system projecting an image of the mask pattern to a processing object.

The present disclosure relates to a memory array including a plurality of magnetic tunnel junction cells arranged in an array. Each magnetic tunnel junction cell is electrically coupled between a bit line and a source line. The magnetic tunnel junction cell is configured to switch between a high resistance state and a low resistance state by passing a write current passing though the magnetic tunnel junction cell. A transistor is electrically between the magnetic tunnel junction cell and the source line. A word line is electrically coupled to a gate of the transistor. The source line is a common source line for the plurality of magnetic tunnel junctions.

The present disclosure relates to a memory comprising at least one word line comprising a row of split gate memory cells each comprising a selection transistor section comprising a selection gate and a floating-gate transistor section comprising a floating gate and a control gate. According to the present disclosure, the memory comprises a source plane common to the memory cells of the word line, to collect programming currents passing through memory cells during their programming, and the selection transistor sections of the memory cells are connected to the source plane. A programming current control circuit is configured to control the programming current passing through the memory cells by acting on a selection voltage applied to a selection line.

The present application is directed toward the generation of three dimensional images in a tomography system having X-ray sources offset from detectors, in particular in a system where the sources are located on a plane, while detectors are located on multiple parallel planes, parallel to the plane of sources and all the planes of detectors lie on one side of the plane of sources. A controller operates to rebin detected X-rays onto a non-flat surface, perform two dimensional reconstruction on the surface, and generate the three dimensional image from reconstructed images on the plurality of surfaces.

The invention discloses a complex shape sound source surface instantaneous acceleration reconstruction method. The complex shape sound source is internally and externally provided with a hologram plane and an equivalent source plane which are conformal with the sound source, and time domain sound pressure signals on the hologram plane are acquired; according to a principle of a time domain equivalent source method, a time domain equivalent source strength is used as a medium to build the relationship between the time domain sound pressure on the hologram plane and a time domain normal acceleration of the sound source surface; the time domain sound pressure on the hologram plane and a known Green function are then used to solve all equivalent source strengths at all moments through an iterative inversion process; and the solved equivalent source strengths are finally used to calculate the normal acceleration of the sound source surface at each moment. The invention provides a non-contact instantaneous acceleration acquisition method, and influences on a sound source itself vibration mode by acceleration sensor additional mass can be avoided. The method has an ability of processing any shape sound source and can be used for complex shape structure surface instantaneous acceleration measurement in practical engineering.

The invention discloses a circuit board having a multicycle planar electromagnetic band gap structure. According to the invention, a problem ofnarrow stop band width of a current circuit board with a planar electromagnetic band gap is solved. The circuit board provided in the invention is composed of a power source plane (1), a ground plane (2), and a dielectric layer (3). The power source plane (1) comprises a plurality of minor cycle planar electromagnetic band gap units (101), a plurality of major cycle planar electromagnetic band gap units (102) and a plurality of cascading bridging line connections (103); the two planar electromagnetic band gap units (101) and (102) are respectively at a left side and a right side of the power source plane and are arranged in a square matrix mode; besides, the two planar electromagnetic band gap units are connected by the cascading bridging line connections (103) to construct a multicycle power source planar structure. According to the invention, when an inhibition depth is -30 dB, a stop band range is from 0.7 GHz to 8.4 GHz and a stop band width is 7.7 GHz; compared with a circuit board having a single cycle planar electromagnetic band gap unit, the circuit board provided in the invention has an obviously broadened band gap width, so that synchronous switch noise can be effectively inhibited; therefore, the circuit board provided in the invention can be applied to a high speed circuit and a broadband device.

The present disclosure relates to a memory comprising at least one word line comprising a row of split gate memory cells each comprising a selection transistor section comprising a selection gate and a floating-gate transistor section comprising a floating gate and a control gate. According to the present disclosure, the memory comprises a source plane common to the memory cells of the word line, to collect programming currents passing through memory cells during their programming, and the selection transistor sections of the memory cells are connected to the source plane. A programming current control circuit is configured to control the programming current passing through the memory cells by acting on a selection voltage applied to a selection line.

The invention discloses a point acoustic source identification method without phase information, which comprises the following steps: measuring acoustic pressure radiated from a point acoustic source s at (xs,ys) on an acoustic source plane to a microphone array plane by a microphone array to obtain an acoustic pressure amplitude vector Ps; constructing an acoustic pressure amplitude vector Ps' formed on a measurement plane by a point acoustic source s' at any position on the acoustic source plane to obtain a normalization vector e=Ps' / ||Ps'||; and performing inner product computation on the vector Ps and the normalization vector e: ||||=||Ps||*||e||, ||Ps||*||e||=||Ps||, ||Ps||=||||max, wherein when the maximum value ||||max is obtained, the position of a corresponding point acoustic source s' in the normalization vector e is that of the point acoustic source s on the acoustic source plane, and the strength of the acoustic source A=||||max / ||Ps'|| is obtained. Therefore, the point acoustic source can be identified precisely only by measuring the acoustic pressure amplitude value.

The invention discloses a variable-step-size obscuration forecasting method. The variable-step-size obscuration forecasting method comprises the steps of: firstly, defining a satellite-target source coordinate system and establishing a conversion matrix corresponding to a WGS-84 coordinate system; then establishing a criterion of obscuration events of a satellite in the satellite-target source coordinate system; if the criterion is satisfied, further judging whether a vector of a connecting line between the satellite and a target source is within an observable range of a satellite obscuration antenna; if so, considering that an obscuration event occurs, and further performing effective forecasting on the obscuration event. The obscuration generation process is converted into a geometrical problem that a fixed-point rotating ray cuts the circumference within the satellite-target source plane by adopting a coordination conversion idea, so that the physic principle of the generation of the obscuration event is revealed substantially; the variable-step-size obscuration forecasting method is a variable-step-size obscuration forecasting algorithm which can efficiently improve the calculation efficiency; through the combination with the installation of the satellite obscuration antenna, the variable-step-size obscuration forecasting method is suitable for the practical project application and is particularly suitable for forecasting the sun or the GPS obscuration event for a long time.

A method and system for defect evaluation using IDDQ voltage linearity provides improved IDDQ testing for determining whether manufacturing defects in a VLSI device are likely to cause functional faults. IDDQ data is collected at multiple power plane voltages (VDDs) for a test vector at which a fault is activated. The IDDQ vs. VDD is then examined and a range of VDDs over which the characteristic IDDQs are non-linear with respect to VDD is determined. Peaks in the first derivative of the IDDQ vs. VDD curve indicate a particular VDD at which the onset of non-linearity in the IDDQ occurs. The VDD point below which the curve is non-linear indicates the relative resistance of a fault with respect to the driving point resistance of the node at which the fault is located. The relative resistance is directly determinative of additional circuit delay cause by the fault and / or whether the fault will cause a logic level transmission failure. Therefore, the range of VDDs for which the IDDQ curve is linear provides a pass / fail indication that can be used to reject devices in manufacturing test.

The invention discloses a 3D projection method and device. The method comprises that a row buffer area is arranged, and needed pixel data in a source planar image in a memory is buffered according to set segments; a target area of 3D projection is arranged; according to the projection correspondence between the target area of 3D projection and a 3D projection plane, corresponding coordinates of the pixels of the target area in the source plane image are calculated; according to the coordinates in the source plane image, pixel data in the source image data is obtained from the arranged row buffer area; and the pixel data is output corresponding to the coordinates of the pixels of the target area. Pixel data corresponding to the coordinates of the pixels of the target area can be directly stored and / or displayed subsequently. The method and device can improve the 3D projection efficiency.

A method and system for defect evaluation using IDDQ voltage linearity provides improved IDDQ testing for determining whether manufacturing defects in a VLSI device are likely to cause functional faults. IDDQ data is collected at multiple power plane voltages (VDDs) for a test vector at which a fault is activated. The IDDQ vs. VDD is then examined and a range of VDDs over which the characteristic IDDQs are non-linear with respect to VDD is determined. Peaks in the first derivative of the IDDQ vs. VDD curve indicate a particular VDD at which the onset of non-linearity in the IDDQ occurs. The VDD point below which the curve is non-linear indicates the relative resistance of a fault with respect to the driving point resistance of the node at which the fault is located. The relative resistance is directly determinative of additional circuit delay cause by the fault and / or whether the fault will cause a logic level transmission failure. Therefore, the range of VDDs for which the IDDQ curve is linear provides a pass / fail indication that can be used to reject devices in manufacturing test.

The invention discloses an ocular lens. The ocular lens comprises a reflective polaroid, a 1 / 4 wave plate and a lens set with positive focal power from a human eye side to an image source side in sequence along an optical axis, wherein the lens set comprises one or more lenses, and an aspherical mirror surface of any lens is plated with semi-permeable and semi-reflective optical thin film, and thedistance Lm between the reflective polaroid and the semi-permeable and semi-reflective optical thin film on the optical axis and the distance Ld between the reflective polaroid and an image source plane of the ocular lens on the optical axis satisfy the condition that Lm / Ld is larger than 0.25 and smaller than 0.75.

The invention discloses an electromagnetic band gap structure for achieving ultra-wideband suppression of synchronous switching noise. The electromagnetic band gap structure is characterized in that arectangular notch is etched on each side of a power plane, and a microstrip line is led out from the middle point of the bottom of the notch; the microstrip line surrounds the power plane to the tailend of the next side in a counterclockwise direction, and the part of the microstrip line positioned at the next side surrounds the part of the microstrip line positioned at the side, which is led out from the rectangular notch at the side; the microstrip line is connected with the microstrip line of the adjacent structural unit to form an S shape; the central area of the power plane is hollow, and a square plane plate is inlaid in the central area; a rectangular notch is etched in the center of each of four sides of the square plane plate, and a microstrip line is led out from the middle point of the bottom of the rectangular notch and connected with the power plane. The electromagnetic band gap structure better reduces the lower cut-off frequency of noise suppression and effectively enlarges the bandwidth range of noise suppression, thereby achieving the ultra-wideband suppression of the synchronous switching noise between the power plane and a ground plane.

The invention relates to a construction method of a compact electromagnetic band gap (EBG) structure for eliminating high speed circuit noise. Based on a coplanar compact EBG structure, the method has 5 steps: 1. establishing a power supply system of a printed circuit board in electromagnetic simulation software CST according to the general design norms of printed circuit boards; 2. editing a power source plane of a power supply distribution system into a novel plane compact EBG structure by a model builder of the CST software; 3. intercepting a unit of the compact EBG structure in the CST software for carrying out dispersion graph analysis and adjusting the structure of the unit; 4. adding a dispersion port, calculating the transmission S parameter of the power supply system and optimizing the structural dimension in the CST software to obtain required gap indexes; and 5. adopting a two-sided copper-clad plate to manufacture the EBG structure according to the determined optimal dimension in step 4. The method provided by the invention improves planar power supply area of the power source and inhibits the high frequency part and the ultrahigh frequency part of the noise of the power supply system.

The invention relates to the field of circuit boards, in particular to an anti-electromagnetic-interference circuit board. The anti-electromagnetic-interference circuit board comprises a circuit board body provided with an inductor. The area, where the inductor is installed, of the circuit board body is provided with a mechanical hole and / or an arrangement-forbidding area. The power source plane, the ground plane and interconnecting wires in the circuit board body all keep away from the mechanical hole and / or the arrangement-forbidding area. The inductor is a main source of the electromagnetic interference problem in the circuit board body. According to the anti-electromagnetic-interference circuit board, the area, where the inductor is installed, of the circuit board body is provided with the mechanical hole and / or the arrangement-forbidding area, the power source plane and the ground plane in the circuit board body and the interconnecting wires among various parts in the circuit board body all keep away from the mechanical hole and / or the arrangement-forbidding area, therefore, mutual interference between the electromagnetic field generated by the inductor and the electromagnetic fields generated by the areas, intersected with the area where the inductor is installed, of the power source plane, the ground plane and / or the interconnecting wires is avoided, the electromagnetic interference in the circuit board body can be effectively reduced, and the signal quality of the power source plane, the ground plane and the interconnecting wires among the various parts in the circuit board body is improved.