701 results about "Synchronous switching" patented technology

A novel match / mismatch emulation scheme for an addressed location in a CAM system that includes a plurality of CAM blocks. The plurality of CAM blocks are organized into at least one rectangular array having rows each having a plurality of CAM blocks, a group of CAM cells and associated read / write bit lines connecting the group of CAM cells to an addressed search circuit. During debug mode, where the individual array cells do not participate in search, all the cells in the debug column behave the same way to emulate a match / mismatch on all words. The circuit provides a control input to include address evaluation of a debug cell in a row. The circuit also provides simultaneous switching noise analysis on an evaluating row. The resulting CAM cell provides a circuit to test individual rows for defects and noise analysis.

Switching regulator circuits and methods are provided for regulating output voltage that include an adjustable minimum peak inductor current level and adjustable burst comparator hysteresis for Burst Mode operation in switching regulators. Control over minimum peak inductor current level and burst comparator hysteresis is achieved during Burst Mode operation by allowing external user control of the burst threshold level and the burst comparator hysteresis. A single user-accessible input pin, two user-accessible input pins, or three user-accessible input pins may be used to distinguish between forced continuous and Burst Mode operations, set a burst threshold level, and set a burst comparator hysteresis during Burst Mode operation. The present invention may be applied to buck, boost, buck-boost, or any other suitable regulator circuit configuration. The present invention also may be employed with synchronous and non-synchronous switching regulators.

A DC / DC converter 100 has a DAC 40 that receives a code associated with desired processor operating voltage and sets the reference voltage on its output 41. The reference voltage (VDAC) is boosted by the buffer amplifier 42 to center the droop along the median load. A sensed current signal ICS 22 is proportional to the load current Io 24 and can be either inductor current, or switch current, or diode (or synchronous switch) current. In all cases it is scaled down by the factor of gain Gc. A droop control feedback circuit includes an error amplifier 50. It has two inputs. In one embodiment the gain of the converter is by a signal inversely proportional to the processor clock frequency FCPU max and transformed to the current IDROOP 32 that creates the voltage drop across the resistor R1. The other input is coupled to the buffer amplifier output. As a result, the output voltage of the converter 50 is inversely proportionally to the load current and is invariant to the processor clock frequency changes associated with the processor mode switchover. Other embodiments modify the gain of the error amplifier, or offset the gain and hold the amount of droop constant.

The invention discloses a double-finger double-driving translation clamping type flexible grip and a control method. The double-finger double-driving translation clamping type flexible grip comprises double servo motor systems, double motor end synchronous pulleys, double positioning sliding guide rail systems, double ball screw systems, double screw synchronous pulleys, double finger paws, a U-shaped main rack of the grip and a main rack cover plate, wherein the coordinating fetching action of two paws is realized by the control on two servo motors. A fetching method is characterized in that the double motors are used as power, double fingers are respectively fixedly arranged on two screw guide rail synchronous switching modules, through the rotation of two synchronous toothed belts between the double motor end synchronous pulleys and the ends of the double screw end synchronous pulleys, the rotation of the motor is converted into linear motion by a screw, so that the double fingers are translated respectively along two positioning sliding guide rails, and the translation switching on and off of the double paws along double guide rail surfaces can be realized. Due to the fact that the device is used for independently driving the corresponding paws to move by the double motors, so that the double fingers can more flexibly move, and different fetching speeds can be set for the double fingers, and the position precision is high.

A synchronous regulation circuit is provided. A secondary-side switching circuit is coupled to the output of the power converter to generate a synchronous signal and a pulse signal in response to an oscillation signal and a feedback signal. An isolation device transfers the synchronous signal from the secondary side to the primary side of the power converter. A primary-side switching circuit receives the synchronous signal to generate a switching signal for soft switching a transformer. The pulse signal is utilized to control a synchronous switch for rectifying and regulating the power converter. The synchronous switch includes a power switch and a control circuit. The control circuit receives the pulse signal for turning on or off the power switch. The power switch is connected between the transformer and the output of the power converter. A flyback switch is operated as a synchronous rectifier to freewheel the inductor current of the power converter. The flyback switch is turned on in response to the off state of the power switch. The turn-on period of flyback switch is correlated to the turn-on period of the power switch.

The disclosed embodiments provide a synchronous switching converter that converts a DC input voltage into a DC output voltage. This synchronous switching converter includes a high-side switching MOSFET coupled between an input node and a first node. The converter also includes a low-side switching MOSFET coupled between the first node and a ground node and is in series with the high-side switching MOSFET. This converter additionally includes a bootstrap capacitor coupled to the high-side switching MOSFET to provide turn-on voltage for the high-side switching MOSFET. Furthermore, the converter includes a main refresh circuit coupled to the bootstrap capacitor and is configured to refresh the bootstrap capacitor during a first operating mode of the synchronous switching converter. Moreover, the converter includes an auxiliary refresh circuit coupled to the main refresh circuit and the bootstrap capacitor and is configured to refresh the bootstrap capacitor during a second operating mode of the converter.

The present disclosure describes a synchronized switching power supply for a radio frequency (RF) power amplifier. In some aspects, a synchronized power supply circuit comprises a first switch connected between a power rail and a first terminal of an inductor that is connected to an output of the circuit via its second terminal. The circuit also includes a second switch connected between a ground rail and the first terminal of the inductor, and respective gate drivers for the first and second switches. An amplifier of the circuit is connected to the power rail and has an output connected to the output of the circuit. A current sensor is connected between the output of the amplifier and the output of the circuit, with an output of the current sensor being connected to an input of a comparator. A delay circuit is connected between an output of the comparator and the first and second gate drivers, and may synchronize the power supply circuit.

The invention provides a method for realizing synchronous switching of a virtual router redundancy protocol (VRRP) in a dual-machine hot backup system. The method comprises the following steps: (a) automatic system switching strategy list is configured for main equipment and standby equipment according to running state and failure events of the equipment, and the configuration information is interacted by a data synchronization link; (b) after a failure event occurs, comprehensive optimum decision is performed on the main equipment and the standby equipment to determine whether to perform the main-standby switching; and (c) after the main-standby switching is determined, newly determined operational standby equipment initiatively reduces VRRP priority of the equipment according to the priority of a VRRP packet configured for opposite terminal equipment to perform the main-standby switching. The method helps fully utilize the message transmission capacity of the data synchronization link between the dual machines, and correlate the synchronous switching of the VRRP with the running state of the equipment, and the use of the automatic switching strategy list fully ensures the accuracy and reliability of the synchronous switching of the VRRP.

A synchronous regulation circuit is provided to improve the efficiency for an offline power converter. A secondary-side switching circuit is coupled to the output of the power converter to generate a synchronous signal and a pulse signal in response to an oscillation signal and a feedback signal. An isolation device transfers the synchronous signal from the secondary side to the primary side of the power converter. A primary-side switching circuit further receives the synchronous signal to generate a switching signal for soft switching a transformer. The pulse signal is utilized to control a synchronous switch for rectifying and regulating the power converter. The synchronous switch includes a power switch and a control circuit. The control circuit receives the pulse signal for turning on / off the power switch. The power switch is connected in between the transformer and the output of the power converter. In addition, a flyback switch is operated as a synchronous rectifier to freewheel the inductor current of the power converter. The flyback switch is turned on in response to the off of the power switch. The on time of flyback switch is correlated to the on time of the power switch.

In one implementation, an integrated group III-V power stage includes a control switch including a first group III-V transistor coupled to a sync switch including a second group III-V transistor. The integrated group III-V power stage may also include one or more driver stages, which may be fabricated in a group die or dies. The driver stage or driver stages, the control switch, and the sync switch may all be situated in a single semiconductor package.

A composite high voltage schottky rectifier is revealed that provides a forward voltage slightly larger than a low voltage schottky rectifier combined with a high voltage breakdown capability. The composite rectifier can be formed from the combination of a low voltage schottky rectifier, a high voltage mosfet, and a few small passive components. A quarter bridge primary switching network similar in some ways to a half bridge primary switching network is revealed. The quarter bridge network consists of four switches with voltage stress equal to half the line voltage and the network applies one quarter of the line voltage to a primary magnetic circuit element network thereby reducing the number of primary winding turns required to one quarter by comparison to a common full bridge network. A synchronously switched buck post regulator is revealed for multi-output forward converters. The synchronously switched buck post regulator accomplishes precise independent load regulation for each output and reduced magnetics volume by using a coupled inductor with a common core for all outputs plus a second smaller inductor for each output except the highest voltage output. An improved capacitor coupled floating gate drive circuit is revealed that provides an effective drive mechanism for a floating or high side switch without the use of level shifting circuits or magnetic coupling. The capacitor coupled floating gate drive circuit is an improvement over prior art capacitor coupled floating gate drive circuits in that the new circuit uses a positive current feedback mechanism to reject slowly changing voltage variations that cause unintentional switch state changes in prior art capacitor coupled floating gate drive circuits.

A circuit for transitioning between a discontinuous and a fixed frequency continuous conduction mode (DCM) and (CCM) of a power converter having a driver receiving PWM signals and controlling a switching stage comprises a control switch and a sync switch connected at a common switching node for driving a load. The circuit including a PWM modulator for providing PWM signals; and a mode selector for receiving a duty cycle value, a preset switching period, and a duty cycle at a critical conduction point having a switching frequency equal to the preset switching period and providing an on-time of the control switch and a switching period to the PWM modulator, wherein if the duty cycle value is greater than the duty cycle at a critical conduction point, the PWM modulator will drive will provide the PWM signals to operate the switching stage in the CCM with constant-frequency duty cycle control, and if the duty cycle value is less than duty cycle at a critical conduction point, the PWM modulator will drive will provide the PWM signals to operate the switching stage in the DCM by turning off the sync switch when a load current becomes negative.

The invention relates to a temperature conversion method and a low-power high-precision integrated temperature sensor. The low-power high-precision integrated temperature sensor is composed of a band gap reference circuit with a sensing core, a positive and negative synchronous switch capacitor integral circuit, a current source and a sampling capacitor dynamic element matching module, a clock generating circuit, a divider and buffer circuit and a fully differential analog-to-digital converter. The sensing core circuit in the traditional technology and the band gap reference circuit are combined and integrated, so that the circuit structure is simplified; the current source dynamic element matching module is arranged and thus a base-emitter junction voltage difference in proportion to the absolute temperature is generated, wherein the polarity of the voltage difference changes alternately; with the novel positive and negative synchronous switch capacitor integral circuit, the improved temperature conversion function is completed and the dynamic range utilization rate of the analog-to-digital converter is improved; dynamic element matching is carried out on the sampling capacitor, thereby improving the integral accuracy; and the analog-to-digital converter is used for carrying out quantization processing on an effective temperature signal to provide a digital output. Therefore, the temperature error and circuit power consumption of the sensor can be effectively reduced; and the method and the sensor are suitable for the low-power high-precision temperature sensing application.

An engine management and fuel delivery system allows an internal combustion engine to operate on liquid fuel such as gasoline, ethanol or a blend thereof, or compressed natural gas (CNG). A first set of fuel injectors is configured to deliver liquid fuel to the cylinders. A second set of fuel injectors is configured to deliver natural gas to the cylinders. An electronic controller is configured to generate fuel injection signals for one of the sets of injectors. An injector selector is configured to direct such fuel injection signals to either the first set of fuel injectors or the second set of fuel injectors based on a fuel type command. The fuel type command is indicative of a desired fuel type selected from either liquid fuel or CNG fuel. The fuel type command is synchronized in accordance with an engine crankshaft position signal in order to coordinate the switchover, for each one of the fuel injection signals, one by one, as each fuel injection event is completed.

A structured light 3D scanner consisting of a pattern projector; a digital imaging camera; and a controlling and processing circuitry is disclosed. Several novel variants of pattern projector are claimed. One embodiment comprises one or more transparent refractive pattern forming element, and two or more independently switchable light sources. Another embodiment comprises an array of light emitting diodes (LEDs), grown on the same semiconductor substrate, and an optical lens projecting the image formed by the said diode array.Sequential acquisition of video frames with synchronous switching between the light sources in the pattern projector produces a sequence of images obtained under different illumination patterns. Processing these images produces a sequence of 3D scans of the scene.

The invention provides a method and system for operating a switch, in which incoming data cells are converted from parallel to serial for synchronous input to a switch interconnect, converted from serial to parallel for parallel switching, converted from parallel to serial for synchronous output from the switch interconnect, and converted from serial to parallel for output. The switch interconnect and its input and output interfaces are controlled by a single frequency source, so that all serial data communication paths into and out of the switch interconnect are phase synchronized to within one clock cycle. A single frequency source for the switch system is coupled to the input interfaces, to output interfaces, and to the switch interconnect. The input interfaces each include a PLL which synchronizes to the single frequency source once for all serial communication to the switch interconnect. The switch interconnect includes one PLL for each input interface which synchronizes to the serial input from that input interface, and one PLL for each output interface which synchronizes to the single frequency source once for all serial communication to the output interface. Similarly, the output interfaces each include a PLL which synchronizes to the serial output from the switch interconnect. The switch interconnect is coupled to the single frequency source and operates in phase therewith.

In addition to an output voltage control loop, a dead-time optimization loop is provided for a digital synchronous switching converter to dynamically adjust the dead-time for the power switches of the converter. It is extracted a minimal feedback signal at a steady state while the output voltage remains under a specification, and a maximal efficiency of the digital synchronous switching converter is thus obtained.

A series battery charger with the function of separate detection, and more particularly a series circuit for detecting the battery charging process and for conducting a series combined discharging process on the same battery charger. The present invention provides a circuit structure capable of selectively switching to an “separate detection charging and series combined discharging mode” and a “synchronous switching control charging and discharging mode” by a synchronous changeover switch module in conjunction with charging circuits. In this way, the stored electric energy can be released for use by the series-connected separate detection charging circuits. Moreover, the charger can deliver 5V power via the standard USB interface to the 3C electronic products for the charging purpose. Meanwhile, the problems of conventional AA or AAA battery chargers and lithium batteries designed as a portable power are overcome, thereby enhancing the effect and safety of the charger.

A synchronous switching regulator controller incorporates a switch detection circuit to determine the presence or absence of a power switch at the output of a switch driver so that the switch driver can be disabled when it is left unused. In one embodiment, the synchronous controller includes a switch detection circuit receiving a power cycle signal and the PWM ramp clock signal and measuring a voltage at an output node of the switch driver. The switch detection circuit provides a driver enable signal in response to the assertion of the power cycle signal. The driver enable signal has a first logical state when the voltage at the output node of the switch driver is greater than a reference voltage and a second logical state when the voltage at the output node is less than a reference voltage. The switch driver can be disabled based on the driver enable signal.

A switching power supply; wherein a voltage detector is provided at the output of a power supply circuit and connected to the negative input of an error amplifier to amplify the error between detected voltage and reference voltage, the output of said amplifier is connected to the negative input of a first comparator and to the negative input of a second comparator through split resistors, a filter circuit is connected between a control switch and synchronous switch and the output of said filter circuit is connected to a first comparator and a second comparator, wherein said configuration constitues a control means to control the amplitude of the triangular waveform obtained through said filter circuit to be between an input level of said first comparator and an input of said second comparator, whereby the stability of the switching power supply is ensured without lowering the frequency band of said amplified error signal and stable output ripple characteristics can be materialized.

The invention discloses a synchronous rectification switching power supply and a control method thereof. The synchronous rectification switching power supply comprises a transformer, a main switching tube, a synchronous switching tube and an output capacitor, wherein the transformer comprises a primary winding and a secondary winding; the main switching tube is connected with the primary winding in series, and switches on and off periodically, so that the primary winding transmits energy to the secondary winding; the synchronous switching tube is connected with the secondary winding in series, and switches on and off according to a same period with the main switching tube; a first end of the output capacitor is connected with the secondary winding, and a second end of the same is connected with the synchronous switching tube; the primary winding of the transformer is connected with an input voltage, the secondary winding of the transformer powers the output capacitor, so that an output voltage is generated on the output capacitor, when in light or idle run, a main current path of the synchronous switching tube is switched off, and a switch-on state of the synchronous switching tube is maintained depending on a parasitic diode. According to the synchronous rectification switching power supply, power consumption in light run can be reduced.

The invention discloses a piezoelectric energy recovery device for recovering vibrational energy, which comprises an energy recovery unit, a system interface circuit unit and an energy storage unit, wherein the energy recovery unit comprises a piezoelectric energy unit and a piezoelectric sensing unit, the piezoelectric energy unit comprises at least one first piezoelectric element adhered to the structural surface, the piezoelectric sensing unit comprises at least one second piezoelectric element adhered to the structural surface, and the system interface circuit unit comprises an ESSH interface circuit unit, an extreme value detection unit, an initial charging circuit unit and a power supply management unit. Compared with the prior piezoelectric energy recoverer, the piezoelectric energy recovery device adopts an ESSH technique in an interface circuit, overcomes the defect that the recovery power changes along with load changes in the prior method of connecting synchronous switch inductors in series, has low power consumption, not only can recover energy in the environment with high vibration level but also can effectively recover energy in the environment with low vibration level, and has broad application prospect in recovering the vibrational energy.

Integrated circuit output buffers include pull-down an pull-up circuits and a control circuit that utilizes a preferred feedback circuit to facilitate a reduction in simultaneous-switching noise during pull-down and pull-up operations and also improve the impedance matching characteristics of the output buffers during DC conditions. The preferred feedback circuit also limits the degree to which external noise can influence operation of the control circuit. Each of the pull-down and pull-up circuits may comprise a respective pair of primary and secondary transistors. The pull-down circuit is preferably configured so that the primary and secondary pull-down transistors (e.g., NMOS transistors) are electrically coupled to an output signal line (through an ESD protection resistor) and a first reference signal line (e.g., Vss). The control circuit is designed to activate the pull-down circuit by turning on both the primary and secondary pull-down transistors during a leading portion of the pull-down time interval and by turning off the secondary pull-down transistor during a trailing portion of the pull-down time interval using a first feedback switch that is electrically coupled in series between the output signal line and a gate electrode of the secondary pull-down transistor so that a signal representing a potential of said output signal line can be passed through the first feedback switch to the gate electrode of the secondary pull-down transistor.

A switching power supply; wherein a voltage detector is provided at the output of a power supply circuit and connected to the negative input of an error amplifier to amplify the error between detected voltage and reference voltage, the output of said amplifier is connected to the negative input of a first comparator and to the negative input of a second comparator through split resistors, a filter circuit is connected between a control switch and synchronous switch and the output of said filter circuit is connected to a first comparator and a second comparator, wherein said configuration constitues a control means to control the amplitude of the triangular waveform obtained through said filter circuit to be between an input level of said first comparator and an input of said second comparator, whereby the stability of the switching power supply is ensured without lowering the frequency band of said amplified error signal and stable output ripple characteristics can be materialized.

A synchronous switching voltage converter has a first switch, a second switch, and an inductor, coupled together to a switch node. A reverse current preventing circuit has a fixed reference current source, a correcting circuit, a variable reference current generating circuit, and a comparing circuit. Based on a comparison between an inductor current and the fixed reference current source, the correcting circuit generates a correcting signal. The variable reference current generating circuit generates a variable reference current signal, which is adjusted in accordance with the correcting signal. Based on a comparison between the inductor current and the variable reference current signal, the comparing circuit applies a preventing signal to the second switch so as to turn off the second switch.

The invention discloses a power supply circuit for an automobile. The power supply circuit comprises a storage battery (1), a total switch (2) and a following circuit (6), wherein a charging circuit (3), a rechargeable auxiliary power supply circuit (4) and a synchronous switch (5) are connected in series between the total switch (2) and the following circuit (6); the charging circuit (3) is usedfor charging the rechargeable auxiliary power supply circuit (4) by using the storage battery (1); the rechargeable auxiliary power supply circuit (4) is applied to the following circuit (6) by usingthe storage battery (1) when end voltage falls at the starting moment of a starting motor of the automobile so as to ensure normal working voltage of the following circuit (6); the synchronous switch(5) is used for making the rechargeable auxiliary power supply circuit (4) perform power supply and power cutoff synchronously on the following circuit (6) when the total switch (2) is switched on and off. By adopting the power supply circuit, large current is continuously absorbed for the storage battery at the start of an automobile engine, so that an electrical appliance participating in startup is under normal working voltage.

Output switch noise resulting from simultaneous switching is reduced by time multiplexing the output switching operation. A plurality of phase-shifted clock signals are generated such that each of the phase-shifted clock signals exhibits an active (e.g., rising) edge during a single period of the reference clock signal. Different groups of input / output blocks are switched in response to the various phase-shifted clock signals, such that output switching occurs at various times during the period of the reference clock signal. The phase-shifted clock signals can be generated with predetermined phase differences or with dynamically determined phase differences.