48 results about "Serial transfer" patented technology

High Bandwidth IJTAG Through High Speed Parallel Bus A system in a circuit comprises: a first network (710) configurable to transmit data in parallel in the circuit, the first network (710) comprising circuit block interface devices, each of the circuit block interface devices being coupled to ports of one of circuit blocks in the circuit; a plurality of second networks (720, 725, 727), each of the plurality of second networks (720, 725, 727) configurable to transmit data in serial in one of the circuit blocks in the circuit; a third network (730) configurable to transmit data in serial in the circuit when being coupled to the plurality of second networks (720, 725, 727); and a plurality of network switching interface devices (740, 745, 747), each of the plurality of network switching interface devices (740, 745, 747) configurable to couple either the first network (710) or the third network (730) to one of the plurality of second networks (720, 725, 727) based on a control signal stored in the each of the plurality of interface devices (740, 745, 747).

The invention discloses a microwave measurement and control device, and relates to the technical field of particle acceleration. The antenna comprises a backboard, a radio frequency unit and a tuning unit. The backboard is provided with a high-speed serial transmission channel; the radio frequency unit is connected with the backboard to collect radio frequency field state data of the accelerator cavity; the tuning unit is connected with the backboard to output a driving signal to adjust the resonant frequency of the cavity. Wherein the radio frequency unit and the tuning unit establish a direct connection link through a high-speed serial transmission channel, and the tuning unit cooperatively adjusts the resonant frequency of the cavity according to radio frequency field state data. A traditional CPCI architecture is optimized through the backboard, the high-speed serial transmission channel comprises the first communication channel, radio frequency field state data does not need to be transferred and is directly transmitted to the tuning unit through the high-broadband and high-performance first communication channel, the problems of large transmission delay and cooperative lagging caused by bandwidth sharing of an existing CPCI architecture are effectively solved, and the communication performance of the CPCI architecture is improved. Tuning can be rapidly carried out through closed-loop control, and the stability of the accelerator beam is remarkably improved.

This invention discloses an in-vehicle video redundancy system. The system includes: an intelligent driving acquisition device for acquiring multiple video streams transmitted in parallel by a target vehicle under different vehicle states; an in-vehicle serializer for converting the parallel-transmitted multiple video streams into serial transmission; an in-vehicle dual-channel deserializer for converting the serially transmitted multiple video streams into target multiple video streams transmitted in parallel, and synchronously transmitting the target multiple video streams to an intelligent driving driving SOC chip and an intelligent driving parking SOC chip respectively; the intelligent driving driving SOC chip and the intelligent driving parking SOC chip are used to process the target multiple video streams according to the vehicle state of the target vehicle and the video stream type of the target multiple video streams, store the processed target multiple video streams, and display them on a display screen. This invention considers the redundancy design and safety backup control of the acquisition device, solving the problem of intelligent driving function loss due to the failure of one SOC, and ensuring the safety of the driver and passengers.

The invention discloses an improved low-peak-to-average-ratio imitation radio frequency division multiplexing signal transmission method based on a chaotic sequence. Acquiring a signal to be transmitted, and performing serial-parallel processing on the signal to be transmitted to obtain a plurality of subcarriers of the signal to be transmitted; generating an initial chaotic sequence, and mapping the initial chaotic sequence to generate a random phase sequence vector; performing modulation processing on the plurality of subcarriers based on the random phase sequence to obtain a candidate transmission signal group; selecting a signal with the minimum signal peak-to-average ratio from the candidate transmission signal group as a second signal to be transmitted; adding a linear frequency modulation period prefix to the second signal to be transmitted, and performing parallel-serial conversion processing to obtain a first serial transmission signal; and transmitting the first serial transmission signal to a doubly selective channel to obtain a receiving end signal. The transmission method has the characteristic of high spectrum utilization rate.

The utility model belongs to the technical field of vehicle-mounted 4D millimeter wave radars, and particularly discloses a vehicle-mounted 4D millimeter wave radar data acquisition circuit, which comprises an MMIC millimeter wave radio frequency chip and an FPGA chip. The MMIC millimeter wave radio frequency chip is electrically connected with the plurality of 4D millimeter wave receiving antennas and the plurality of 4D millimeter wave transmitting antennas; the MMIC millimeter wave radio frequency chip is electrically connected with the FPGA chip; one path of output of the FPGA chip is electrically connected with the radar signal processing chip, and the other path of output of the FPGA chip is electrically connected with the serial chip. According to the utility model, the FPGA chip is adopted to carry out one-to-two MIPI processing on an MIPI signal of the MMIC millimeter wave radio frequency chip, one path is transmitted to the radar signal processing chip SOC, the other path is provided for the serial chip Serdes to carry out serial transmission on the MIPI signal, and the transmission distance can reach more than 15 meters, so that a radar data algorithm processing function is realized, real-time acquisition is also carried out, and the real-time acquisition is realized. And transmitting to a far end for storage.

The invention discloses a parallel remote upgrading method based on expressway port communication, and belongs to the field of avionics. The method is based on an upper computer, a loading board and a loaded board, wherein the loading board is realized based on an FPGA (Field Programmable Gate Array). The upper computer communicates with the loading plate through a high-speed port, the loading plate communicates with the loaded plates through various serial interfaces, the upper computer can read upgrading files of the loaded plates at the same time and then send the upgrading files to the loading plate in a subpackage mode, and the loading plate receives the upgrading files and caches the upgrading files to different DDR spaces. And when the loading board detects that a certain upgrading file is cached, the upgrading file in the DDR space is read in a segmented manner, and serial transmission upgrading is carried out on the board card main control chip. Due to the fact that the communication bandwidth of the high-speed port is far larger than the bandwidth of the serial port, the upper computer can quickly complete transmission of a plurality of upgrading files to the loading board DDR, the upgrading process of a plurality of loaded boards is started in sequence, and the parallel upgrading effect is presented.

To provide a semiconductor device having a self-detection function which is capable of detecting abnormality of a serial data value after format conversion from parallel data to serial data.SOLUTION: A semiconductor device includes: a parallel-serial conversion circuit 13 having parallel data input 25 and parallel data output 23, the parallel-serial conversion circuit 13 configured to generate a serial data signal including each data value in a set of serial data converted from a set of parallel data in a parallel data signal received with the parallel data input 25 and to provide the serial data signal to the parallel data output 23; a regeneration circuit 15 configured to generate a regeneration signal indicating a set of regenerated parallel data from the serial data signal from the parallel data output 23; and a determination circuit 17 for determining match / mismatch between at least a part of the regeneration signal and at least a part of the set of parallel data signals.SELECTED DRAWING: Figure 1

The invention discloses a readout circuit for time-sharing readout quantization, an analog-to-digital converter and electronic equipment, and relates to the field of integrated circuits. Comprising a plurality of sampling units and a plurality of quantization units which are arranged in a column-level circuit. Each sampling unit in the plurality of sampling units is connected with each wide row in the pixel array in a one-to-one correspondence manner; each column in the column-level circuit is correspondingly provided with a quantization unit and a plurality of sampling units, and the number of the sampling units correspondingly arranged in each column is the same as the row number in the wide row; wherein in each wide row time, pixel signals of each row corresponding to a wide row on a column are read into the sampling unit of the column in a time-sharing manner, and then the quantization unit arranged in the column is used for quantization in the next quantization time. According to the invention, serial transfer of a plurality of analog voltages and parallel conversion of the analog-to-digital converter are adopted, so that the quantization time of each row is greatly extended, the condition that the quantization time is limited is well relieved, and the purpose that the infrared detector completes high-speed accurate reading with relatively low power consumption is achieved.

The embodiment of the invention provides a full-matrix lamp string system and method and a control circuit of a functional device, a lamp string comprises a controller, a plurality of light-emitting units, a main circuit and M branches, M is greater than or equal to 2, the main circuit is connected with the controller and supplies power to at least one branch, any branch is provided with at least one light-emitting unit, and M is greater than or equal to 2. The M branches comprise a first branch and a second branch; the controller is used for outputting a serial data packet, the serial data packet sent by the controller is input to the first branch, and an output signal of at least one light-emitting unit in the first branch serves as an input signal of the head-end light-emitting unit in the second branch. According to the embodiment of the invention, the light-emitting units in the branches can transmit the control data in series, the control data can be transmitted between the branches in series, the light-emitting units of the lamp string can extract data streams belonging to the light-emitting units, and independent control of the light-emitting units in the lamp string can be realized without an address code and a hub.

The application relates to the technical field of lamp effect control, and discloses an A- RGB lamp effect control method and device, the method comprising the following steps: sending device query instructions to an external A- RGB device connected with a first channel and a second channel in sequence, receiving response codes returned by the external A- RGB device, and comparing the response codes with brand protocol characteristic codes stored in a flash in byte by byte, so as to obtain serial transmission code stream data; configuring a first PDMA channel and a second PDMA channel to read the serial transmission code stream data from the first channel and the second channel respectively, and outputting parallel lamp effect data of a double-path 1-wire port; calculating a timestamp difference value based on the parallel lamp effect data, and starting a delay timer to delay the PDMA enabling operation of a channel with an earlier timestamp when the timestamp difference value exceeds a preset synchronization threshold value, so that the application realizes synchronous lamp effect output of double-path channel timestamp alignment, and solves the problem of lamp effect asynchronization caused by conversion time difference of cross-brand device protocols.

The invention belongs to the technical field of distribution network operation, and particularly relates to a power distribution network load transfer method. Comprising the following steps: presetting a load transfer condition, and obtaining distribution network operation data; according to a preset load transfer condition, screening the line standing book table and the inter-line contact relation table, and forming a network topology table; based on the network topology table, single radiation lines are removed, and an undirected graph is generated with the lines as nodes and connection between the lines as edges; dividing the undirected graph into a plurality of connected sub-graphs, generating a set of all wheeling modes of each connected sub-graph, and calculating an optimal wheeling mode and a global optimal series supply mode of each connected sub-graph; and if the preset load transfer condition contains the back-carrying bus, calculating a global optimal transfer mode of the back-carrying bus on the basis of the global optimal series supply mode.

The invention provides a high-robustness high-speed serial transmission data sampling method, which is used for solving the technical problem that a sampling point is not an optimal sampling point or even an error sampling point when the existing high-speed serial transmission data is sampled. According to the high-robustness high-speed serial transmission data sampling method provided by the invention, the delay range of the delay module is fully utilized, all delay tap numbers of the delay module are traversed to obtain n + 1 indication bits, then the n + 1 indication bits are traversed to determine the maximum number of continuous 1 and the end position of the maximum continuous 1, and finally, the number of the continuous 1 is determined. The optimal sampling point in the maximum effective sampling window is found through parity, the optimal delay tap number needed by phase alignment is obtained, the sampling method is simple and efficient, the alignment precision is high, and high robustness of data transmission is guaranteed.

The invention discloses a data transmission system and method based on an off-chip internet, and relates to the technical field of data transmission outside a chip. The data transmission system based on the off-chip internet comprises a data sending chip, a data receiving chip and the off-chip internet, the data sending chip is used for sending data to the off-chip internet; the off-chip internet is used for generating a packet header and representation information corresponding to each piece of data; a protocol message is generated according to the data, the packet header and the representation information, and the protocol message is sent to the data receiving chip; the representation information comprises the length of the corresponding data and the offset of the address of the corresponding data relative to the address of the protocol message. According to the invention, data serial transmission resources of the off-chip internet can be saved, the transmission utilization rate is improved, the overall performance of the system is improved, and bandwidth waste caused by transmission of non-data messages by a serial transmission channel is greatly reduced.

A tool holder (200) is attached to a machine tool body (100) and is capable of holding a tool. The tool holder (200) comprises: a sensor and / or an actuator (381); a substrate (410) having mounted thereon an electronic circuit (721) capable of converting an electrical signal from the sensor and / or the actuator (381) into a digital signal that can be serially transmitted; a serial terminal (220A) that forms an electrical contact with the machine tool body (100) and is for performing serial transmission of the digital signal; and a power supply terminal (220B) that forms an electrical contact with the machine tool body (100) and is for supplying power to the sensor and / or the actuator (381).

A filecoin cluster data transmission method and system based on RDMA, including: providing a RDMA interface; receiving and encapsulating sector data by a first node, invoking the RDMA interface to transmit the sector data, serially transmitting the sector data to a next encapsulation node; when receiving the sector data from a previous node, invoking the RDMA interface to directly transmit the sector data to a user mode memory of the node for encapsulation; invoking the RDMA interface to serially transmit the sector data back to the HCA card, and transmitting the sector data to a next node; receiving, by a last node, the sector data, invoking the RDMA interface to directly transmit the sector data to the user mode memory of the last node; invoking the RDMA interface to serially transmit the sector data back to the HCA card of the last node, and transmitting the sector data to distributed storage.

Systems and methods for using memory-mapped memories in a microcontroller-based instrument are provided herein. The method includes operating the microcontroller-based instrument using a complex application or protocol and operating a highly integrated, low-power microcontroller unit (MCU). The MCU is configured to use memory mapping for accessing at least one off-MCU memory connected to the MCU by at least one interface. The MCU's memory-mapping configuration enables the off-MCU memory(ies) to behave as an extension of at least one on-MCU memory that is connected directly to the CPU to effectively extend a range of the at least one on-MCU memory, wherein the effective extended range of the at least one on-MCU memory enables the microcontroller-based instrument to utilize the complex application or protocol. The method further includes writing addresses and / or data to and / or reading addresses and / or data from the off-MCU memory using serial transmission during a memory mapped transaction.

This provides an auxiliary circuit for serial transmission and reception that stably receives signals from the received data line. [Solution] In the master device 101, the user circuit 301 operates with the system clock CLK and communicates with an external slave device via the synchronous serial bus transmit / receive circuit 302. The received data delay circuit 303 further delays the received data synchronized by the synchronization circuit 304 in units of the system clock using a shift register, and outputs one of the signals of the shift register via the selector 308 based on RXSEL specified by the user circuit. The synchronization circuit 304 synchronizes the received data RX input from outside the master device with the system clock. The synchronous serial bus transmit / receive circuit 302 serializes TXpara using the serialization circuit 305, synchronizes it with the transfer clock, and outputs the signal RXd received with the transfer clock by deserializing it using the deserialization circuit 306.

A method for near field communication with a serial transmission microcontroller and an NFC tag device using the same are provided in the present invention. The method includes: providing a serial interface microcontroller; capturing an NFC carrier signal from an NFC LC resonant circuit; performing a frequency division to the NFC carrier signal to obtain a NFC clock signal; filtering the NFC carrier signal from the NFC LC resonant circuit to obtain an envelope signal; sequentially receiving a digital sequence of the envelope signal according to triggering of the NFC clock signal based on a serial transmission protocol; and decoding an NFC data from the digital sequence based on an NFC transmission protocol rule.

The invention relates, inter alia, to a measurement data transmission device for transmitting measurement data from at least two measuring tools to an evaluation unit, wherein the measurement data transmission device has a communication device, wherein the communication device is designed and configured to communicate wirelessly with the measuring tools and to communicate with the evaluation unit by cable, in particular via USB, wherein the measurement data transmission device is designed and configured to receive measurement data from at least one of the measuring tools by means of the communication device and to transmit received measurement data serially to the evaluation unit by means of the communication device, which is further developed in that the measurement data transmission device has a mass storage device for storing configuration files, wherein the measurement data transmission device is designed and configured,to read out and process at least one configuration file stored in the mass storage device with communication settings stored therein, wherein the communication device is designed and configured to receive measurement data from at least one of the measuring tools according to the communication settings and / or to transmit received measurement data serially to the evaluation unit.

The application provides a parallel-serial conversion circuit, comprising an output clock generation circuit and an output circuit, the output clock generation circuit is used for outputting N output signals and N inverted output signals, the output signals and the inverted output signals are inverse signals of each other, the N output signals are sequentially delayed by one clock cycle, the N inverted output signals are sequentially delayed by one clock cycle, N is a natural number greater than 0, the output circuit is connected with the output clock generation circuit, used for receiving N parallel transmission transmission data, the N output signals and the N inverted output signals, sequentially outputting the N transmission data according to the N output signals and the N inverted output signals, so as to convert the N parallel transmission transmission data into N serial transmission transmission data, without a selector, reducing the number of flip-flop flips, thereby reducing power consumption and reducing the occupied area.

The embodiment of the present disclosure provides a data transmission method, system and chip. The method is used for a target master network node in a master network of a data transmission system. A sub-network of the data transmission system comprises a plurality of sub-network nodes connected to each other. One of the plurality of sub-network nodes is connected to the target master network node. The method comprises the following steps: sending a first synchronization signal to the sub-network; at least one target sub-network node in the plurality of sub-network nodes of the sub-network and located in a predetermined serial transmission path performs sampling time delay based on the first synchronization signal, so that the plurality of target sub-network nodes in the serial transmission path are aligned in sampling time; receiving a first data frame from the sub-network. In the first data frame, acoustic data read by the plurality of target sub-network nodes in the serial transmission path and aligned in sampling time at the same target sampling time is included; and transmitting the acoustic data to a processing unit connected to the master network.

The present invention belongs to the technical field of coal mine excavation and transportation equipment, and is specifically a multi-stage serial transfer device. The invention solves the problem that existing transfer machines are inconvenient in mining operations and it is difficult for the transfer machine to maintain an appropriate distance from the excavation mechanism in real time for transfer operations. The invention comprises multiple groups of transfer mechanism units that can move on their own; a unit workshop docking sensor and a unit workshop distance sensor are set at the docking position of two adjacent groups of transfer mechanism units; a single vehicle and roadway side distance measuring device is set on both sides of the transfer mechanism unit; the tail of the transfer mechanism unit is connected to the transfer belt, and a discharge position measuring device is set at the connection part; the transfer mechanism unit is provided with a conveying volume monitoring device; the distance sensor, the unit workshop docking sensor, the unit workshop distance sensor, the single vehicle and roadway side distance measuring device, the discharge position measuring device, and the conveying volume monitoring device are respectively connected to a data acquisition device.

To provide a novel phase control method and a phase-controllable modulator that can achieve highly accurate phase control of a baseband signal using a relatively slow multiplier.SOLUTION: A modulator (10) that multiplies a baseband signal by a carrier signal includes a first converter (101) that converts serial carrier data into first parallel data, a plurality of multipliers (M1-MN) that sequentially multiply each of the first parallel data by the baseband signal, a second converter (103) that converts second parallel data output from each of the plurality of multipliers into serial transmission data, and a timing selector (104) that selects from the plurality of multipliers a multiplier that starts multiplication of the baseband signal in accordance with a phase control signal.SELECTED DRAWING: Figure 1

The invention relates to a chip wafer level multi-chip simultaneous test circuit, system and method, and the circuit comprises a main chip which is configured to respond to a first signal, and carries out the detection operation of a storage unit through a multiplexer and an internal bus; and responding to the second signal, sequentially transmitting the second signal to each slave chip through off-chip wiring or a first multiplexer, receiving test results of one or more slave chips, integrating the test results, and serially transmitting the test results to the test board for sampling, and the plurality of slave chips are connected in series through off-chip wiring and configured to respond to the second signal, synchronously perform detection operation of the storage unit in a preset period, integrate a detection result step by step through the second multiplexer and the off-chip wiring and return the detection result to the main chip. According to the invention, through off-chip wiring and a small number of logic gates, simultaneous testing of multiple chips at a wafer level is realized, and the testing cost is saved.

The application provides a map matching design method, a matching method and a system based on a SylixOS operating system, and solves the technical problem that the real-time performance of the existing map matching cannot fully utilize the real-time performance of the operating system. The method comprises the following steps: in the map matching process, a main thread is set, which is used for responding to a map matching request of a hard interrupt; a serial port thread is set, which is used for responding to a data bidirectional serial transmission request of a first soft interrupt; a search thread is set, which is used for responding to a map database search request of a second soft interrupt; a matching thread is set, which is used for responding to a curve matching map matching request of a third soft interrupt; and data synchronization and / or data sharing are performed among the serial port thread, the search thread and the matching thread according to a synchronization semaphore. The real-time high-frequency response of a positioning data request of an external inertial device through a serial port, the map database search efficiency and the curve matching map matching accuracy are ensured.

The present invention discloses a controller that utilizes a serial-to-serial method to increase the speed of serial communication. The controller belongs to the field of devices related to input and output circuits and includes a clock generation unit and a signal temporary storage unit. The clock generation unit converts the original clock signal and the high-speed clock signal transmitted via the chip select data line into the required high-speed and low-speed clock signals, respectively. The signal temporary storage unit is divided into a low-speed write storage unit and a high-speed read storage unit. The present invention achieves the function of increasing the serial transmission speed by controlling the low-speed write storage unit and the high-speed read storage unit differently through such a scheme. By using two-level registers and gate circuit control, the time of controlling the switch is greatly saved. In particular, when used in the actual application of serial chips with speed limits, the controller can significantly increase the transmission speed.

Rapid-data-transfer sensor arrays include a controller and a plurality of sensor integrated circuits (ICs) connected in series and configured to periodically take measurements and provide measurement data to the controller as serial data. The sensor IC includes a power regulation circuit configured to selectively supply power for a low-power mode and an active mode for recording data and an internal shift register. When finished with the measurement, the sensor IC is configured to provide measurement data to the shift register for transfer to the controller. The controller is configured to initiate serial transfer of data from each of the shift registers of the first plurality of sensor ICs to the controller. Switching functionality provides the capability to switch sensors or sensor ICs from one operational mode to another, e.g., from a rapid serial data out (RDSO) mode to an SPI mode.

The present invention discloses a frame data receiving method based on serial transmission of frame data. The method includes collecting different information of a data transmission system for training, automatically marking all serial transmission frame data byte lengths in the different information of the data transmission system using a random forest algorithm to obtain an average data flow of serial transmission reception for training; using a random forest algorithm to perform data collection based on a serial transmission frame data byte length receiving process; setting algorithm parameters and abnormal frame data reception prompts for abnormal serial transmission frame data byte lengths through a management operation front end based on a 5G signal; sending each frame of serial transmission frame data monitoring flow collected by serial transmission frame data monitoring into a serial transmission frame data byte length monitoring model to obtain a monitoring result of the serial transmission frame data byte length; and tracing the monitored serial transmission frame data byte length. The present invention is used to accurately and efficiently monitor the byte length information of serial transmission frame data.

The invention provides a cascade chip with a serial cascade communication interface and a serial transmission component thereof, comprising the serial cascade communication interface which comprises a serial data input interface for receiving an input signal and a clock signal input interface, the serial data output interface and the clock signal output interface are used for providing output signals and are connected to a next cascade chip, and a chip selection signal interface is omitted. According to the cascade chip with the serial cascade communication interface, aiming at the application of a high polling rate of a keyboard, the double-line cascade serial cascade communication interface is introduced, a chip selection signal is not needed, the characteristics of automatic time sequence optimization and low delay are realized through a buffer transmission mode and a straight-through transmission mode, and wiring is concise and flexible, transmission is efficient and safe, and power consumption is low.

A tool holder and a jig that can achieve high reliability and miniaturization of the tool holder or jig in electrical use in the tool holder or jig. [Solution] A tool holder (200) is attached to a machine tool body (100) and is capable of holding a tool. The tool holder (200) includes a sensor and / or actuator (381), a substrate (410) on which is mounted an electronic circuit (721) capable of converting an electrical signal from the sensor and / or actuator (381) into a digital signal that can be serially transmitted, a serial terminal (220A) that makes electrical contact with the machine tool body (100) and transmits the digital signal serially, and a power supply terminal (220B) that makes electrical contact with the machine tool body (100) and supplies power to the sensor and / or actuator (381).