1141 results about "Signal integrity" patented technology

The invention discloses a communication transceiving method and system for adaptive frequency hopping filtering, and relates to the technical field of communication. According to the method, the channel state is monitored in real time, the adaptive frequency hopping algorithm and the machine learning technology are adopted, the adaptability and the intelligent level of a communication system in a complex electromagnetic environment are improved, interference is effectively avoided, meanwhile, the antenna space constraint and the optimization algorithm are considered, the optimal antenna design parameters are calculated, the transmitting power control precision is improved, and the system performance is improved. The signal transmission efficiency and the communication quality are improved, the signal transmission quality and the system anti-interference capability are improved by dynamically adjusting the transmission power and the receiving end signal integrity keeping algorithm, the data accuracy and integrity are ensured, and the communication reliability and stability are enhanced.

The invention relates to a multi-channel signal integrity optimization method and system for a passive copper cable, and the method comprises the steps: obtaining channel characteristic parameters and signal transmission requirements of the passive copper cable, and carrying out the impedance matching, and obtaining an optimized transmission channel; acquiring real-time transmission data of the passive copper cable, and performing equalization processing on the real-time transmission data through the optimized transmission channel to obtain a stable transmission signal; acquiring crosstalk interference data acquired by the passive copper cable, and carrying out shielding analysis on the crosstalk interference data and the optimized transmission channel to obtain a crosstalk suppression measure; performing frequency characteristic analysis on the crosstalk interference data to obtain frequency compensation information, and performing transmission prediction on the frequency compensation information based on the crosstalk suppression measure to obtain a frequency compensation parameter; and performing multi-channel optimization on the initial signal optimization result according to the frequency compensation parameter to obtain a multi-channel optimization signal. According to the invention, complex and changeable transmission environments can be coped, and stable transmission of signals is ensured.

The invention discloses a self-adaptive impedance matching method for a high-frequency signal transmission connector of a new energy vehicle, and relates to the technical field of signal processing, and the method comprises the steps: 1, obtaining the physical parameters of the high-frequency signal transmission connector of the new energy vehicle; calculating an electromagnetic field feature vector, and calculating a transmission line distribution vector of the high-frequency signal transmission connector; 2, calculating a propagation constant of a high-frequency signal transmission connector of the new energy vehicle; calculating the characteristic impedance of a high-frequency signal transmission connector of the new energy vehicle; 3, calculating a reflection coefficient; calculating an impedance error; step 4, calculating a compensation parameter vector, and generating a control signal by using an adaptive control theory according to the compensation parameter vector; and calculating the impedance matching degree according to the control signal. According to the invention, impedance change in a complex environment can be accurately dealt with, signal reflection and energy loss are significantly reduced, and transmission efficiency and signal integrity are improved.

The invention relates to the technical field of gallium nitride gate drivers, and discloses a design method and system of a gallium nitride gate driver, and the method comprises the steps: carrying out the working signal collection of the gallium nitride gate driver, obtaining original waveform sampling data, and building a signal integrity model under the action of electromagnetic interference; separating the original waveform sampling data into an effective driving signal, a low-frequency interference signal and a high-frequency noise signal, and extracting characteristic parameters to obtain a signal characteristic parameter set; switching time and circuit power consumption are set as optimization variables, constraint conditions are set according to the signal integrity model, and an optimization objective function is obtained; performing online identification and optimization calculation on the driving parameters to obtain a driving control parameter sequence; according to the method, the adaptive capacity of the driver to the change of the working condition is improved, and meanwhile, the stability and the reliability of the driving waveform are ensured.

The invention relates to a modeling and optimizing method for inter-layer signal crosstalk of a PCB (Printed Circuit Board). Frequency response data of all dielectric layers of the PCB under different temperature and humidity conditions are collected, and a mapping model with the temperature gradient and the humidity diffusion gradient as input and the dielectric constant as output is established. And calculating the dynamic distribution of mutual capacitance and mutual inductance under the environment change by combining the spatial layout parameters of the differential signal pair, and constructing a crosstalk sensitivity evaluation model with coupled frequency, environment and layout. And high-risk areas with crosstalk sensitivity caused by environment change are identified, and the crosstalk change rate of each area is quantified. For a sensitive area, a temperature and humidity compensation medium structure is introduced to stabilize local dielectric characteristics and reduce the influence of the environment on crosstalk. And according to the compensated medium distribution, adjusting a differential signal wiring path and impedance matching by adopting an optimization method with the aim of minimizing the crosstalk change rate, and generating a wiring layout with environmental robustness. According to the invention, the signal integrity and the transmission reliability of the multi-layer PCB in a temperature and humidity changing environment can be effectively improved.

The invention relates to the technical field of anti-interference, in particular to a communication signal interference elimination method and system, and the method comprises the following steps: obtaining communication signal time domain data, calculating a signal energy change rate, a signal abrupt change rate and a phase drift rate, marking and distinguishing a signal region according to a calculation result, and obtaining a communication signal non-stationary interval identification result. According to the method, the time domain data of the communication signal is subjected to fine-grained calculation, and the signal energy change rate, the signal abrupt change rate and the phase drift rate are extracted, so that accurate signal region distinguishing is realized, the regression modeling parameter range is adjusted, the influence of instantaneous data of an abrupt change region is reduced, and the stability of signal reconstruction is improved; according to the method, signal-to-noise ratio calculation and interference power fluctuation amplitude evaluation are combined, channel state parameters are dynamically adjusted, interference intensity evaluation is more accurate, the filtering step length, the weight coefficient and the gain coefficient are optimized based on error information, signal processing adapts to different types of interference, and integrity and stability of communication signals are enhanced.

The invention relates to the technical field of brain-computer interfaces, in particular to a method, a device and equipment for detecting the cognitive state of attention glasses in real time. The method comprises the following steps: acquiring multi-channel electroencephalogram data of attention glasses, acquiring multi-dimensional features corresponding to the multi-channel electroencephalogram data, and generating a detection sequence; performing time sequence analysis on the detection sequence, extracting change characteristics to construct a cognitive sequence, and generating state description according to the cognitive sequence; performing trend analysis on the state description, performing feature extraction on an analysis result corresponding to the trend analysis, constructing a conversion rule according to the extracted features, and generating a prediction sequence according to the conversion rule; performing threshold division on the prediction sequence, marking state intervals, constructing a criterion sequence, and generating an evaluation result according to the criterion sequence for performing signal detection to obtain detection information; and performing data conversion on the detection information, constructing a display sequence to mark a state type, and generating cognitive state information. And data continuity and signal integrity in a feature extraction process are realized.

The invention relates to the technical field of laser processing, and discloses a laser processing device and method suitable for TGV forming, and the method comprises the steps: S1, a glass substrate is scanned in a confocal manner, a three-dimensional topological graph is obtained, and the three-dimensional topological graph comprises the three-dimensional coordinate, the thickness gradient and the positioning mark of the glass substrate; s2, based on the three-dimensional topological graph, a through hole body is formed through ultraviolet femtosecond laser etching, and intermediate infrared laser is synchronously and dynamically controlled to etch the side wall of the through hole body to generate a taper through hole with a preset taper angle; and S3, the incident angle of the ultraviolet femtosecond laser is adjusted on the side wall of the taper through hole according to the three-dimensional topological graph, and a plurality of heat dissipation grooves are etched through the ultraviolet femtosecond laser. According to the laser processing device and method suitable for TGV forming, signal integrity optimization and active heat dissipation functions are achieved in the same through hole, the application range of the TGV is widened, and the stability of the TGV during use is improved.

The invention relates to the technical field of submarine engineering and information processing, in particular to a submarine cable positioning method and system, and the method comprises the steps: synchronously collecting magnetic field, structured light and underwater acoustic signal data, and fusing inertial navigation information to construct a unified space-time reference system; precise registration of heterogeneous data is realized by adopting sliding time window screening, multi-modal noise reduction and rigid body transformation; constructing a graph structure model for expressing cable space-signal features based on the fused data, and reasoning cable path topology by using a graph convolutional network; reconstructing a cable center line through three-dimensional visualization, embedding the cable center line into submarine topography, and realizing risk area dynamic clustering by combining signal integrity score and burial depth estimation; historical time sequence data are fused, a long short-term memory network is adopted to predict cable drift, detectable attenuation and burial depth change trends, risk levels are divided based on prediction results, and spatial distribution early warning and disposal suggestions are output. According to the invention, the cable positioning precision and the risk assessment intelligent level in a complex seabed environment are improved.

The invention relates to a dual-redundancy control system and method for a vehicle and an automatic driving vehicle. The dual-redundancy control system comprises a main control unit, an auxiliary control unit and a power system. The main control unit and the auxiliary control unit are connected with each other through a bidirectional heartbeat line, periodically exchange heartbeat signals and check signal integrity so as to monitor real-time state information of the opposite side. The power system is connected with the main control unit and the auxiliary control unit through a first power channel and a second power channel of the vehicle, and the main control unit and the auxiliary control unit are connected with an action execution system of the vehicle. When a power supply, a control unit and a sensor of the vehicle have a single-point fault, the design of the dual-redundancy control system covering the whole link can ensure normal operation of system functions, and the safety and robustness of the vehicle during driving are improved.

The invention discloses an unmanned aerial vehicle soft landing control method based on track prediction and multi-source cooperative decoy, and the method comprises the steps: introducing a communication protocol recognition mechanism in a blocking process of an instruction link of an unmanned aerial vehicle, and achieving the conversion from extensive broadband suppression to protocol precise interference; the problems that in the prior art, power consumption is high, interference on legal communication is large, and the frequency hopping unmanned aerial vehicle resisting effect is insufficient can be effectively solved. In the scheme, signal integrity is guaranteed through monitoring and preprocessing, an unmanned aerial vehicle link protocol is identified through feature extraction and protocol library matching, and then a targeted interference template is generated, so that the interference effect can accurately fall on key positions such as a leader sequence, a CRC field, a subcarrier or a control frame and the like; therefore, synchronization, verification or data transmission can be destroyed under the condition of low power, and accidental damage of broadband noise to services such as co-frequency Wi-Fi and Bluetooth is avoided.

The invention relates to the technical field of data cleaning processing, in particular to a big data cleaning method based on deep learning and data feature matching, and the method comprises the following steps: constructing a three-dimensional electromagnetic pollution topological map through an electromagnetic fingerprint spectrum generator; anti-interference cleaning channels are activated according to dynamic changes of the electromagnetic pollution topological map, and each channel generates a channel configuration instruction set; receiving a channel configuration instruction set, executing dual operations of data pulse waveform reconstruction and feature restoration, and outputting a restored clean data block; and writing back the clean data block to the original storage medium. According to the method, accurate recovery of pulse distortion caused by electromagnetic interference is achieved, and compared with a traditional method based on low-pass filtering or interpolation recovery, nonlinear interference components can be more effectively removed, data signal integrity is ensured, and the fidelity of recovered data is improved.

The invention relates to the field of chip testing, in particular to a chip signal integrity test analysis method, device and equipment and a storage medium. The method comprises the following steps: extracting a chip performance index based on a chip design requirement document; performing saturation frequency excitation setting based on the chip performance index to generate an excitation test signal; performing a multi-port signal excitation test and parallel signal sampling based on the excitation test signal to generate a high signal-to-noise ratio response data set; obtaining a chip layout design file; performing chip communication link analysis on the chip layout design file, and constructing communication line layout data; performing signal mapping and waveform quality evaluation on the communication line layout data based on the high signal-to-noise ratio response data set to obtain a node signal distortion rate; and performing signal integrity quantization and theoretical signal integrity score comparison based on the node signal distortion rate, and marking a fault node. According to the invention, the chip testing efficiency is improved, and the signal abnormal part of the chip is accurately and efficiently detected.

The invention discloses a logic board comprehensive performance testing device and testing method, and relates to the technical field of electronic equipment testing. A time sequence signal, a power consumption curve and infrared temperature data are synchronously acquired through a logic board interface, a time-space aligned fusion data set is generated by using a dynamic time warping algorithm, a power consumption coupling analysis model is input, a dynamic incidence matrix of a signal integrity parameter and power consumption fluctuation is acquired, and key coupling characteristics are extracted through singular value decomposition. And constructing an adaptive neighborhood density clustering model according to the correlation mode parameters and the temperature gradient distribution, generating an abnormal region probability graph, and marking electrothermal coupling abnormal coordinates and confidence. And inputting the fusion data, the correlation parameters and the abnormal probability graph into a graph neural network, taking a time sequence signal spectrum entropy, a local temperature mean value and a power consumption fluctuation variance as node features, taking an electrothermal coupling coefficient as an edge weight, iteratively updating a node state through a graph attention mechanism, and outputting a defect type and a three-dimensional coordinate. And the defect detection accuracy is effectively improved.

The invention discloses a co-packaging type optical engine module and networking. The co-packaged optical engine module comprises a photonic integrated chip and a processor bare core, and the photonic integrated chip is stacked above the processor bare core and electrically connected with the processor bare core; the photonic integrated chip is configured to transmit and receive data in an optical signal mode, and an optical signal transmitting and receiving end of the photonic integrated chip is located on one side far away from the processor bare core; the processor die is configured to process the data. According to the scheme provided by the invention, intermediate substrates such as a silicon dielectric plate and an adapter plate are canceled, the transmission path is further shortened, the data transmission efficiency is improved, in addition, the signal loss can be remarkably reduced by the tight coupling, and the high-speed signal integrity is improved.

The invention relates to a back drilling method for reducing circuit board via hole stubs, which comprises the following steps: S1, blind hole pre-processing: performing laser pre-processing at the tail end of a target via hole stub to form a positioning blind hole; s2, back drilling, wherein a drill bit with an impedance monitoring module is adopted to conduct tracking drilling on the positioning blind hole; s3, monitoring a dynamic resistance value, and collecting an electrical impedance value of the impedance monitoring module in real time; and S4, tool retracting is conducted, and when it is monitored that the electrical impedance value reaches a preset value, drilling is stopped immediately, and the drill bit is retracted. According to the method, the laser preprocessing technology and the impedance feedback technology are combined, dependence and uncertainty on empirical judgment are reduced, the production process is simplified, the machining cost is reduced, and accurate control over the back drilling via hole stub can be achieved. The length of the via hole stub can be effectively reduced, reflection, scattering and delay in high-speed signal transmission are reduced, signal integrity is improved, and the method is particularly suitable for design of high-frequency and high-density interconnected circuit boards.

The invention discloses a PCBA (Printed Circuit Board Assembly) processing component layout optimization method and system, and relates to the technical field of electronic design automation. Data stream information of each functional module of a PCBA is collected, data stream characteristics are analyzed, and key signal paths and interaction relationships are determined; the method comprises the following steps of: dividing priorities for different data streams according to functional requirements and signal importance of a PCBA (Printed Circuit Board Assembly), and determining a core signal; by optimizing component layout, reducing roundabout and intersection of signal paths, reducing signal transmission loss and interference, reasonably dividing functional areas and compactly arranging associated components according to data stream directions and core signals, it is ensured that the signal transmission paths are clear and efficient, meanwhile, the transmission quality of high-priority signals is preferentially guaranteed, and the transmission efficiency is improved. By adopting a transmission line with strong anti-interference capability, adding a signal buffer and filter circuit and other measures, the signal integrity is obviously improved, and the signal is kept stable and reliable in the transmission process, so that the performance of the whole PCBA system is improved.

The invention belongs to the technical field of server detection, and discloses a server PCB automatic detection system based on operation data acquisition and analysis. The system is composed of an operation data distributed acquisition module, a preprocessing and synchronous time sequence correction module, a signal integrity real-time detection module, a thermal field dynamic distribution analysis module, a time sequence drift intelligent analysis module, a multi-dimensional joint feature extraction module and an abnormal mode adaptive identification module. A fault trend depth prediction module; and a self-learning feedback and online optimization module. Acquisition units carrying FPGA hardware are arranged at key nodes of a PCB of a server, distributed acquisition of current, voltage, temperature and other multi-source electrical data is achieved by means of the high-speed parallel acquisition characteristic of the acquisition units, after asynchronism and noise interference of the acquired data are eliminated through a preprocessing and synchronous time sequence correction module, all functional modules work cooperatively, and the multi-source electrical data are acquired. A whole-process online dynamic detection system from data acquisition to anomaly analysis is constructed, and anomaly can be quickly captured in a fault germination stage.

The invention discloses a memory signal integrity enhancing system based on multi-dimensional parameter self-adaption, and belongs to the technical field of signal transmission. The system comprises a multi-dimensional signal acquisition module, a multi-dimensional parameter analysis module, a self-adaptive adjustment module, a memory signal optimization module and a feedback monitoring module, the multi-dimensional signal acquisition module is combined with multi-dimensional parameter analysis, signals of a data bus, an address bus and a control bus are synchronously acquired, a dynamic adjustment strategy is generated according to a model, and the self-adaptive adjustment module and the memory signal optimization module are optimized according to the dynamic adjustment strategy. Different optimization means are adopted for different parameter types, a customized optimization system with one parameter and one scheme is formed, it is ensured that the optimized target signal is optimal in amplitude stability, time sequence accuracy, anti-noise capacity and impedance matching degree, the feedback monitoring module is combined with the multi-dimensional parameter analysis module, and the multi-dimensional parameter analysis module is combined with the feedback monitoring module. And through full-dimension index monitoring and dynamic calibration, the continuous adaptability of the system to the running state of the memory and the long-term stability of signal integrity are guaranteed.

The invention is applicable to the technical field of integrated circuit design, and provides a method for repairing crosstalk noise violation on a data path, which comprises the following steps of: reading a crosstalk noise violation report of a static time sequence analysis STA tool; finding an interconnection line corresponding to each violation in the report from a layout wiring tool, and finding adjacent interconnection line position information and connected logic unit information of the current interconnection line; selecting a corresponding repairing scheme according to the specific conditions of the interconnection lines and the connected logic units, and executing and adjusting the repairing scheme so as to repair crosstalk noise on a data path; and after a round of repair is completed, if crosstalk noise violation is also detected in the STA tool, the steps need to be executed again until all crosstalk noise problems are solved. According to the method provided by the invention, the crosstalk problem is efficiently identified and solved through an automatic process, the signal integrity and the function correctness of circuit design are ensured, and compared with a traditional scheme, the method is more targeted, and the gain brought by single change is favorably improved.

The invention discloses a U.2 interface-based server intelligent integrated hierarchical storage system and method, relates to the technical field of computer server storage, and is used for solving the problem of optimization of multi-type SSD data access efficiency and storage resource utilization rate. Firstly, a multi-protocol parallel channel is established by redefining U.2 interface reserved pins, signal integrity parameters are monitored in real time and fused with equipment I / O access features, and an I / O feature sequence of physical layer state information is generated; then, based on a time sequence convolutional neural network, extracting access mode multi-scale features, calculating a data block access heat probability, mapping and determining a target storage hierarchy, and generating a scheduling instruction containing a source physical address, the target hierarchy and a migration priority; the migration execution module realizes zero-copy migration of the data block between the shared DRAM pool and the SSD according to the instruction; and the resource coordination module monitors system load in real time, dynamically adjusts migration concurrency and an I / O sampling strategy, and realizes self-adaptive optimization of storage performance and resource utilization.

The invention provides a preparation method of an HDMI (High Definition Multimedia Interface) high-performance common-mode suppressor made of a nanocrystalline material, relates to the technical field of electronic component preparation, and aims to meet the harsh requirement of HDMI high-frequency high-speed signals on common-mode noise suppression, the method comprises the following steps: constructing a multi-layer heterogeneous magnetic film with a gradient interface on a microstructured substrate by utilizing multi-target magnetron sputtering; a selective energy field assisted annealing technology is adopted to realize precise nanocrystallization and magnetic anisotropy regulation and control of the magnetic film; and a high-precision three-dimensional coil structure is integrated by combining a micromachining process. The prepared common-mode suppressor is small in size and high in integration level, shows excellent common-mode suppression efficiency, wide working bandwidth and excellent signal integrity in a high-frequency band, has high reliability, and is suitable for a new generation of HDMI (High-Definition Multimedia Interface).

The invention provides a switching value and analog quantity acquisition system, and the system comprises a switching value acquisition module which is used for carrying out the signal acquisition through the combination of polling and interruption, and monitoring an interference source in real time through the photoelectric isolation and filtering technology in the signal acquisition process; the analog quantity acquisition module is used for performing data acquisition by adopting a multi-channel parallel acquisition mode, eliminating high-frequency noise and low-frequency interference by utilizing a digital filtering technology, and dynamically adjusting an acquisition range by utilizing a self-adaptive algorithm; the quick response module is used for performing task processing and performance optimization by utilizing a real-time operating system, so that the system response time is at a millisecond level; and the data storage module is used for designing a storage strategy in the main program and realizing data check, error processing and security storage. According to the invention, the response speed, anti-interference performance and signal integrity during switching value acquisition are guaranteed, high precision, real-time performance and the like during analog quantity acquisition are ensured, and the performance of an acquisition system is greatly improved.

A probe card for a circuit probe test system and methods of fabrication thereof. The probe card includes a substrate portion, and a probe head including a guide plate located below the substrate portion and having a plurality of openings through the guide plate, and a conductive trace on the guide plate that extends between a pair of the openings. A plurality of probe pins extend through the openings through the guide plate, where a pair of probe pins are electrically connected by the conductive trace to form a loopback signal path. Accordingly, the loopback signals may be routed through the conductive trace located on and / or within the guide plate rather than through the substrate portion of the probe card. This may significantly reduce the total length of the loopback signal path, which may thereby improve the signal integrity (SI) during loopback testing of a device-under-test.

The invention provides an electrolytic copper foil which is at least provided with a low-roughness surface, copper nodules on the low-roughness surface are rod-shaped protrusions and / or granular protrusions, the distance between every two adjacent protrusions ranges from 10 nm to 650 nm, the height of the copper nodules of the rod-shaped protrusions ranges from 300 nm to 800 nm, and the height of the copper nodules of the granular protrusions ranges from 80 nm to 250 nm. And the number of the rod-shaped bulge copper nodules and / or the granular bulges is 50-150 in every 25 mu m < 2 > of the area of the low-roughness surface. The invention further provides a preparation method and application of the electrolytic copper foil. The electrolytic copper foil provided by the invention has a low-roughness surface, so that the signal integrity of the copper foil substrate is improved, the problem of large signal transmission loss in the prior art is solved, the peeling strength between the copper foil and the substrate is improved, and the defect of insufficient peeling strength in the prior art is overcome.

The invention provides an integrated circuit packaging system with an isolation structure. The system comprises an isolation barrier building assembly which divides a function module and a signal path into a plurality of isolation areas; the electrical performance test assembly is responsible for applying an electrical performance test signal of the integrated circuit at the input end of the integrated circuit, collecting an output signal of the integrated circuit at the output end, and analyzing the electrical performance test signal and the output signal to obtain a quality parameter of the electrical performance test signal; and the signal path adjustment component is responsible for providing adjustment suggestions for the signal path of the current integrated circuit according to the analysis result of the quality parameters. According to the invention, electrical isolation and physical protection are ensured; the signal quality and the system performance under the isolation structure are evaluated through analysis of the test signal and the output signal; providing an optimization suggestion according to a test result, and adjusting a signal path and an isolation barrier design; and the integrated circuit packaging system with the isolation structure is ensured to reach the optimal level in the aspects of electrical performance, signal integrity and reliability.

The invention relates to a performance simulation optimization method and system for a high-speed connector, and the method comprises the following steps: carrying out the grid processing of a physical structure of the high-speed connector, and obtaining a three-dimensional structure discrete grid model; based on the three-dimensional structure discrete grid model and a time domain finite element, electromagnetic field distribution of the high-speed connector is solved, and a multi-order electromagnetic field distribution matrix is obtained; based on the multi-order electromagnetic field distribution matrix, performing spectral analysis on the output signal of the high-speed connector to obtain a performance score of the connector and a performance analysis report of the connector; when the performance score is lower than a preset performance threshold value, analyzing a key performance influence factor set of the high-speed connector based on a performance analysis report; and the high-speed connector is simulated and optimized based on the key performance influence factor set, so that the performance score of the high-speed connector is higher than a preset performance threshold, and the problem that the electromagnetic property of the high-speed connector and the influence of the electromagnetic property on the signal integrity are difficult to accurately predict by a traditional method is solved.

A photoelectric packaging structure disclosed by the present invention comprises a packaging substrate, an optical chip, an electric chip, a lens and a micro connector, the packaging substrate is provided with a first upper surface, the first upper surface is provided with a groove, the optical chip is installed in the groove, the optical chip is provided with a second upper surface, the second upper surface is flush with the first upper surface, and the optical chip is installed in the groove. The electric chip is electrically connected with the second upper surface and the first upper surface at the same time; the lens is arranged on the packaging substrate, is positioned on one side of the optical chip and is optically coupled with the optical chip; the micro connector is installed on the packaging substrate, the micro connector is connected with an optical fiber, and the optical chip is optically coupled with the optical fiber through the lens and the micro connector. According to the photoelectric packaging structure, the signal transmission path is shortened, the possibility of impedance mismatching and signal crosstalk is reduced, the high-frequency performance and signal integrity of packaging are improved, efficient optical coupling of the optical chip and the optical fiber is achieved, the stability and efficiency of optical signal transmission are improved, and the cost is reduced. And the aspects of compactness, connection efficiency, optical coupling performance and the like are remarkably improved.

Plug connectors for use with high speed signals. The connector includes an insulative housing having a base portion and a tongue portion extending from the base portion, and conductive terminals held by the housing. Each conductive terminal has a mating portion held on a side of the tongue portion, a tail portion extending out of the housing, and an intermediate portion held in the base portion. The conductive terminals comprise signal terminals and ground terminals. A shielding member is disposed in the housing and includes features configured to provide shielding to signal terminals and electrically connect ground terminals. The shielding member also includes features configured to improve impedance consistency along conduction paths. Such a configuration meets signal integrity requirements in connectors designed for higher frequencies, while conforming to a standard that constrains mating and mounting interfaces.

The invention relates to the technical field of circuit board processing, and discloses a circuit board back drilling stub control method, device and equipment and a medium, and the circuit board back drilling stub control method comprises the steps: carrying out the board thickness measurement of a circuit board, obtaining the original board thickness data, carrying out the difference analysis, and carrying out the piling and measurement processing according to the analysis result; obtaining a plate thickness data set corresponding to each pile; measuring and analyzing the target back drilling hole position to obtain grouped plate thickness data, calculating the influence degree of the plate thickness on the length of the back drilling stub, comparing the influence degree with a preset threshold value, and judging a back drilling depth adjusting scheme; and according to a judgment result, back drilling processing depth parameters of the whole or the partitions are calculated, and differentiated depth optimization control is achieved. According to the method, the stub range can be effectively reduced in multi-batch and high-layer PCB machining, the back drilling depth control precision is improved, and it is ensured that the stub length is stable and meets the high-specification signal integrity requirement.