112results about "Computing operations for logarithmic/exponential functions" patented technology

The invention relates to a method and an arrangement intended for radio communication systems and effective in digitalizing and subsequently processing numerically arbitrary radio signals. The signals are represented by composite (complex) vectors which have been subjected to disturbances in the system, such that information in the signals has been lost. This information is restored in its entirety when practising the present invention. For the purpose of solving this problem, the inventive digitalizing arrangement includes a multistage logarithmic amplifier chain (A) in which each stage is connected to a separate detector (D), the output signals of which are added in an adder. The adder output signals are then transmitted to a first A/D-converter (AD1) for digitalizing and converting the amplitude components of the signal. At the same time, the undetected signal from the saturated output stage in the amplifier chain is transmitted to a second A/D-converter for digitalizing and converting the phase components of the signal. The digital values obtained on the outputs of the AD-converters (AD1, AD2) are applied to different inputs of a digital signal processor (MP) for numerical processing of the pairwise received digital values in a manner such as to restore the complete vector characteristic of the signal.

An RMS-to-DC converter implements the difference-of-squares function by utilizing two identical squaring cells operating in opposition to generate two signals. An error amplifier nulls the difference between the signals. When used in a measurement mode, one of the squaring cells receives the signal to be measured, and the output of the error amplifier, which provides a measure of the RMS value of the input signal, is connected to the input of the second squaring cell, thereby closing the feedback loop around the second squaring cell. When used in a control mode, a set-point signal is applied to the second squaring cell, and the output of the error amplifier is used to control a variable-gain device such as a power amplifier which provides the input to the first squaring cell, thereby closing the feedback loop around the first squaring cell. Accurate square law approximation at microwave frequencies can be achieved by implementing the squaring cells as series-connected three-transistor multi-tanh transconductance cells. By using carefully balanced squaring cells and a well-balanced error amplifier, approximation errors are cancelled and accurate RMS measurement is realized at high frequencies. A feedforward bootstrapping feature uses an op amp to balance the voltages at the common nodes of the transconductance squaring cells and also provides a balanced differential input drive to one of the squaring cells. A base current compensation circuit for providing accurate base compensation current to both of the squaring cells prevents errors due to DC offset voltages.

A Signal Conditioning Filter (SCF) and a Signal Integrity Unit (SIU) address the coupled problem of equalization and noise filtering in order to improve signal fidelity for decoding. Specifically, a received signal can be filtered in a manner to optimize the signal fidelity even in the presence of both significant (large magnitudes of) ISI and noise. The present invention can provide an adaptive method that continuously monitors a signal fidelity measure. Monitoring the fidelity of a multilevel signal can be performed by external means such as by the SIU. A received signal y(t) can be “conditioned” by application of a filter with an electronically adjustable impulse response g(t). A resulting output z(t) can then be interrogated to characterize the quality of the conditioned signal. This fidelity measure q(t) can be used to adjust the filter response to maximize the fidelity measure of the conditioned signal.

Provided is a circuit to perform single-ended to differential conversion while providing common-mode voltage control. The circuit includes a converter to convert a single-ended signal to a differential signal and a stabilizing circuit adapted to receive the differential signal. The stabilizing circuit includes a sensor configured to sense a common-mode voltage level of the differential signal and a comparator having an output port coupled to the converter. The comparator is configured to compare the differential signal common-mode voltage level with a reference signal common-mode voltage level and produce an adjusting signal based upon the comparison. The adjusting signal is applied to the converter via the output port and is operative to adjust a subsequent common-mode voltage level of the differential signal.

A voltage supply circuit comprises a voltage control circuit for outputting a bias voltage control signal according to a set value based on a bias voltage of a sensor and a voltage generation circuit for generating the bias voltage to be applied to the sensor based on the bias voltage control signal.

A high speed, high sensitivity post amplifier as described herein includes a digitally-controlled DC offset cancellation feature. The amplifier circuit is configured to provide DC offset voltage levels in response to a digital control signal, where the digital control signal is generated based upon a data error metric such as bit error rate. The AC signal path and the DC offset adjustment signal path in the amplifier circuit are separated to facilitate operation with normal power supply voltages, and to achieve low power operation.

A wireless communication system uses a transmission power detection circuit. The transmission power detection circuit has excellent linearity of detection output for transmission output power and can obtain detection output not having temperature dependence. The transmission power detection circuit has rectifying detection part that includes plural amplifiers connected in series and obtains detection output by taking out rectified outputs from emitters of input transistors of amplifiers of individual stages and synthesizes them. A compensation voltage generating circuit has a dummy amplifier having a construction similar to the amplifiers constituting the rectifying detection part and a coefficient circuit that changes output of the dummy amplifier at a specified ratio, and generates voltage for compensating temperature characteristics. Also included is an addition/subtraction circuit that obtains detection output free of temperature dependence by subtracting compensation voltage generated in the compensation voltage generating circuit from output voltage of the rectifying detection part.

In one embodiment, a light dimming module is disclosed. The light dimming module has a dimming engine coupled to a digital input interface and an output interface. The dimming engine is configured to provide a N-segment piecewise linear exponential digital control signal, and the output interface is configured to control the intensity of a light source.

Systems and methods are described for transmitting a waveform having a controllable attenuation and propagation velocity. An exemplary method comprises: generating an exponential waveform, the exponential waveform (a) being characterized by the equation V_in=De^{−A<sub2>SD</sub2>[x−v<sub2>SD</sub2>t]}, where D is a magnitude, V_in is a voltage, t is time, A_SD is an attenuation coefficient, and v_SD is a propagation velocity; and (b) being truncated at a maximum value. An exemplary apparatus comprises: an exponential waveform generator; an input recorder coupled to an output of the exponential waveform generator; a transmission line under test coupled to the output of the exponential waveform generator; an output recorder coupled to the transmission line under test; an additional transmission line coupled to the transmission line under test; and a termination impedance coupled to the additional transmission line and to a ground.

A signal acquisition system has a signal acquisition probe having probe tip circuitry coupled to a resistive center conductor signal cable. The resistive center conductor signal cable of the signal acquisition probe is coupled to a compensation system in a signal processing instrument via an input node and input circuitry in the signal processing instrument. The signal acquisition probe and the signal processing instrument have mismatched time constants at the input node with the compensation system having an input amplifier with feedback loop circuitry and a shunt pole-zero pair coupled to the input circuitry providing pole-zero pairs for maintaining flatness over the signal acquisition system frequency bandwidth.

Transconductance-based variable gain amplifiers amplify an input voltage by converting the voltage difference to a current and then amplifying the result. At least one resistor network is adjusted depending on the magnitude of the input voltage difference and the output desired. A network of MOS transistor switches with a small footprint adjusts the resistance of the input voltage circuit in a way to insure consistent resistance and low stray capacitance.

A squaring cell combines first and second exponential currents to approximate square law behavior. The exponential currents can be generated by current stacks having pairs of series-connected junctions. The exponential currents can be altered to change the shape of the exponential currents to better approximation true square law behavior. A multiplier combines four exponential currents to approximate a multiplication function. The exponential currents in the multiplier can be generated by current stacks that are cross-connected so as to generate two output currents, the difference of which represents the multiplication of two input signals.

PCT No. PCT/GB95/00741 Sec. 371 Date Nov. 12, 1996 Sec. 102(e) Date Nov. 12, 1996 PCT Filed Mar. 31, 1995 PCT Pub. No. WO95/30963 PCT Pub. Date Nov. 16, 1995An electronic circuit for Euclidean distance determination includes two floating gate transistors (M1, M2) connected in parallel. Voltages representing a reference point and its complement are applied to input lines (22, 24) and corresponding charges become stored on the transistors' floating gates (F1, F2). Voltages representing a data point and its complement are input to control gates (G1, G2). The transistors (M1, M2) produce a combined output current which is a quadratic or exponential function of the distance between the data and reference points according to whether the transistors are above or below threshold. The circuit (10 ) includes a diode-connected load device (M3) for deriving the square root of the output current, which is proportional to Euclidean distance when the transistors are operated above threshold. Refresh means (M44, M45) may be provided for resetting reference points. An array of circuits of the invention is employed for determination of distances between vector quantities.

A signal strength detecting device includes a logarithmic amplifier and an amplitude detector. A constant current source whose current is proportional to the absolute temperature is used as a current source for biasing the logarithmic amplifier. In contrast, a constant current source whose current is not proportional to the absolute temperature is used as a current source for biasing the amplitude detector. This makes it possible to solve a problem of a conventional signal strength detecting device of being unable to detect the signal strength of a received signal correctly because it employs a constant current source whose current is proportional to the absolute temperature as the current source for biasing the amplitude detector, and hence the collector current output from differential amplifiers constituting the amplitude detector can vary in response to the absolute temperature even if the signal strength of the received signal is kept constant.

An apparatus and method are disclosed which provide a substantially linear relationship between an input signal, such as an input voltage or current, and a predetermined parameter, such as a frequency response or capacitance of a parallel plate capacitor or varactor. The apparatus comprises a square root converter and a logarithmic generator. The square root converter is adapted to provide a square root signal which is substantially proportional to a square root of the input signal. In the various embodiments, the logarithmic generator is adapted to provide an applied signal which is substantially proportional to a sum of a logarithm of the input signal plus the square root of the input signal. The applied signal is a pre-distorted signal which generally has a non-linear relation to the predetermined parameter and which, when applied, allows the predetermined parameter to vary substantially linearly with the input signal.

Systems and methods are provided for power measurement of signals such that the power measurement is insensitive to PVT variations of the measurement systems. A power measurement system includes an analog squarer circuitry, an integrating ADC, and a controller. The squarer circuitry calculates the power of a signal whose power is to be measured while the integrating ADC integrates the calculated power over a runup interval to generate an integrated power. The squarer circuitry also calculates the power of a reference for the integrating ADC to de-integrate the integrated power over a rundown interval. The power measurements are independent of PVT variations of the analog squarer circuitry and integrating ADC. The controller digitally controls the runup interval and measures the rundown interval to provide digitized power measurements. The analog squarer circuitry have replica squarer circuits. Process dependent mismatches between the replica analog circuitry may be removed through a calibration process.

An apparatus and method of generating a current pair I_p, I_m where the ratio of the pair is exponentially related to a control signal, and where either I_p or I_m is greater than or less than a minimum or maximum value includes a feedback correction circuit used to sense the value of I_m or I_p. The correction circuit supplies a boost current I_boost when the sensed value of I_p or I_m is less than or greater than the minimum or maximum value. I_boost is preferably maintained proportional to the difference of the desired value and I_p or I_m.

Multipliers are fundamental building blocks in signal processing, including in emerging applications such as machine learning (ML) and artificial intelligence (AI) that predominantly utilize digital-mode multipliers. Generally, digital multipliers can operate at high speed with high precision, and synchronously. As the precision and speed of digital multipliers increase, generally the dynamic power consumption and chip size of digital implementations increases substantially that makes solutions unsuitable for some ML and AI segments, including in portable, mobile, or near edge and near sensor applications. The present invention discloses embodiments of multipliers that arrange data-converters to perform the multiplication function, operating in mixed-mode (both digital and analog), and capable of low power consumptions and asynchronous operations, which makes them suitable for low power ML and AI applications.

A mixer capable of detecting or controlling a common mode voltage thereof, includes at least: a mixing module for mixing a first set of differential signals and a second set of differential signals to generate at least one mixed signal; and a compensation module for compensating at least one operation point of the mixing module.