2results about "Computing operations for logarithmic/exponential functions" patented technology

Aspects of the subject disclosure may include, for example, first and second operational amplifiers; and a differential pair of NPN transistors in a feedback path of the TLA configured to convert an input current signal into an output voltage signal, where a first emitter of a first NPN transistor of the pair of NPN transistors is connected to an inverting input of the first operational amplifier, and where a second emitter of a second NPN transistor of the pair of NPN transistors is connected to a non-inverting input of the second operational amplifier. Other embodiments are disclosed.

A logarithmic amplifier (200) includes a logarithmic current preamplifier circuit (202) and a logarithmic amplifier circuit (204). The logarithmic current preamplifier circuit (202) includes an inverting input terminal (206A), an output terminal (206B), and a first diode (210). The first diode (210) is coupled between the inverting input terminal (206A) and the output terminal (206B) of the logarithmic current preamplifier circuit (202). The logarithmic amplifier circuit (204) includes an inverting input terminal (212A), an output terminal (212B), and a second diode (214). The inverting input terminal (212A) of the logarithmic amplifier circuit (204) is coupled to the output terminal (212B) of the logarithmic current preamplifier circuit (202). The second diode (214) is coupled between the inverting input terminal (212A) and the output terminal (212B) of the logarithmic amplifier circuit (204).