169results about "Balance-unbalance networks" patented technology

A component operating with bulk acoustic waves has two Bulk Acoustic Wave (BAW) resonators that are stacked and are acoustically coupled to one another, with a first resonator being connected to an asymmetric port, and a second resonator being connected to a symmetrical port. The acoustic coupling is provided by a partially permeable coupling layer system, which has an alternating sequence of at least two λ / 4 mirror layers with different acoustic impedance. The coupling layer system furthermore has a compensation layer, which has an approximate thickness of λ / 8. The compensation layer according to the invention makes it possible to match any discrepancy in the phase difference (which is caused by reflections on the mirror layers) from the predetermined 180° between the connections of the symmetrical port to approximately 180°.

A FET mixer uses a balun having a primary and secondary, with the primary coupled to an radio frequency signal input. The mixer also includes a pair of field effect transistors (FETs), wherein the gates are coupled to one another and to a local oscillator input. One of the source and the drain of the second of the two transistors is coupled at a node to one of the source and the drain of the other of the two transistors, and the node is coupled to ground. The other of the source and the drain of the first of the two transistors is coupled to one side of the secondary of the balun and the other of the source and the drain of the second of the two transistors is coupled to the other side of the secondary of the balun. An intermediate frequency signal output is coupled to a point in the circuit path between the first and second transistors.

An unbalanced-balanced multiband filter module comprising three high-frequency switches each comprising a switching element, and two unbalanced-balanced bandpass filters having different transmitting frequency bands, a first high-frequency switch being connected to an unbalanced port of the module, an unbalanced port of the first unbalanced-balanced bandpass filter, and an unbalanced port of the second unbalanced-balanced bandpass filter; a second high-frequency switch being connected to a first balanced port of the module, a first balanced port of the first unbalanced-balanced bandpass filter, and a first balanced port of the second unbalanced-balanced bandpass filter; a third high-frequency switch being connected to a second balanced port of the module, a second balanced port of the first unbalanced-balanced bandpass filter, and a second balanced port of the second unbalanced-balanced bandpass filter; and the first to third high-frequency switches being switched depending on a passing high-frequency signal, whereby a high-frequency signal input into an unbalanced port of the module is output from the first and second balanced ports, or a high-frequency signal input into the first and second balanced ports is output from an unbalanced port of the module.

Provided is a circuit to perform single-ended to differential conversion while providing common-mode voltage control. The circuit includes a converter to convert a single-ended signal to a differential signal and a stabilizing circuit adapted to receive the differential signal. The stabilizing circuit includes a sensor configured to sense a common-mode voltage level of the differential signal and a comparator having an output port coupled to the converter. The comparator is configured to compare the differential signal common-mode voltage level with a reference signal common-mode voltage level and produce an adjusting signal based upon the comparison. The adjusting signal is applied to the converter via the output port and is operative to adjust a subsequent common-mode voltage level of the differential signal.

An unbalanced-balanced multiband filter module comprising three high-frequency switches each comprising a switching element, and two unbalanced-balanced bandpass filters having different transmitting frequency bands, a first high-frequency switch being connected to an unbalanced port of the module, an unbalanced port of the first unbalanced-balanced bandpass filter, and an unbalanced port of the second unbalanced-balanced bandpass filter; a second high-frequency switch being connected to a first balanced port of the module, a first balanced port of the first unbalanced-balanced bandpass filter, and a first balanced port of the second unbalanced-balanced bandpass filter; a third high-frequency switch being connected to a second balanced port of the module, a second balanced port of the first unbalanced-balanced bandpass filter, and a second balanced port of the second unbalanced-balanced bandpass filter; and the first to third high-frequency switches being switched depending on a passing high-frequency signal, whereby a high-frequency signal input into an unbalanced port of the module is output from the first and second balanced ports, or a high-frequency signal input into the first and second balanced ports is output from an unbalanced port of the module.

A hybrid loop filter includes an integrator having an input and an output wherein the output forms an output of the hybrid loop filter, a plurality of transconductance amplifiers having an input and an output wherein each output of the plurality of transconductance amplifiers is coupled to the input of the integrator, a switched capacitor low pass chain having an input and a plurality of branches wherein each of the plurality of branches is coupled to the input of a separate one of said plurality of transconductance amplifiers, and a feedthrough branch having an input and an output wherein the input is coupled to the input of the switched capacitor low pass chain to form an input of said hybrid loop filter, and the output is coupled to the input of a separate one of the plurality of transconductance amplifiers.

A demodulator which includes an active balun circuit and at least one mixer driven by the active balun circuit. The active balun circuit includes a negative shunt feedback arrangement.

An active balun circuit is provided for single-ended to differential RF signal conversion with enhanced common-mode rejection which suppresses common mode signal and which achieves phase and amplitude balance without sophisticated tuning or compensation methods. The circuit has a single-ended input and balanced output with phase and amplitude balance error less than 2° and 1.2 dB, respectively, measured from 1.5 GHz to 1.8 GHz at 5V supply. When supply voltage drops down to 1.5V, its phase and amplitude balance error remains within 5° and 2 dB, respectively. The circuit achieves a balanced output via an output network which behaves as an impedance matching network for differential mode signal and is grounded for common mode signal. As a result, common mode signal is suppressed and 180-degree phase balance at output is achieved. The circuit has high-linearity (P1 dBin=5 dBm, IIP3=16.6 dBm) and low residual phase noise (<−155 dBc / Hz at 100 kHz and above) which make it suitable as an active balun / buffer amplifier between LO and balanced mixer for base station receiver applications.

An unconditionally stable on-chip filter includes a filtering section and at least one negative resistance module. The filtering section is operably coupled to filter a signal and includes realizable integrated circuit passive components. The at least one negative resistance module is operably coupled to compensate for integrated circuit losses of the filtering section. The realizable integrated circuit passive components have values that are robust, in comparison to parasitic values, have minimal integrated circuit real estate, and provide realizable values for various integrated circuit manufacturing processes including CMOS technology.

A hybrid balun apparatus are disclosed. The hybrid balun apparatus can support both the reception mode and the transmission mode and be advantageous for a high level of integration, by replacing two transformers disposed at a reception path and a transmission path with a single transformer and integrating a T / R switch and a balun into a one chip. Therefore, an IC according to integration extends to a front stage of an antenna to facilitate interfacing between elements, and a burden for designing at a rear stage (i.e., LNA in the reception mode, and PA in the transmission mode) can be reduced.

An integrated receiver circuit includes aphase locked loop circuit (21) with a voltage controlled oscillator (VCO) (25) and a quadrature generator circuit (29) which uses hybrid-branch line coupler circuits (27, 28) coupled to buffered VCO outputs, where the hybrid-branch line coupler circuits (27, 28) are tuned by same control voltage (25a) that controls the VCO (25). By replicating the VCO core circuitry in each hybrid-branch line coupler circuit (27, 28) under common control of a control voltage, calibrated quadrature signals are generated that have the same frequency as the phase locked loop circuit (21).

Provided is a wideband active balun circuit based on a differential amplifier. The active balun circuit is configured to compensate for unbalance between two differential signals and can be applied to wideband systems, such as software defined radio (SDR) systems or ultra wideband (UWB) systems. Also, when signal unbalance is caused by changes in process conditions, such as temperature, errors in amplitude and phase between the two differential signals can be finely tuned by adjusting a voltage tuning terminal outside a chip, so that the active balun circuit can simply solve the unbalance between the two differential signals. Furthermore, input transistors that constitute a pair of differential amplifiers are provided in a cascode structure to prevent the occurrence of signal leakage and self-mixture.

In a first aspect, an RF switch includes a main transistor and a gate-to-source shorting circuit. When the RF switch is turned off, the gate-to-source shorting circuit is turned on to short the source and gate of the main transistor together, thereby preventing a Vgs from developing that would cause the main transistor to leak. When the RF switch is turned on, the gate-to-source shorting circuit is turned off to decouple the source from the gate. The gate is supplied with a digital logic high voltage to turn on the main transistor. In a second aspect, an RF switch includes a main transistor that has a bulk terminal. When the RF switch is turned off, the bulk is connected to ground through a high resistance. When the RF switch is turned on, the source and bulk are shorted together thereby reducing the threshold voltage of the main transistor.

A frequency shift-keying reader circuit includes a band-pass filter, a low noise amplifier, a first balun, an injection-lock divide-by-2 frequency divider, a sub-harmonic mixer and a low-pass filter. The band-pass filter performs a filtering procedure to a radio frequency signal, wherein the filtered radio-frequency signal is received by the low noise amplifier to provide an injection signal, and the injection signal is received by the first balun to generate a first differential signal and a second differential signal. The injection signal is received by the injection-lock divide-by-2 frequency divider to provide a first oscillation signal and a second oscillation signal, wherein the first differential signal, the second differential signal, the first oscillation signal and the second oscillation signal are received by the sub-harmonic mixer for performing a mixing procedure and thereafter generating an output signal, the low-pass filter performs a filtering procedure to the output signal.

The invention provides an ultra-wide-band low-noise high-balance on-chip active Balun.The matching characteristic in an ultra wide band is achieved at the input end of a whole circuit by adopting a wide-band matching network.A first-stage amplifier adopts a common-emitter common-base low-noise amplifier to decrease the noise coefficients of the whole active Balun, and an on-chip inductor is adopted for an output of the first-stage amplifier to compensate high-frequency grain.A second-stage amplifier adopts a differential amplifier of a Darlington unit, a resistance feedback technology is adopted between a collector electrode and a base electrode of each Darlington tube to ensure the working stability of the Darlington tubes, and a series inductor is introduced for tail current of a Darlington unit differential pair to compensate a tail-current parasitic capacitor so as to improve the balance of output differential signals.The isolation and direct-current potential shifting between the first-stage amplifier and the second-stage amplifier are achieved through an emitter follower.The ultra-wide-band low-noise high-balance on-chip active Balun has the advantages of being small in noise coefficient, large in bandwidth and high in balance.

An FBAR filter added with a balance-unbalance conversion function is provided. The FBAR filter includes: an FBAR filter device having two unbalanced terminals, and which performs filtering of a signal between such terminals; and a balance-unbalance converter having one unbalanced terminal and one pair of balanced terminals, and which performs balance-unbalance conversion of the signal. The unbalanced terminal and the unbalanced terminal are connected, and filtering and balance-unbalance conversion of the signal is performed between the unbalanced terminal and the balanced terminals. The characteristics of the FBAR filter device are brought forth in the filtering of the signal. The FBAR filter device 108 and the balance-unbalance converter are integrated, and provided as a single component which is compact and low-cost,

A hybrid balun apparatus are disclosed. The hybrid balun apparatus can support both the reception mode and the transmission mode and be advantageous for a high level of integration, by replacing two transformers disposed at a reception path and a transmission path with a single transformer and integrating a T / R switch and a balun into a one chip. Therefore, an IC according to integration extends to a front stage of an antenna to facilitate interfacing between elements, and a burden for designing at a rear stage (i.e., LNA in the reception mode, and PA in the transmission mode) can be reduced.

The disclosed embodiments relate to the design of a high-speed frequency doubler circuit. During operation, the circuit uses a transformer-based balun to convert a single-ended input signal into a differential signal, wherein the transformer-based balun includes a transformer with a primary coil, which receives the single-ended input signal, and a secondary coil, which produces the differential signal. The transformer also includes a central compensation capacitor coupled between a center tap of the secondary coil and ground, wherein the central compensation capacitor acts to suppress common-mode components in the differential signal. Next, the circuit uses a pseudo-differential amplifier to convert the differential signal into a single-ended output signal, which has double the frequency of the single-ended input signal.

An unbalance-to-balance converter includes an FET and a balanced output adjusting capacitor connected between the source terminal of the FET and an earth conductor. The balanced output adjusting capacitor has a capacitance value equal to a capacitance difference Cpd-Cps between a drain side parasitic capacitance Cpd and a source side parasitic capacitance Cps. This makes it possible to solve a problem involved in a conventional unbalance-to-balance converter in that when the drain side parasitic capacitance Cpd differs from the source side parasitic capacitance Cps, a pair of balanced signals output from the drain terminal and source terminal do not have the same amplitude and are not in complete opposition.

A balun transformer includes a first conductive pattern having one end provided as an input / output port of an unbalanced signal, a second conductive pattern electromagnetically coupled to the first conductive pattern and having both ends provided as input / output ports of a balanced signal, and a first variable capacitor connected between a ground part and a middle part of an electrical length of the second conductive pattern.

A high-precision adjustable electric control equalization circuit of a cable television network comprises one or more basic electric control equalization modules with an adjustable slope. The circuitalso comprises a control module and one or more compensation modules. The control module is electrically connected to the basic electric control equalization modules so as to control the slope changesof the basic electric control equalization modules. The control module is electrically connected to the compensation modules so as to generate a compensation signal according to the slope changes ofthe basic electric control equalization modules. The output of the basic electric control equalization modules is electrically connected to the input of the compensation modules so as to output a complete signal after the two are overlaid. The high-precision adjustable electric control equalization circuit of the cable television network can obtain good signal waveform flatness at each slope.

In a filter module, a common input / output portion of a switch circuit is set as a first port. A first filter arranged to pass a signal in a first frequency band is connected between a first input / output portion of the switch circuit and a second port. A second filter arranged to pass a signal in a second frequency band is connected between a second input / output portion and the second port. A phase adjusting circuit is provided such that an impedance in the second frequency band as seen from the first port while the switch circuit selects the first input / output portion is in a substantially short-circuited state. This arrangement prevents leakage of unwanted signals from a signal path used in a communication system not in operation among two communication systems for different frequency bands while the other communication system is engaged in communication.

A resonant power converter is provided. The resonant power converter comprises a balancing circuit for balancing the voltage in a feeding connection. The balancing circuit comprises: a first positive control means in series with an inductor, wherein the first positive control means and the inductor is coupled between the positive DC conductor and the feeding connection, and a second negative control means in series with the inductor, wherein the second negative control means are coupled between the negative DC conductor and the feeding connection. The first positive and second negative control means are adapted to be alternatingly switched on and off for balancing the resonant power converter, such that the voltage in the feeding connection is substantially the mean voltage of the positive DC conductor and the negative DC conductor.