Frequency shift-keying reader circuit

Abstract

A frequency shift-keying reader circuit includes a band-pass filter, a low noise amplifier, a first balun, an injection-lock divide-by-2 frequency divider, a sub-harmonic mixer and a low-pass filter. The band-pass filter performs a filtering procedure to a radio frequency signal, wherein the filtered radio-frequency signal is received by the low noise amplifier to provide an injection signal, and the injection signal is received by the first balun to generate a first differential signal and a second differential signal. The injection signal is received by the injection-lock divide-by-2 frequency divider to provide a first oscillation signal and a second oscillation signal, wherein the first differential signal, the second differential signal, the first oscillation signal and the second oscillation signal are received by the sub-harmonic mixer for performing a mixing procedure and thereafter generating an output signal, the low-pass filter performs a filtering procedure to the output signal.

Description

FIELD OF THE INVENTION[0001]The present invention is generally relating to a frequency shift-keying reader circuit, more particularly to the frequency shift-keying reader circuit with characteristic of injection lock.BACKGROUND OF THE INVENTION[0002]A conventional frequency shift-keying reader circuit comprises a band-pass filter, an injection-locked oscillator and a multiplier. The low-pass filter receives an input signal and performs a filtering procedure to the input signal. The injection locked oscillator receives the filtered input signal. Besides, the injection-locked oscillator is locked by the filtered input signal and outputs an oscillation signal. The input signal and the oscillation signal are received by the multiplier so as to perform a mixing procedure. Thereafter, an output signal is outputted from a low-pass filter after a filtering procedure of the low-pass filter. The operational frequency of modern wireless radio frequency achieves Giga Hertz level, the higher the...

AI Technical Summary

Benefits of technology

[0003]A primary object of the present invention is to make a lock frequency of a divide-by-2 frequency divider become half the operational frequency of a radio frequency signal to lower the power consumption of the frequency shift-keying reader circuit. Besides, by a mixing procedure of a sub-harmonic mixer, the frequency shift-keying reader circuit possesses high signal isolation to effectively decrease the DC displacement output of the frequency shift-keying reader circuit therefore improving the sensitivity of the frequency shift-keying reader circuit. Furthermore, the frequency shift-keying reader circuit possesses the function of low power consumption.

[0005]In the present invention, the lock frequency of the injection-lock divide-by-2 frequency divider is half the operational frequency of the injection signal, thus, the power consumption for injection lock is well reduced. Besides, due to excellent isolation of the sub-harmonic mixer, the DC displacement output of the frequency shift-keying reader circuit may be lowered effectively therefore making the sensitivity of the frequency shift-keying reader circuit improved substantially. The frequency shift-keying reader circuit in the present invention meets the Spec demand of short distance wireless communication owing to the characteristics of low power consumption and high sensitivity.

Problems solved by technology

The conventional frequency shift-keying reader circuit does not meet the Spec demand of short distance wireless communication characterized in low power consumption.

The self-mixing component is a DC displacement therefore increasing the bit error rate of the demodulating signal.

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