50results about "Modulation transference" patented technology

The current-mode end-to-end signal path includes a digital-to-analog converter (DAC) operating in current mode and an upconverting mixer operating in current mode and operably coupled to the DAC, where analog inputs and analog outputs of the DAC and the upconverting mixer are represented as currents, and the DAC generates a baseband signal.

Technologies directed to a frequency multiplier circuit of a customer terminal (CT) for doubling and tripling a frequency of a local oscillator are described. One communication device includes a local oscillator (LO) to generate a first differential signal having a first frequency and a frequency multiplier circuit to generate a second differential signal having a second frequency that is double the first frequency or a third differential signal having a third frequency that is triple the first frequency. The frequency multiplier circuit includes a variable capacitance circuit that is programmable to one of multiple capacitances and a variable inductance circuit that is programmed to a first inductance for the second differential signal and to a second inductance for the third differential signal.

A phase shifter including: an upconversion mixer configured to receive a local oscillator (LO) signal having a LO frequency, and configured to receive and multiply a radio frequency (RF) input signal with the LO signal to produce a modulated signal having two sidebands around the LO frequency, an intermediate IF sideband having frequency below the LO and an image sideband; a filter connected to and configured to receive the modulated signal from the upconversion mixer and to attenuate a range of frequencies corresponding to the image sideband to select and output the intermediate frequency (IF) sideband signal; and a downconversion mixer configured to receive and multiply the IF sideband signal with a phase shifted LO signal to produce an output signal including a phase shifted version of the RF input signal.

Certain aspects of the present disclosure generally relate to electronic circuits, and more particularly, to wireless transmitters. One example apparatus generally includes: an in-phase direct-current (DC) level shifter; a quadrature DC level shifter; an in-phase voltage-to-current (V2I) converter having an input coupled to an output of the in-phase DC level shifter; a quadrature V2I converter having an input coupled to an output of the quadrature V2I converter; a bias control circuit having inputs coupled to the in-phase V2I converter and the quadrature V2I converter, an output of the bias control circuit being coupled to at least one of the in-phase DC level shifter or the quadrature DC level shifter; an in-phase mixer having an input coupled to an output of the in-phase V2I converter; and a quadrature mixer having an input coupled to an output of the quadrature V2I converter.

To provide a receiver.SOLUTION: A receiver according to the present invention includes: an I branch including an I branch mixer that down-converts an RF (radio frequency) signal and outputs an I component and an I branch channelization filter that separates a baseband signal from the output signal of the I branch mixer; a Q branch including a Q branch mixer that down-converts the RF signal and outputs a Q component and a Q branch channelization filter that separates the baseband signal from the output signal of the Q branch mixer; a frequency-dependent mismatch estimator that calculates frequency-dependent mismatch between the I branch and the Q branch; and a frequency-dependent mismatch compensation unit that compensates for the frequency-dependent mismatch between the I branch and the Q branch on the basis of the calculation result of the frequency-dependent mismatch estimator.SELECTED DRAWING: Figure 1

The present invention relates to the technical field of wireless communications, and provides a communication circuit, method, apparatus, and system. The communication circuit comprises a modulation element, an energy convergence network, and a second resonant network. The modulation element disperses energy of a first microwave signal at a first frequency at a first port and transmits same to an energy network via a second port. The energy convergence network converges the dispersed energy to obtain a second microwave signal. The second resonant network performs secondary frequency selection on the second microwave signal and generates an oscillation signal at a second resonant frequency, and transmits the oscillation signal to the modulation element via a third port to mix with the first microwave signal, thereby obtaining a frequency-converted signal at a second frequency. The present invention provides multiple signal transmission paths from the energy convergence network to the second resonant network that bypass the modulation element, thereby reducing the loss of the second microwave signal and acquiring a frequency-converted signal with increased power, and correspondingly lowering the transmit power requirements of a transceiver apparatus and the microwave drive power threshold of the communication circuit.

A low noise block-downconverter system (LNB system) includes a local oscillator module having first and second phase locked loop circuitry (PLL circuitry) for downconverting an electrical signal to generate a downconverted signal. The first PLL circuitry receives a low-frequency reference signal that is used with an intermediate-frequency oscillator to generate an intermediate-frequency signal. The second PLL circuitry receives and uses the intermediate-frequency signal in conjunction with a high-frequency oscillator, separate from the intermediate-frequency oscillator, to generate a high-frequency signal. The high-frequency signal is used to downconvert the electrical signal. The signal dynamic range of the first PLL circuitry is higher than the signal dynamic range of the second PLL circuitry, thus achieving improved overall dynamic range for the LNB system. The first PLL circuitry may be a first integrated circuit defining a low phase-noise amplifier. A second integrated circuit may include the second PLL circuitry and the high-frequency oscillator.

An electronic device applies a frequency offset function to a first signal having a first frequency. The device includes a delay element configured to output a second signal corresponding to the first signal delayed by a duration equal to a first period of said signal divided by four. A circuit branch includes a first circuit configured to divide the frequency of the first signal by a given number coupled in series with a second circuit configured to implement an integration. The circuit branch outputs a third signal and a fourth signal. A single side band mixing circuit processes the first signal, second signal, third signal and fourth signal to generate an output signal.

A high-frequency signal is input to a first node. A high-frequency signal is output from each of a plurality of second nodes. A first branch transmission line connects the first node to each of the plurality of second nodes. The first branch transmission line includes a plurality of cascade-connected dividers, each of which has one input node and two output nodes. At least one of the dividers is an unequal divider with a distribution ratio of 2 or less. The first branch transmission line is configured to equally divide a high-frequency power input to the first node to the plurality of second nodes.

The present invention provides a filter configured to receive an input signal to generate a filtered signal. The filter includes a first component, a first capacitor and a second component. The first component is coupled between the input signal and a first terminal. The first capacitor is coupled between the first terminal and a second terminal. For the second component, a first node of the second component is coupled to the second terminal, and a second node of the second component is used to output the filtered signal. The first component and the second component are inductive components.

This application provides a radio frequency receive circuit, a receiver, and an electronic device, to reduce interference of noise to a first voltage signal, improve a signal-to-noise ratio of the first voltage signal, and implement wide-range switching between a high gain and a low gain of a second radio frequency signal through a gain adjustment circuit, thereby expanding an application scope of the radio frequency receive circuit. The radio frequency receive circuit may include a coupling circuit, the gain adjustment circuit, and a dual balanced frequency mixer. The coupling circuit may be configured to: convert a first radio frequency signal into at least two second radio frequency signals, and output the at least two second radio frequency signals to the gain adjustment circuit. The gain adjustment circuit may be configured to: selectively amplify or attenuate a gain of each second radio frequency signal, and output at least two third radio frequency signals to the dual balanced frequency mixer. The dual balanced frequency mixer may be configured to mix the at least two third radio frequency signals based on a local oscillation signal.

Provided is an array antenna device that can be used in a 300 GHz band. An array antenna device 100 comprises: a first layer 10 in which a plurality of antenna elements 11 are arranged in a grid shape; and a second layer 20 stacked on the first layer 10. The second layer 20 includes: a plurality of mixers 21 that are arranged in a plurality of grid regions 30 overlapping the plurality of antenna elements 11 in plan view, that each include an LO signal terminal 23, an IF signal terminal 24, and an RF signal terminal 22, with the RF signal terminals 22 electrically connected to the plurality of antenna elements 11; a plurality of LO signal lines 25 which are provided to respective columns of the plurality of mixers 21 and to each of which the LO signal terminals of mixers 21 of the same column are commonly connected; and a plurality of IF signal lines 27 that are provided to respective rows of the plurality of mixers 21 and to each of which the IF signal terminals of mixers 21 of the same row are commonly connected.

Passive IQ Mixer with Improved Conversion Gain This description relates to an IQ mixer (12) comprising a mixing stage (18) including a first mixer (MixI) and a second mixer (MixQ), and a first inductive block (BI) connected to the first mixer (MixI) and including at least one first inductive component, and a second inductive block (BQ) connected to the second mixer (MixQ) and including at least one second inductive component. Figure for the abbreviation: Fig. 4

A system for reference clock frequency correction is described. The system comprises a compensation module configured to (i) receive, as input, an oscillator signal and one or more control signals, (ii) generate a compensation signal based on the oscillator signal and the one or more control signals, wherein the generated compensation signal is a discretized sinusoidal signal having a controllable frequency, and (iii) output the generated compensation signal. The system further comprises a mixer block configured to (i) receive, as input, the generated compensation signal and the oscillator signal, and (ii) generate an output clock signal by mixing the generated compensation signal with the oscillator signal. A soft-switching method to reduce the effect of quantization noise is further described.

The invention relates to a receiver system. There is provided a system comprising a plurality of receivers, each receiver comprising a local oscillator configured to generate a local oscillation signal; a primary mixer configured to mix an input signal with a reference signal at a reference frequency to generate a first output signal; a frequency divider configured to divide the reference signal into a second reference signal at a second frequency; and a secondary mixer coupled to the primary mixer and configured to mix the first output signal with a second reference signal at a second frequency. In the first mode, a reference signal of a first receiver in the plurality of receivers is a local oscillation signal from the first receiver; in the second mode, the reference signal is a local oscillation signal from another receiver of the plurality of receivers.

Receiving device, comprising: a frequency mixer (11) configured to mix a received signal input therein and a local signal generated by a local oscillator (12) in order to convert a frequency of the received signal into a baseband; an envelope demodulator (13) configured to perform an envelope demodulation of an output of the frequency mixer (11); an upper sideband demodulator (14) configured to demodulate only one upper sideband of an output from the frequency mixer (11) by single-sideband demodulation; a lower sideband demodulator (15) configured to demodulate only one lower sideband of the output from the frequency mixer (11) by single-sideband demodulation; a first adder (16) configured to add an output from the envelope demodulator (13) and a first inverted output obtained by inverting an output from the upper sideband demodulator (14); a second adder (17) configured to add the output from the envelope demodulator (13) and a second inverted output obtained by inverting an output from the lower sideband demodulator (15); and a third adder (18) configured to add the output from the envelope demodulator (13), a third inverted output obtained by inverting an output from the first adder, and a fourth inverted output obtained by inverting an output from the second adder to produce a demodulation signal.

The present invention relates to a method for calibrating a single sideband, SSB, receiver (1), the method (M) comprising: a) adjusting a mutual phase shift (ΔΘ) of I- and Q-signals (I, Q) to a first phase shift value (ΔΘ1); b) feeding a first, a second and a third test signal (S1, S2, S3) having a predetermined phase offset (ΔΦ) to an input (2) to obtain respective SSB signals (R1, R2, R3), and measuring a first and a second phase difference (Δϕ12, Δϕ23) therefrom; c) calculating a first phase error (Eϕ,1) on the basis of the first and second phase differences (Δϕ12, Δϕ23); d) repeating steps a) - c) with a second phase shift value (ΔΘ2) to obtain a second phase error (Eϕ,2); and e) calibrating the SSB receiver (1) by using that one of the first and second phase shift values (ΔΘ1, ΔΘ2) that has yielded the smaller one of the first and second phase errors (Eϕ,1, Eϕ,2).

The local oscillator device comprises an oscillator module (OSC) having a first inductive element (L) and a capacitive element (C) connected in parallel, and a frequency divider (fDiv) coupled to the oscillator module (OSC) to deliver a local oscillator signal (LO, LO1-LO4). The local oscillator device (DIS) comprises an autotransformer (TR) comprising the first inductive element (L) and two second inductive elements (L1, L2) respectively coupled to the terminals (La, Lb) of the first inductive element (L) and to two output terminals of the autotransformer (OUT1, OUT2), said output terminals (OUT1, OUT2) being furthermore coupled to input terminals (IN1, IN2) of the frequency divider (fDiv).

Certain aspects of the present disclosure provide techniques and apparatus for generating oscillating signals and for wireless communication, such as a frequency synthesizer architecture using a step-symmetric inductor. An example frequency synthesizer generally includes an oscillator and a frequency adjustment circuit, an output of the oscillator being coupled to an input of the frequency adjustment circuit, the frequency adjustment circuit comprising a step-symmetric inductive element. An example transceiver generally includes the frequency synthesizer described herein, as well as a mixer having a local-oscillator (LO) input coupled to an output of the frequency adjustment circuit; and an amplifier coupled to the mixer.

The present disclosure provides a receiving circuit for adaptive impedance matching and an operating method thereof. The receiving circuit includes: a first amplification module configured to amplify an input signal input from an input end of the first amplification module to generate a first amplified signal; a frequency mixing module, an input end of which is connected to an output end of the first amplification module, and configured to down-convert the first amplified signal to generate a down-converted signal; and a second amplification module, an input end of which is connected to an output end of the frequency mixing module, and configured to amplify the down-converted signal to generate an output signal, wherein the first amplification module includes an active negative feedback structure for providing adaptive impedance matching in a first bandwidth range.

Carrier aggregation (CA) may cause interference between operation on two or more carriers within a user equipment (UE). This interference can degrade signal quality on one or more of the carriers involved in the carrier aggregation, which may be referred to as "desensing" one or more carriers. One or more isolating buffers may be coupled at a down-conversion mixer at a point where the down-conversion mixer receives a signal from a transmission line for isolating the transmission line from other transmission lines. The isolating buffer may reduce the effect of interference between multiple transmission lines carrying different carriers during carrier aggregation (CA) operation. The isolating buffers may be used in an RF transceiver supporting both 5G sub-7 GHz and 5G mmWave wireless networks and carrier aggregation across sub-7 GHz and mmWave bands.

A circuit to detect faults in a MEMS device (2) including a mass (3) that oscillates periodically, which receives a position signal (px[n]) formed by a succession of samples of an analog signal (px(t)) that is a function of the position of the mass (3) and has an amplitude and an oscillation frequency. The circuit includes: a reference stage (32) that generates a first reference signal (xref[n]) and a second reference signal (yref[n]) formed by successions of samples of a first sinusoidal signal and a second sinusoidal signal, respectively, with a frequency equal to the oscillation frequency and phase-shifted by 90°; a first multiplier (34) and a second multiplier (36), which generate, respectively, a first product signal (y[n]) and a second product signal (y[n], x[n]) via multiplication of the position signal by the first reference signal and the second reference signal, respectively; a first filter (40) and a second filter (42) of a lowpass type, which filter, respectively, the first and second product signals (y[n], x[n]) and generate a first filtered signal (YLPF[n]) and a second filtered signal (XLPF[n]); an estimator stage (46), which determines estimates of the amplitude, as a function of the first and second filtered signals (YLPF[n], XLPF[n]); and a decision stage (48), which compares the estimates with a range of values and detects the presence of faults on the basis of the outcomes of the comparisons.

There is provide a system comprising a plurality of receivers, each receiver comprising a local oscillator configured to generate a local oscillation signal, a primary mixer configured to mix an input signal with a reference signal at a reference frequency to generate a first output signal, a divider configured to divide the reference signal into a second reference signal at a second frequency and a secondary mixer coupled to the primary mixer and configured to mix the first output signal and the second reference signal at the second frequency. In a first mode, the reference signal for a first of a plurality of the receivers is the local oscillation signal from the first receiver and, in a second mode, the reference signal is the local oscillation signal from another of the plurality of receivers.

An object of the present invention is to provide a quadrature mixer that can suppress the generation of image waves. [Solution] A quadrature mixer consisting of first and second unit mixers that uses the mth order (m is a natural number) of an LO wave as a carrier wave, has an LO distribution section that equally distributes the LO wave and gives it a phase difference of π / 2m and outputs it to the LO terminals of the first and second unit mixers, has a power combiner that combines the output wave from the first unit mixer and the output wave from the second unit mixer, and is characterized by having LO harmonic suppression sections with the same characteristics that suppress higher-order harmonics of the LO wave, located symmetrically at the same electrical length from the output terminals of the LO distribution section between the output terminal of the LO distribution section and the input terminal of the power combiner.

This disclosure provides a radio frequency receive circuit, a receiver, and an electronic device, to reduce interference of noise to a first voltage signal, thereby expanding an application scope of the radio frequency receive circuit. The radio frequency receive circuit may include a coupling circuit, the gain adjustment circuit, and a dual balanced frequency mixer. The coupling circuit may be configured to: convert a first radio frequency signal into at least two second radio frequency signals, and output the at least two second radio frequency signals to the gain adjustment circuit. The gain adjustment circuit may be configured to: selectively amplify or attenuate a gain of each second radio frequency signal, and output at least two third radio frequency signals to the dual balanced frequency mixer. The dual balanced frequency mixer may be configured to mix the at least two third radio frequency signals based on a local oscillation signal.

Provided are a digital up conversion processing device, and an intermediate frequency link in a wireless communication system. The digital up conversion processing device includes N main body modules and a combination module, wherein N is a positive integer greater than or equal to 1; each of the N main body modules includes: a gain module, a shaping filtering module, a Digital Up Converter (DUC) module, a first frequency mixing module, and a second frequency mixing module; an input end of the gain module is configured to input a carrier signal, and an output end of the gain module is connected to an input end of the shaping filtering module and an input end of the DUC module; an output end of the shaping filtering module is connected to the input end of the DUC module and an input end of the second frequency mixing module; an output end of the DUC module is connected to an input end of the first frequency mixing module and the input end of the second frequency mixing module; an output end of the second frequency mixing module is configured to output the carrier signal; an output end of the first frequency mixing module is connected to an input end of the combination module; and an output end of the combination module is connected to the input end of the shaping filtering module.

Provided is an array antenna device that can be used in a 300 GHz band. An array antenna device 100 comprises: a first layer 10 in which a plurality of antenna elements 11 are arranged in a grid shape; and a second layer 20 stacked on the first layer 10. The second layer 20 includes: a plurality of mixers 21 that are arranged in a plurality of grid regions 30 overlapping the plurality of antenna elements 11 in plan view, that each include an LO signal terminal 23, an IF signal terminal 24, and an RF signal terminal 22, with the RF signal terminals 22 electrically connected to the plurality of antenna elements 11; a plurality of LO signal lines 25 which are provided to respective columns of the plurality of mixers 21 and to each of which the LO signal terminals of mixers 21 of the same column are commonly connected; and a plurality of IF signal lines 27 that are provided to respective rows of the plurality of mixers 21 and to each of which the IF signal terminals of mixers 21 of the same row are commonly connected.

One or more systems, devices, or methods of use or combinations thereof provided herein relate to a device that can facilitate signal generation. The current-mode end-to-end signal path can include a digital-to-analog converter (DAC) operating in a current mode and an up-converting mixer operating in a current mode and operably coupled to the DAC. The analog inputs and analog outputs of the DAC and the up-converting mixer can be represented as currents, and the DAC can generate a baseband signal. In one or more embodiments, a current source and a diode-connected transistor can be placed in parallel in the current-mode signal path between a baseband filter and an output stage that includes the up-converting mixer. The device and / or system can be a radio frequency DAC. The diode-connected transistor can be programmable to change the gain or can be directly connected to the output stage without a turnaround current mirror connected therebetween, or both.