372results about "Amplifier details" patented technology

An electronic device may include a transmitter coupled to an antenna over a signal path that runs through a front end module. The front end module may include a power amplifier disposed on the signal path. The front end module may include first, second, and / or third signal attenuators disposed on the signal path between an input of the amplifier and the transmitter. The front end module may include a voltage sensor that measures a bias voltage of the amplifier, a temperature that measures a temperature of the amplifier, and / or an impedance sensor that measures an impedance of the antenna. The first signal attenuator may be adjusted based on the measured bias voltage, the second signal attenuator may be adjusted based on the measured temperature, and the third signal attenuator may be adjusted based on the measured impedance to mitigate changes in the amplifier as operating conditions change over time.

Systems and techniques are provided for power amplifier gain error compensation for a Digital Power Amplifier (DPA). In some aspects, a compensation method includes obtaining in-phase (I) and quadrature-phase (Q) components of a baseband sample corresponding to in-phase input amplitude codes and quadrature-phase input amplitude codes. The in-phase input amplitude codes can be distorted based on first gain pre-compensation information corresponding to an in-phase signal branch of the DPA, to generate pre-distorted output amplitude codes of the I component. The quadrature-phase input amplitude codes can be distorted based on second gain pre-compensation information corresponding to a quadrature-phase signal branch of the DPA, to generate pre-distorted output amplitude codes of the Q component. The DPA can be driven using the pre-distorted output amplitude codes of the I and Q components to generate a Radio Frequency (RF) output.

An impedance matching network for a radio frequency (RF) transmission system can include first port for coupling to a first transistor differential pair. The network can further include a second port for coupling to a second transistor differential pair. The network can further include a matching network connected to the first port and the second port, the matching network comprised of a pair of coupled lines. Other aspects are described.

According to embodiments, a method performed by an electronic device includes: identifying a channel bandwidth; identifying one or more active DPD units among a plurality of DPD units of a digital pre-distortion (DPD) circuit based on the channel bandwidth and amount of resource allocated within the channel bandwidth; generating a DPD output signal of the DPD circuit based on the one or more active DPD units; generating an amplifier output signal based on the DPD output signal of the DPD circuit, a digital-to-analog converter (DAC), and a power amplifier (PA). While the DPD output signal is generated, at least one DPD unit different from the one or more active DPD units among the plurality of DPD units of the DPD circuit is deactivated.

A signal processing device includes a circuit system, in which the circuit system includes an amplifier, a temperature compensating circuit and a computing circuit. The amplifier is configured to amplify an input signal according to a temperature compensating current, in order to generate an output signal. A direct current offset of the output signal is related to the temperature compensating current. The temperature compensating circuit includes a detecting resistor and a comparator. The detecting resistor is configured to generate a detecting voltage according to the temperature compensating current. The comparator is configured to compare the detecting voltage with a reference voltage to generate a comparison signal. The computing circuit is configured to adjust the temperature compensating current according to the comparison signal so as to make the detecting voltage approximate to the reference voltage.

Aspects of this disclosure relate to squelching a symbol at a symbol boundary. A transmit squelch block can squelch a portion of a symbol at a symbol boundary. The transmit squelch block can be included in a symbol based envelope tracking system. Transmit squelching can reduce spurious emissions associated a symbol based envelope tracking voltage toggling on a symbol boundary.

In one embodiment, an apparatus includes a baseband processor to generate a baseband signal and a digital pre-distortion (DPD) circuit to pre-distort the baseband signal with compensation information obtained from a lookup table. The lookup table may have a plurality of entries each to store a pre-distortion value, the lookup table to be addressed based on a target output power level of the baseband signal. The apparatus also may include a converter to convert the pre-distorted baseband signal to an analog signal and radio frequency (RF) circuitry comprising: a mixer to upconvert the analog signal to a pre-distorted RF signal, and a power amplifier to amplify the pre-distorted RF signal.

A control device (100) for controlling a number N, with N ≥ 1, of actuators (200) for actuating N optical elements (310) of an optical system (300), comprising a control node (K2) coupling to the actuator (200) for providing a control voltage (V2) for the actuator (200), and an amplifier (110) configured to receive a supply voltage (V1) provided at an input node (K1) and to provide an output voltage (V3) at an output node (K3), wherein the amplifier (110) comprises a plurality M, with M ≥ 2, of current sources (111, 112) comprising at least one controlled current source (112) and a holding capacitor (113) for maintaining the level of the provided output voltage (V3), wherein the controlled current source (112) comprises a transistor (114), whose gate terminal can be controlled by an adjustable first control signal (S1),and has an adjustable resistor (115) coupled to the transistor (114).

A Differential Input, Single-ended Output Quadrature Hybrid Coupler (DISO-QHC) is based on baluns, one or two phase shifters, and a Wilkinson combiner. The DISO-QHC is configured to receive two differential, quadrature RF signals from differential PAs and output a combined, single-ended RF signal to drive an antenna element or subarray. Impedance matching transformers configured as baluns perform the differential-to-single-ended conversion and PA output impedance matching, without any requirement on coupling factor. One or two phase shifting circuits align the single-ended, quadrature RF signals in phase. A Wilkinson combiner circuit combines the power of the outputs of the phase shifting circuits. Area and losses are reduced by combining components from the phase shifting circuits with the baluns, and with the Wilkinson combiner circuit (which is implemented with lumped-reactance components rather than transmission lines). The DISO-QHC does not have a specific isolation port, but the isolation resistor within the Wilkinson combiner dissipates the differential and reflected signal from the PAs resulting from the incoming wave reflected from the antenna. The DISO-QHC is compatible with a LMBA functionality. By injecting a current at the center point of the isolation resistor in the Wilkinson combiner, the impedance at PA ports can be modulated.

Apparatus and techniques for adaptively adjusting an input current limit of a boost converter that supplies power to a load, such as an amplifier. An exemplary circuit for supplying power generally includes a boost converter having an output coupled to the load, and logic configured to adaptively adjust the input current limit of the boost converter and apply the input current limit to the boost converter based on an estimated output power of the boost converter. One exemplary method for supplying power generally includes converting an input voltage to an output voltage by a boost converter to power a load for the boost converter, adaptively adjusting the input current limit of the boost converter based on the estimated output power of the boost converter, and applying the input current limit to the boost converter during conversion.

Disclosed herein is reducing equivalent series resistance (ESR) of a power management circuit during a single transmission. The power management circuit includes a plurality of power amplifier circuits each configured to amplify a signal for transmission. The power management circuit includes a main multi-stage charge pump (MCP), a first voltage modulation circuit, a light-weight MCP, and a second voltage modulation circuit. When only one of the power amplifiers is active to amplify a signal for a single transmission, the power management circuit will opportunistically couple the main MCP, the first voltage modulation circuit, the light-weight MCP, and the second voltage modulation circuit to the active power amplifier. Thus, the active power amplifier will see a reduced ESR collectively presented by the main MCP, the first voltage modulation circuit, the light-weight MCP, and the second voltage modulation circuit, and can therefore operate with improved efficiency during the single transmission.

Embodiments described herein relate to methods and apparatuses for performing digital predistortion, DPD, to provide a transmit signal, x̆(n) wherein the transmit signal, x̆(n), is for deriving one or more amplifier signals, x̆m(n), for driving one or more power amplifiers, wherein the one or more power amplifiers are associated with a respective one or more antenna elements. A method comprises: receiving a first signal, x(n); inputting the first signal, x(n), into a combination model, wherein the combination model comprises a machine learning, ML, model and a memory polynomial, MP, model; and outputting the transmit signal x̆(n), from the combination model.

In an embodiment, a circuit includes a first input terminal configured to be coupled to a first terminal of a first capacitor, a second input terminal configured to be coupled to a second terminal of the first capacitor, a balun including a primary inductor and a secondary inductor, and a second capacitor. The primary inductor includes a first terminal coupled to the first input terminal, a second terminal coupled to the second input terminal, a first inductive portion coupled between the first terminal of the primary inductor and a first intermediate terminal, a second inductive portion coupled between the second terminal of the primary inductor and a second intermediate terminal, and a third inductive portion coupled between the first and second intermediate terminals. The secondary inductor includes a first terminal coupled to a ground terminal. The second capacitor is coupled between the first and second intermediate terminals.

The invention discloses an automatic gain control circuit, an automatic gain control method and communication equipment. The automatic gain control circuit comprises a first gain module and a receiving control module, the receiving control module comprises an attenuation unit and an acquisition unit, the first gain module is used for receiving an input signal, and the first gain module, the attenuation unit and the acquisition unit are connected in sequence; the first gain module is configured to reduce the gain when the attenuation amount of the attenuation unit reaches a preset attenuation threshold value and the signal intensity of the input signal is greater than the preset intensity of the acquisition unit; and the attenuation unit is configured to attenuate the signal intensity of the input signal step by step when the signal intensity of the input signal after gain is greater than the preset intensity of the acquisition unit. By adopting the scheme, the linearity of the circuit is improved, and the circuit cost is reduced.

Aspects of temperature dependent stabilization and peaking control in amplifiers are described. An example amplifier includes a variable gain amplifier, a power amplifier, a variable compensation element coupled to the variable gain amplifier, and a controller that directs operation of the variable compensation element to adjust one or more operating characteristics of the amplifier. In one aspect, the variable compensation element comprises a variable impedance, and the controller varies the impedance across inputs of the variable gain amplifier based on temperature to stabilize the amplifier. In another aspect, the variable compensation element comprises a negative capacitance, and the controller varies a coupling of the negative capacitance across inputs of the variable gain amplifier based on temperature to linearize gain of the amplifier. The variable compensation element can include both a variable impedance and negative capacitance, and stability, peaking control, and linearity of the amplifier can be controlled.

This application relates to a predistortion circuit for a wireless transmitter and a method for generating a predistorted baseband signal. Specifically, the invention discloses a predistortion circuit for a wireless transmitter, comprising a signal input configured to receive a baseband signal. Furthermore, the predistortion circuit includes a predistorter configured to generate a predistorted baseband signal using the baseband signal and a selection of a first predistorter configuration and a second predistorter configuration.

A power supply switch circuit includes a first switch configured to supply a first power supply voltage to a power supply terminal of a power amplifier, a control voltage generator configured to compare a first voltage of the power supply terminal with a predetermined first reference voltage to generate a first control voltage higher than the first power supply voltage, and a switch controller configured to use the first control voltage to generate a switching driving signal controlling the first switch.

A millimeter wave (mmW) communication system located on a millimeter wave integrated circuit (MMW-IC) includes a phase shifter selectively connected to a receive path by a first electromagnetic (EM) element and selectively connected to a transmit path by a second EM element, the first EM element configured to receive a transmit signal and configured to receive a receive signal from a low noise amplifier (LNA), the second EM element configured to receive a phase shifted transmit signal or a phase shifted receive signal from the phase shifter, and wherein the second EM element is configured to selectively provide the phase shifted transmit signal to a power amplifier on the mmW-IC and the phase shifted receive signal to receive signal processing circuitry located off of the mmW-IC.

This application relates to methods and apparatus for controlling a switching driver to drive a load with a drive signal based on an input signal. A controller is configured to control modulation of at least one driver output node between selected switching voltages of a set of at least four different switching voltages to generate the drive signal. The output node is modulated according to a switching pattern and the controller is configured such that, for a given level of drive signal, the controller can selectively operate with a plurality of different switching patterns and selects an appropriate switching pattern to control at least one parameter of the switching driver other than the drive voltage.

A stacked amplifier, radio frequency transceiver circuit, device and switching control method, the stacked amplifier comprising a first transistor (41), a second transistor (42) and a bias circuit (43); the bias end of the first transistor (41) is connected to ground, and the output end is connected to the input end of the second transistor (42); the bias end of the second transistor (42) receives a bias voltage through the bias circuit (43), and the bias circuit (43) comprises a bias resistor and a variable impedance device. High impedance in the off state can be achieved, and the bidirectional loss of the circuit is reduced.

An exemplary device includes a first primary coil, a second primary coil, a combined power output, a first directional coupler output, and a second directional coupler output. The exemplary device also includes a secondary coil coupled to the combined power output, configured for magnetic coupling with the first primary coil and configured for magnetic coupling with the second primary coil. The exemplary device further includes a tertiary coil configured for magnetic coupling with the secondary coil, comprising a first end coupled to the first directional coupler output and a second end coupled to the second directional coupler output.

Systems and techniques are provided for power amplifier gain error compensation for a Digital Power Amplifier (DPA). In some aspects, a compensation method includes obtaining in-phase (I) and quadrature-phase (Q) components of a baseband sample corresponding to in-phase input amplitude codes and quadrature-phase input amplitude codes. The in-phase input amplitude codes can be distorted based on first gain pre-compensation information corresponding to an in-phase signal branch of the DPA, to generate pre-distorted output amplitude codes of the I component. The quadrature-phase input amplitude codes can be distorted based on second gain pre-compensation information corresponding to a quadrature-phase signal branch of the DPA, to generate pre-distorted output amplitude codes of the Q component. The DPA can be driven using the pre-distorted output amplitude codes of the I and Q components to generate a Radio Frequency (RF) output.

According to one embodiment, an electronic device comprises: a memory that stores instructions; a first power amplifier (PA) selectively connected to at least one of a plurality of modulators via a first switch; a first modulator of the plurality of modulators that includes a second switch connected between the first switch and a first capacitor, and a third switch connected to an output end of a first buck converter, and is configured to operate in an envelope tracking (ET) mode or an average power tracking (APT) mode; a second modulator of the plurality of modulators that includes a fourth switch connected between the first switch and a second capacitor, and a fifth switch connected to an output end of a second buck converter, and is configured to operate in an ET mode or an APT mode; and at least one processor that is operatively coupled to the first PA, the first modulator, and the second modulator, and comprises a processing circuit, wherein the instructions, when executed by the at least one processor, cause the electronic device to control the first modulator to operate in the APT mode on the basis of identifying a first event associated with network communication, control the first switch so as to couple the first PA to the first modulator and the second modulator, control the second switch, the third switch, and the fourth switch to be turned on, and control the fifth switch to be turned off on the basis of the first modulator operating in the APT mode.

The invention relates to a driving circuit capable of reducing power loss and an operation method thereof, which are suitable for driving a display panel, and the driving circuit comprises at least one operational amplifier. The operation method comprises the following steps: firstly, detecting and determining an input voltage of the operational amplifier, and providing a first operation voltage and a second operation voltage according to the input voltage; based on the fact that a first operation voltage and a second operation voltage of the operational amplifier are adjustable and the first operation voltage and the second operation voltage are related to an input voltage, the operational amplifier can be operated in an adjustable voltage interval between the first operation voltage and the second operation voltage. Therefore, the power consumption of the driving circuit is effectively reduced, and when the driving circuit is applied to driving the display panel device, the power consumption minimization effect can be better realized.

To provide a switched capacitor type amplifier which does not need a reference voltage source.SOLUTION: A switched capacitor type amplifier comprises: an operational amplifier including two input and output terminals of a positive polarity and a negative polarity; a first capacitive element connected between a voltage input terminal and the input terminal of the negative polarity of the operational amplifier; a second capacitive element connected between the input terminal and the output terminal of the negative polarity of the operational amplifier; a switch element for accumulating electric charge corresponding to a voltage of the voltage input terminal in the first capacitive element in a first phase; and a switch element for moving the electric charge accumulated in the first capacitive element to the second capacitive element in the second phase. In the switched capacitor type amplifier, the operational amplifier includes a pair of differential input transistors and a pair of load elements connected in series with the pair of differential input transistors. The input terminal of the positive polarity is connected to a reference potential point, and the pair of load elements is set to be different resistance values.SELECTED DRAWING: Figure 1

This application provides an operational amplifier that increases the stability and settling speed of a common-mode feedback circuit. The operational amplifier includes N stages of amplifiers connected in series and M common-mode feedback circuits, where N and M are integers, N≥3, and N≥M>1. An ith common-mode feedback circuit in the M common-mode feedback circuits is configured to: detect a common-mode output voltage of a (j+b)th stage of amplifier, and regulate an electrical parameter of at least one of the jth stage of amplifier to the (j+b)th stage of amplifier, to stabilize the common-mode output voltage of the (j+b)th stage of amplifier. An Mth common-mode feedback circuit is configured to detect and stabilize a common-mode output voltage of an Nth stage of amplifier. Herein i, j, and b are integers, M≥i≥1, N≥j≥1, i≥j, j+b≤N, and b≥0.

A temperature sensor, used to detect the temperature of the circuit under test, includes a temperature coefficient component, a multiplier, an impedance component, and a node. The temperature coefficient component is positioned adjacent to the circuit under test. The control terminal of the multiplier is coupled to the second terminal of the temperature coefficient component. The impedance component is coupled between the second terminal of the temperature coefficient component and the control terminal of the multiplier, or between the second terminal of the multiplier and a third voltage terminal. A node is formed between the second terminal of the temperature coefficient component and the control terminal of the multiplier. The voltage at the node is positively correlated with the temperature of the circuit under test. The amplified detection current flowing to the first terminal of the multiplier is positively correlated with the temperature of the circuit under test.

High-swing push-pull assisted Voltage Mode Logic (VML) driver circuits can enhance output voltage amplitude to improve efficiency and performance in electronic applications. For example, this is accomplished by utilizing a primary current generator circuit that is powered by a supply voltage to generate a primary current. The primary current is provided, through a switching circuit, to an output node that, in response to an input signal, generates a first output voltage. Further, a supplementary current generator circuit is coupled to the switching circuit to generate a secondary current. The combination of the primary and secondary currents increases the amplitude of the first output voltage, thereby enabling the VML driver circuit to deliver enhanced performance, particularly in applications requiring precise voltage control and high efficiency.

An RF amplifier includes at least one harmonic trap filter with an array of shunt filter legs having a non-uniform resonance frequency distribution. The harmonic trap filter is configured to suppress frequencies in a suppression frequency range that includes harmonic frequencies of carrier frequencies in a range of carrier frequencies. Each of the shunt filter legs includes a capacitor and inductor coupled in series, and an intermediate node coupled between the capacitor and the inductor. Each intermediate node of the shunt filter leg is coupled to at least one other intermediate node of another shunt filter leg of the filter with a dampening resistor. Shunt filters at or near edges of the array are configured to have lower resonance frequencies than those at or near the center of the array to suppress excess current flow at edges of the RF amplifier.

The invention discloses a radio frequency system. According to the technical scheme of the embodiment of the invention, the power supply voltage is provided for the power amplification module through the voltage regulator, and the power supply voltage has the same variation trend as the amplitude of the amplified voltage signal generated by the power amplification module, so that the efficiency of the radio frequency system is improved.