41 results about "Digital transmitter" patented technology

An system includes a port to receive a number of bits at a first frequency. One or more cells generate a signal for a channel with a channel frequency that is N times greater than the first frequency. The cells transmit at a second frequency that is M times greater than the first frequency but is smaller than the channel frequency. Interface links are coupled between a portion of the input bits of the port and the one or more cells and the portion of the input bits is encoded by thermometer coded T bits such that each one of the T bits is encoded by M repeated parallel bits having a value of a respective T bit. Each interface link includes M interface lines between each T bit and each first cell, and M is smaller than N to reduce the number of interface lines for the T bits.

This disclosure provides a digital transmitter, relating to the field of transmitter technology. It includes: a baseband data generation unit for multi-phase output of baseband data; and a basic unit including an I-channel mixer and a Q-channel mixer. The I-channel mixer performs mixing processing on the multi-phase outputs of the positive-phase I-channel baseband data and the negative-phase I-channel baseband data, while the Q-channel mixer performs mixing processing on the multi-phase outputs of the positive-phase Q-channel baseband data and the negative-phase Q-channel baseband data. The positive-phase outputs of the I-channel and Q-channel mixers are respectively connected to the positive-phase RF input of the digital transmitter, and the negative-phase outputs of the I-channel and Q-channel mixers are respectively connected to the negative-phase RF input of the digital transmitter. This disclosure simplifies the circuit structure of traditional digital transmitters and enables effective bandwidth expansion. Furthermore, by introducing multi-tap filtering for the baseband data, better spectrum shaping can be achieved.

This invention provides a high-precision calibration system and method for a multi-channel ADC, relating to the field of communication technology. The system includes a digital transmitter, a DAC module, a calibration loop, and a multi-channel ADC module connected sequentially. It also includes a correlation module, a parameter estimation module, and a compensation module. The correlation module is connected to both the digital transmitter and the multi-channel ADC module. The parameter estimation module is connected to both the correlation module and the compensation module. The compensation module is also connected to the multi-channel ADC module. The calibration loop connects the end of the transmit link and the beginning of the receive link. This invention combines the analog and digital domains through the calibration loop, achieving deviation compensation by performing a single cross-correlation operation and parameter estimation on the local reference signal and multiple sub-signals. This method eliminates the need to redesign analog circuits and does not rely on external instruments for calibration. It features low hardware complexity, high stability, and a short estimation cycle, without affecting normal service operation.

The invention provides a self-detection calibration device and method of a radio frequency emission system, and relates to the technical field of communication, the device comprises a digital transmitter, a DPD module, a peak detection module, a peak processing module, a DPD feedback loop and an adaptive DPD algorithm module, and also comprises a DPD controller and a PSAT detection module. By adding the functions of dynamic PSAT monitoring and feedback, peak monitoring and protection, self-adaption of DPD training and the like, the real-time stability and safety of a radio frequency transmitting system can be effectively improved, it is guaranteed that DPD works in the optimal interval, the overall correction quality is improved, and EVM and ACPR of radio frequency signals are guaranteed.

1. The name of the design product: digital transmitter (basic version). 2. The use of the design product: conversion module for converting weighing sensor signal into digital signal transmission to PLC. 3. The design points of the design product: in shape. 4. The picture or photo that best indicates the design points: front view.

The embodiment of the invention discloses a phase-locked loop, a digital transmitter and communication equipment, the phase-locked loop comprises a phase discrimination circuit, an oscillation circuit and a feedback circuit, the phase discrimination circuit comprises a time-to-digital converter and a digital filter, the oscillation circuit comprises an oscillator, and the digital filter is coupled between the output end of the time-to-digital converter and the input end of the oscillator; the feedback circuit comprises a first frequency divider and a second frequency divider, the first frequency divider is coupled between the output end of the oscillator and the input end of the second frequency divider, the second frequency divider is coupled between the output end of the first frequency divider and the input end of the time-to-digital converter, the frequency dividing ratio of the first frequency divider is variable, and the frequency dividing ratio of the second frequency divider is fixed. According to the phase-locked loop provided by the embodiment of the invention, the accuracy of the output signal of the phase-locked loop can be improved.

An electronic device may include wireless circuitry with a baseband processor, a digital transmitter, a digital-to-analog-converter (DAC), and an antenna. The baseband processor may produce baseband signals. The digital transmitter may generate self-interference-compensated signals based on the baseband signals. The DAC may generate radio-frequency signals for transmission by the antenna based on the self-interference-compensated signals and square-wave local oscillator waveforms. The digital transmitter may include a self-interference canceller that generates the self-interference-compensated signals. The self-interference-compensated signals may mitigate the creation of self-interferer repetition replicas that land on the carrier frequency of the radio-frequency signals. This may allow the radio-frequency signals to be free from error vector magnitude degradation and spectral regrowth that would otherwise be produced due to self-interference in the radio-frequency signals output by the DAC.

An electronic device may include wireless circuitry with a baseband processor, a digital transmitter, a digital-to-analog-converter (DAC), and an antenna. The baseband processor may produce baseband signals. The digital transmitter may generate self-interference-compensated signals based on the baseband signals. The DAC may generate radio-frequency signals for transmission by the antenna based on the self-interference-compensated signals and square-wave local oscillator waveforms. The digital transmitter may include a self-interference canceller that generates the self-interference-compensated signals. The self-interference-compensated signals may mitigate the creation of self-interferer repetition replicas that land on the carrier frequency of the radio-frequency signals. This may allow the radio-frequency signals to be free from error vector magnitude degradation and spectral regrowth that would otherwise be produced due to self-interference in the radio-frequency signals output by the DAC.

The present invention discloses a radio frequency transmitter, comprising: at least one main array and at least one impedance compensation array; the main array and the impedance compensation array are arranged in parallel; the main array includes a plurality of basic units 1, and the impedance compensation array includes a plurality of basic units 2, the output ends of the basic units 1 being connected in parallel via a first signal line, and the output ends of the basic units 2 being connected in parallel via a second signal line; when the radio frequency transmitter is in operation, X basic units 1 in the main array are turned on, and N-X basic units 2 in the impedance compensation array are turned on, and the turned-on basic units 1 in the main array operate in response to a baseband control code, and the turned-on basic units 2 in the impedance compensation array operate in response to a complementary signal of the baseband control code, so that the impedance generated by the main array and the impedance generated by the impedance compensation array mutually cancel each other out. The present invention can fundamentally eliminate factors that cause circuit nonlinearity, has the advantage of being insensitive to changes in process angle, temperature, voltage, and frequency, and can realize a high-linearity, high-robustness, broadband digital transmitter.

The invention relates to a digital transmitter (10) for providing a high-frequency analog signal, the transmitter comprising: conversion means (3) for receiving a digitally modulated baseband signal (12) and providing a discrete spectrum of the digitally modulated baseband signal (12) in polar coordinates or in oblique coordinates; and a synthesis means (90) for generating the high-frequency analog signal on the basis of the discrete spectrum provided in polar coordinates or in oblique coordinates, where the synthesis means (90) is a means for performing a continuous inverse Fourier transform. The invention also relates to a method for providing a high-frequency analog signal, comprising: receiving a digitally modulated baseband signal; and providing a discrete spectrum of the digitally modulated baseband signal in polar coordinates or in oblique coordinates; and generating the high-frequency analog signal based on the discrete spectrum provided in polar coordinates or in oblique coordinates by performing a continuous inverse Fourier transform.

The present application discloses a method for correcting pulse distortion in a multi-level phase-shifted all-digital transmitter, which relates to the field of all-digital transmitters. The method comprises: determining a relationship between a total delay error and a phase-shift control word; determining an integer multiple error relationship between the total delay error and the phase-shift control word based on the relationship between the total delay error and the phase-shift control word; calculating a pre-processed phase-shift control word based on the integer multiple error relationship between the total delay error and the phase-shift control word; calculating a compensation control word based on the total duty cycle variation error and the pre-processed phase-shift control word; controlling the delay of a carrier signal based on the compensation control word to obtain a carrier signal with a duty cycle variation error; generating a correction carrier signal based on the carrier signal with the duty cycle variation error; delaying the correction carrier signal based on the pre-processed phase-shift control word, and amplifying and synthesizing the output signal. The present application can implement adaptive correction processing for pulse waveform distortion and improve the linear performance of ADTx.

The invention provides a closed-loop calibration system and method for IQ imbalance, and relates to the technical field of communication, the system comprises a digital transmitter, a power amplifier, a low noise amplifier and a digital receiver which are connected in sequence, and further comprises a digital correlator, a resolving unit, a phase controller and an IQ imbalance compensator; and the power amplifier is connected with the low-noise amplifier through a coupling loop. According to the invention, the analog phase and the digital phase of the loop are adjusted through the phase controller, and the simultaneous calibration of IQ imbalance in the digital transmitter and the digital receiver is realized by combining the four cross-correlation operation of the digital correlator and the parameter joint estimation of the calculation unit without a phase shift module. Phase switching can be realized by using an existing tuning capacitor of a power amplifier or a low-noise amplifier, the design is simple, and a coupling loop is close to an antenna port, so that the calibration precision is not easily influenced by interference and radiation of an internal radio frequency module; and meanwhile, hardware is easy to realize, the complexity is low, the estimation precision is high and the stability is strong.

This application provides a method, apparatus, and electronic device for adjusting the transmission power range, applied to a control module in a digital transmitter. The digital transmitter further includes at least one transmission module, each transmission module comprising multiple basic units, wherein the basic units include switched capacitor circuits based on multiple supply voltages. The method includes: determining, based on the initial transmission power range and the target transmission power range of the digital transmitter, the number of transmission modules that are turned on, the supply voltage of the basic units in the turned-on transmission modules, and an additional bit control signal for controlling the number of transmission modules that are turned on and the supply voltage of the basic units, thereby adjusting the corresponding transmission power range of the digital transmitter. In the above scheme, by adjusting the number of transmission modules that are turned on and the supply voltage of the basic units in the turned-on transmission modules, the corresponding transmission power range of the digital transmitter can be adjusted, thereby achieving a larger dynamic range of transmission power.

Neuron circuits are provided for spiking neural network apparatus having multiple such neuron circuits interconnected by links, each associated with a respective weight, for transmission of signals between neuron circuits. A neuron circuit includes a digital transmitter for generating trigger signals, indicating a state of the neuron circuit, on outgoing links of the circuit. The state is encoded in a time interval defined by these trigger signals. The neuron circuit includes a digital receiver for detecting such trigger signals on incoming links of the circuit, and digital accumulator logic. In response to detecting a trigger signal on an incoming link, the digital accumulator logic is adapted to generate a weighted signal dependent on the time interval and to accumulate the weighted signals generated from trigger signals on the incoming links to determine the state of the neuron circuit.

The invention relates to a digital flowing current measuring device which comprises a flowing current detector and a digital transmitter. The flowing current detector is used for collecting weak alternating current generated when sampling water is sheared, and the digital transmitter is used for processing the weak alternating current, judging the positive and negative polarities of the detected water and displaying and outputting the weak alternating current; the flowing current detector is provided with an irradiation-resistant part, electromagnetic compatibility and self-zero setting; and the digital transmitter is also provided with an irradiation-resistant part. The invention further comprises a working method of the digital flowing current measuring device. The beneficial effect of the invention is that a high-reliability solution is provided for monitoring the flowing current in a high-irradiation and strong-electromagnetic-interference scene. The device is suitable for wastewater treatment in the nuclear industry field, engine vibration monitoring and aircraft structure health monitoring in the environment field, reactor vibration monitoring and pipeline vibration monitoring in the petrochemical industry field, high-voltage transmission line vibration monitoring, wind driven generator vibration monitoring and other scenes.

The invention provides a multi-channel ADC high-precision calibration system and method, and relates to the technical field of communication, and the system comprises a digital transmitter, a DAC module, a calibration loop and a multi-channel ADC module which are connected in sequence, and also comprises a correlation module, a parameter estimation module and a compensation module. The correlation module is respectively connected with the digital transmitter and the multi-channel ADC module, the parameter estimation module is respectively connected with the correlation module and the compensation module, and the compensation module is further connected with the multi-channel ADC module; and the calibration loop is used for connecting the tail end of the transmitting link and the front end of the receiving link. According to the method, the analog domain and the digital domain are combined through the calibration loop, deviation compensation can be achieved by conducting single cross-correlation operation and parameter estimation on the local reference signal and the multiple sub-signals, the mode does not need to redesign an analog circuit and does not depend on an external instrument for calibration, hardware complexity is low, stability is high, the estimation period is short, and cost is low. And normal business operation is not influenced.

The invention relates to the technical field of digital transmitters, in particular to a digital millimeter wave transmitter which comprises a coupler, an orthogonal digital modulator and a digital-analog mixed mode Doherty power amplifier. Wherein the coupler is used for generating a broadband orthogonal signal and inputting the broadband orthogonal signal into the orthogonal digital modulator so as to realize QAM (Quadrature Amplitude Modulation) of the broadband orthogonal signal, and the orthogonal digital modulator inputs the modulated broadband orthogonal signal into the digital-analog mixed mode Doherty power amplifier so as to carry out power amplification on the modulated signal. According to the digital millimeter wave transmitter, through collaborative design of digital modulation and the mixed mode Doherty power amplifier, high system efficiency is achieved under the conditions of high peak-to-average ratio and high-power output, energy consumption is remarkably reduced, a quadrature amplitude modulation (QAM) modulation precision and signal linearity are improved by adopting the quadrature digital modulator and a precise amplitude / phase control mechanism, and the digital millimeter wave transmitter has the advantages of being simple in structure, low in cost and high in reliability. And high-speed data transmission is supported, and the requirement of a 5G system for high-capacity communication is met.

The application discloses a multi-frequency reconfigurable all-digital transmitter chip, which comprises a multi-path baseband I / Q signal, a multi-frequency reconfigurable digital front-end processing module, a multi-frequency reconfigurable modulator module, a digital modulation output interface, a high-speed serial transmitter and a parameter configuration interface and control module; the multi-path baseband I / Q signal provides one or more paths of baseband I / Q data to be transmitted; the multi-frequency reconfigurable digital front-end processing module performs multi-phase interpolation and multi-phase up-conversion on the multi-path baseband I / Q data to form a multi-frequency composite digital signal; the multi-frequency reconfigurable modulator module is connected with the multi-frequency reconfigurable digital front-end processing module; the digital modulation output interface maps the multi-frequency digital modulation signal to a corresponding high-speed serial transmitter according to a transmission mode; the high-speed serial transmitter is connected with the digital modulation output interface to form a multi-frequency radio frequency signal; and the parameter configuration interface and control module are used for receiving external configuration data and controlling parameter configuration and starting timing of each module.

Certain aspects of the present disclosure provide a radio frequency (RF) digital transmitter. An example a RF transmitter includes a multi-order hold digital-to-analog converter (DAC) configured to output a signal with a carrier frequency in a radio frequency (RF) bandwidth, the multi-order hold DAC comprising: a first DAC and a second DAC. The RF transmitter further includes one or more reference voltage generators coupled to the multi-order hold DAC, wherein the one or more reference voltage generators are configured to feed a first reference voltage to the first DAC and feed a second reference voltage to the second DAC, and wherein the one or more reference voltage generators are configured to output the first reference voltage with a first time-varying voltage across a symbol period.

The present invention discloses a method and system for correcting delay errors of RF-PWM signals, and relates to the technical field of signal delay error correction. The method is applied to an all-digital transmitter, comprising: based on the maximum value of the delay control word signal and with the minimum error vector amplitude as the goal, a coarse delay offset set is traversed using a cyclic sequential method to determine the optimal coarse delay offset set of the all-digital transmitter; based on the optimal coarse delay offset set and with the minimum third harmonic value as the goal, a fine delay offset set is traversed using a cyclic sequential method to determine the optimal fine delay offset set of the all-digital transmitter; and based on the optimal coarse delay offset set and the optimal fine delay offset set, a five-level RF-PWM signal is corrected. By constructing the optimal coarse delay offset set and the optimal fine delay offset set, the present invention can improve the correction accuracy of the RF-PWM signal.

The invention discloses a full-digital transmitter pulse distortion error correction method, and relates to the technical field of wireless communication. The method comprises the following steps: establishing a static compensation factor lookup table; according to the phase shift angle of the initial baseband signal, obtaining an amplitude compensation factor statistical expected value and a phase compensation factor statistical expected value of the initial baseband signal by looking up a static compensation factor lookup table, and performing static compensation of amplitude and phase on the initial baseband signal to obtain a baseband signal after static compensation; adaptively updating an amplitude coefficient and a phase coefficient of the double-path parallel adaptive filter to obtain an optimal amplitude coefficient and an optimal phase coefficient; and inputting the baseband signal after static compensation into a double-path parallel adaptive filter with an optimal amplitude coefficient and an optimal phase coefficient to generate a pre-distortion signal, and finally outputting a corrected RFPWM digital pulse signal. According to the invention, the linear performance of the whole all-digital transmitter system can be improved.

A digital amplifier comprising: a first amplifier core comprising: a first amplification section configured to amplify a first signal according to a first subset control stack; a second amplification section configured to control stacking of a second signal according to a second subset, where the second signal is an inverted phase of the first signal; a second amplifier core comprising: a third amplification section configured to amplify a third signal according to a second subset control code, where the third signal is the delayed first signal; and a fourth amplification part configured to amplify a fourth signal according to the first subset control code, where the fourth signal is an inverted phase of the third signal.

A transmitter includes a first circuit to generate multiphase pulses, and a second circuit to mix a set of in-phase (I) data and quadrature (Q) data with the multiphase pulses and to generate an output radiofrequency (RF) signal. The multiple pulses include multiple I pulses and multiple Q pulses each comprising a pulse that includes a duty cycle such that a first null appears at a third harmonic frequency in a frequency spectrum of the pulse.

The embodiment of the invention discloses a digital transmitter. The digital transmitter comprises a digital front-end circuit and a radio frequency circuit, the digital front-end circuit is used for receiving the fundamental frequency signal and generating a phase signal, a first amplitude signal and a second amplitude signal aiming at the fundamental frequency signal, and the second amplitude signal is orthogonal to the first amplitude signal; the radio frequency circuit is used for generating a first local oscillator signal and a second local oscillator signal aiming at the phase signal, mixing the first local oscillator signal with the first amplitude signal to generate a first radio frequency signal, mixing the second local oscillator signal with the second amplitude signal to generate a second radio frequency signal, and superposing the first radio frequency signal and the second radio frequency signal to generate a second radio frequency signal; and generating a target radio frequency signal, the first local oscillator signal and the second local oscillator signal being orthogonal. According to the digital transmitter provided by the embodiment of the invention, the hardware cost and the operation power consumption can be reduced.

The utility model provides an integrated 3KW frequency modulation transmitter, and relates to the technical field of digital transmitter facilities, the integrated 3KW frequency modulation transmitter comprises an integrated housing and a unit module, a slide rail is fixed in the integrated housing, a slide-in column is slidably connected in the slide rail, the bottom of the slide-in column is rotatably connected with a sealing plate, a traction column is slidably connected in the slide rail, and the traction column is rotatably connected with the unit module. The bottom of the sliding rail is connected with a sealing plate in a rotating mode, the circumferential face of the traction column is connected with a coupling plate in a rotating mode, the interior of the coupling plate is connected with a driving column in a rotating mode, the upper end of the driving column is connected with the sliding rail in a sliding mode, and the driving column is driven by a driving device. And at the moment, the sealing plate moves into the device, so that the problem that workers are injured due to outward unfolding of the opening and closing door of the device is solved, and the space utilization rate is increased.

A Code-Division Multiplexing radar system, comprises:a number NT transmitters, each configured to transmit a radar signal modulated by a unique code sequence, wherein one of the transmitters is configured to have a transmission power higher than the rest transmitters,a number NR receivers, each configured to receive a reflection signal caused by the transmitted radar signals, and reflected by a target, anda controller, configured to:generate a number N virtual receive elements, for each virtual receive element VXp,q:to detect the target,based on the detected target, to generate a reconstructed interference signal ũp,q caused by the radar signals transmitted by the other transmitters except for the qth radar signal, andto update a virtual receiving signal at said virtual receive element VXp,q based on the reconstructed interference signal x2.

An RF transmitter (1) with a gate-segmented power output stage (2) and a digital controller (5). The gate-segmented power output stage (2) includes a field-effect transistor with multiple gate contacts (32) and drain contacts (31) defining a gate periphery. The field-effect transistor comprises multiple power output stage segments (3), each corresponding to a respective part of the gate periphery, and each with a power output stage segment input (4).The digital controller (5) has control outputs (6) connected to the corresponding power output stage segment inputs (4), and is configured to individually switch each of the power output stage segments (3) between an on mode and an off mode depending on one or more input signals to obtain a modulated RF carrier signal at an output (7) of the gate-segmented power output stage (2).

Provided herein is a digitally controlled segmented RF power transmitter with a digital processing part and an RF power amplification part having a plurality of segments. The digital processing part has a clock generation block arranged to generate n equi-phased clock signals with a 50% duty-cycle (fLO,x_50%, Cx), and a sign-bit phase mapper unit arranged to receive the n equi-phased clock signals (fLO,x_50%; Cx), and sign bits (SignI, SignQ), and to output a set of m, m≤n, phase mapped clock signals with a 50% duty-cycle (CLKy,50%; Cy) using a predetermined phase swapping scheme. Each of the plurality of segments includes logic circuitry receiving the set of m phase-mapped clock signals with a 50% duty-cycle (CLKy,50%; Cy), and arranged to provide the respective segment driving signal with a duty-cycle z of less than 50%.