The invention discloses an FPGA (field programmable gate array)-based permanent magnet synchronous motor current loop bandwidth expansion device. The device comprises a current sampling module, a Clark conversion module, a Park conversion module, a PI (proportional-integral) module, an iPark conversion module, an SVPWM (space vector pulse width modulation) module and a time sequence control module, wherein the current sampling module is used for reading current sampling values ia and ib of a phase A and a phase B; the Clark conversion module is used for converting the ia and the ib into an alpha-beta coordinate system to obtain ialpha and ibeta, the Park conversion module is used for converting the ialpha and the ibeta into a d-q coordinate system to obtain a direct axis current id and a quadrature axis current iq; the PI module is used for comparing a command current with feedback currents id and iq to obtain a current deviation value, and computing to obtain command voltages Vd and Vq in the d-axis and the q-axis; the iPark conversion module is used for converting the Vd and the Vq into an alpha-beta coordinate system to obtain Valpha and Vbeta; the SVPWM module is used for calculating a three-phase PWM duty ratio according to the Valpha and the Vbeta, and generating six paths of PWM waveforms; the time sequence control module is used for starting or closing a corresponding module according to a current control time sequence, and completing the control of the current of a permanent magnet synchronous motor. According to the device, the delay in a current control loop is greatly reduced through the optimization of a control time sequence and the design of an FPGA-based current controller, so that the bandwidth of the current loop is improved.