29 results about "Capacitive effect" patented technology

The application discloses a high-frequency ferroelectric negative capacitance field effect transistor and a preparation method thereof, and belongs to the field of field effect transistor logic devices and circuits of CMOS super-large integrated circuits. The high-frequency negative capacitance field effect transistor provided by the application overcomes problems of low working frequency and large hysteresis of a traditional negative capacitance field effect transistor by taking a needle-shaped ferroelectric domain structure ferroelectric film with a fast ferroelectric negative capacitance effect as a gate dielectric layer and combining specific device structures and processes. Compared with similar devices, the product has the outstanding advantages of fast operation speed, small hysteresis and low power consumption, and has important academic and application values in the fields of microelectronic devices, military industry and aerospace.

The invention relates to a power semiconductor technology, in particular to an IGBT device with low switching loss and a preparation method thereof, gate oxide layers are arranged on the inner walls of a first trench and a second trench, the lower parts of the gate oxide layers are filled with virtual trench gates, and the upper parts of the gate oxide layers are filled with effective trench gates, so that a split trench gate structure is formed; the Miller capacitance effect in the switching process of the device is effectively reduced, the coupling effect of voltage change in the starting stage on the grid potential is weakened, the overlapping time of voltage and current in the starting process is shortened, and the starting loss of the device is remarkably reduced; a transport path of carriers in the device is reasonably guided and strengthened by arranging the deep P region, so that the extraction rate of the carriers in the drift region in the turn-off process is increased, the current trailing phenomenon in the turn-off stage is effectively inhibited, the turn-off time is shortened, and the turn-off loss of the device is remarkably reduced.

In aspects, techniques for detecting and discriminating foreign objects near an inductive wireless power transfer system is disclosed. The method is based on hybrid inductive and capacitive sensing. The apparatus includes a sensing system, a measurement circuit, and a controller. The sensing system senses the object based on at least one of an inductive or a capacitive effect. The sensing system includes an inductive sense element, which has an electrical characteristic that changes in a presence of the object based on the inductive effect. The sensing system further includes a capacitive sense element, which has an electrical characteristic that changes in the presence of the object based on the capacitive effect. The measurement circuit measures the electrical characteristics in the inductive and capacitive sense circuits. The controller determines the presence of the object, and discriminates between metallic and non-metallic objects based on the change in the measured electrical characteristics.

The application discloses a kind of offshore wind power low-frequency AC transmission system main loop topology and parameter design method, system, equipment, medium and program, belong to wind power generation technical field.The method includes obtaining electrical parameters in offshore wind power low-frequency AC transmission system;According to the electrical parameters in offshore wind power low-frequency AC transmission system, design bridge arm reactor in converter main loop topology;According to the bridge arm reactor in converter main loop topology designed, determine the sub-module capacitance value in converter main loop topology, obtain converter main loop topology and parameter design scheme;Converter main loop topology and parameter design scheme are verified, find the optimal converter main loop topology and parameter design scheme, according to converter main loop topology and parameter design scheme, complete the construction of converter main loop topology.The method effectively reduces line capacitance effect, reduces system loss and voltage fluctuation, while reducing sub-module capacitance and overall volume.

The application discloses a low-frequency submarine cable capacitance effect suppression method, device and equipment and a storage medium, and belongs to the technical field of submarine cable power transmission. The method comprises the following steps: establishing a cable simulation model; based on a preset boundary condition, performing single-point interconnection configuration, fastening interconnection configuration and cross interconnection configuration on the cable simulation model respectively; determining performance parameters of each interconnection configuration under different preset frequencies, wherein the performance parameters comprise unit length charging current, shielding layer current distribution, shielding layer ground potential distribution and total loss; under the condition that the shielding layer current accumulation of each interconnection configuration under different preset frequencies satisfies a linear relationship and the simulation model self-checking passes, determining a target interconnection mode according to the performance parameters of each interconnection configuration under different preset frequencies, so as to switch the interconnection mode of the cable to the target interconnection mode. The technical scheme provided by the application can realize optimal management of the capacitance effect and improve the safety of the submarine cable system.

The application relates to the technical field of molecular devices, in particular to a capacitance-inductance dual-function device based on a helicene molecule and a preparation method thereof. The device comprises a first graphene dot electrode, a helicene molecule and a second graphene dot electrode, the first graphene dot electrode and the second graphene dot electrode form a graphene dot electrode pair, and the helicene molecule is connected between the graphene dot electrode pair; the helicene molecule is switched between capacitance and inductance effects by changing the voltage change rate of alternating current applied to the helicene molecule; when the voltage change rate of the alternating current is 0.1-1.0 V / s, the helicene molecule has inductance effect; when the voltage change rate of the alternating current is greater than or equal to 10 V / s, the helicene molecule has capacitance effect. The preparation method provided by the application is prepared on the basis of a graphene single-molecule field effect transistor, realizes significant miniaturization of the device size, and exhibits high integration.

The application discloses a low-offset comparator for inhibiting sampling signal attenuation, relates to the technical field of analog and mixed signal integrated circuit design, and is used for solving the problems of sampling signal amplitude attenuation caused by input parasitic capacitance and sampling capacitance voltage division of a pre-amplification stage of a comparator in the prior art and deterioration of ADC linearity and dynamic range caused by the problems. The low-offset comparator comprises a sample-and-hold enhancement circuit and a subsequent processing circuit, the sample-and-hold enhancement circuit is connected between a sample-and-hold circuit and the subsequent processing circuit, the subsequent processing circuit comprises a pre-amplification stage with an input transistor pair, the sample-and-hold enhancement circuit comprises an input capacitance neutralization network, the input capacitance neutralization network is connected between a differential input end and a differential output end of the pre-amplification stage, is used for generating a feedback capacitance opposite to inherent gate-drain capacitance effect of the input transistor pair, and thus effectively reduces the input capacitance of the pre-amplification stage at a sampling node of the sample-and-hold circuit.

This invention relates to the field of waveguide gas laser technology, specifically to a method and device for preferentially controlling the electrode electric field to prioritize the lowest-order waveguide mode through coating, comprising the following steps: S1: determining the beam waist position of the laser resonator; S2: preparing an insulating coating on the surface of the waveguide laser electrode plate corresponding to the beam waist position; S3: performing a gradient transition edge treatment on the insulating coating; S4: constructing an impedance matching compensation network at the electrode feed end in the insulating coating region. This invention, by setting an insulating coating, achieves localized reduction of the electric field intensity in the beam waist region; simultaneously, by constructing an impedance matching compensation network, it accurately compensates for the capacitance effect introduced by the coating, and through dynamic monitoring and adjustment, ensures that the standing wave ratio and discharge voltage fluctuations are within a minimal range, guaranteeing effective coupling of RF power and uniform and stable discharge, thereby improving the overall efficiency and reliability of the device.

The invention relates to the technical field of sensing of aquatic water ion detection, and discloses a solid-state contact layer of an all-solid-state ion selective electrode, FeCoNi-coated ZIF-8 doped with three transition metals of iron, cobalt and nickel is synthesized through a one-pot method, nano porous carbon based on ZIF-8 is generated through pyrolysis, and finally a transition metal doped ZIF-8-derived carbon nanomaterial is obtained. And mixing the carbon nanomaterial with a hydrophobic material and an ionic liquid to construct an ion-electron transduction layer of the all-solid-state ion selective electrode with excellent hydrophobic performance. The solid-state contact layer prepared by the invention not only can effectively inhibit the formation of a water layer between an ion sensitive film and a conductive substrate and solve the problem of potential drift of an ion selective electrode in measurement, but also has the advantages that the electric double-layer capacitance effect of the carbon nanomaterial and the synergistic pseudocapacitance effect among various transition metals act together; and the ion-electron transduction capability of the electrode is improved.

A dual-band antenna structure includes a substrate, a ground, a conductive patch, a transmitting antenna and a receiving antenna disposed on the substrate. The ground has a first and a second through hole. The transmitting antenna includes a first coupling conductive pad corresponding to the first through hole, a first conductive post electrically coupled to the first coupling conductive pad and the conductive patch, and a first feed-in conductive pad located in the first through hole. The first feed-in conductive pad can each have a capacitive effect with the first coupling conductive pad and the ground. The receiving antenna includes a second coupling conductive pad corresponding to the second through hole, a second conductive post electrically coupled to the second coupling conductive pad and the conductive patch, and a second feed-in conductive pad located in the second through hole. The second feed-in conductive pad can each have a capacitive effect with the second coupling conductive pad and the ground.

The application relates to a low-power negative capacitance field effect transistor for unidirectional electric field and a preparation method thereof, and belongs to the field of microelectronic devices. The negative capacitance field effect transistor provided by the application uses a ferroelectric thin film material with multiple-stage negative capacitance effect as a gate dielectric layer, thereby not only overcoming the problem that a traditional negative capacitance field effect transistor can only work under alternating working voltage, but also reducing the polarization reversal barrier and further reducing the power consumption of the transistor. Compared with similar devices, the application has the outstanding advantages of low power consumption, small hysteresis and high process compatibility, and has important academic and application values in the field of microelectronic devices.

The invention relates to the technical field of sensors, in particular to a high-sensitivity flexible pressure sensor. The high-sensitivity flexible pressure sensor sequentially comprises a first substrate layer, a first electrode layer, a first thin film layer, a supporting structure layer, a second thin film layer, a second electrode layer and a second packaging layer from top to bottom, a cavity layer is formed in the supporting structure layer, and the height of the cavity layer is the same as that of the supporting structure layer. A microstructure ion electron film layer is arranged on the surface, close to the supporting structure layer, of the second film layer; the first thin film layer and / or the second thin film layer are / is made of an MXene / GO composite material. According to the flexible pressure sensor, the MXene composite material film layer is inserted between the gold electrode and the dielectric layer composed of the cavity / ion electronic film, a pseudocapacitance effect is generated, the charge variation after the flexible pressure sensor is stressed is increased, and the electric response sensitivity of the pressure sensor is improved.

The application provides a double-resonance ultra-wideband antenna, in which an isolation sheet is added in a transmission link between an antenna unit and a coplanar waveguide transmission line, and a metal ground layer and the isolation sheet are not connected with each other. Compared with the prior art in which a center conductor of the coplanar waveguide transmission line and a conductor plane are connected with the metal ground layer, the center conductor of the coplanar waveguide transmission line and the conductor plane are connected with the isolation sheet and the metal ground layer respectively in the application, and the ground layers of the two are completely isolated, so that the isolation sheet, the conductor plane of the coplanar waveguide transmission line and the metal ground layer are coupled to form a capacitance effect, the capacitance effect and an inductance effect generated when the center conductor is connected with the isolation sheet form an impedance matching effect, thereby improving the output power of the antenna and improving the bandwidth when the antenna resonates.

The application belongs to the technical field of red light emitting diode epitaxy and chip manufacturing, and particularly relates to an AlGaInP red light emitting diode epitaxy and chip manufacturing method and chip. A buffer layer, an AlInP etching stop layer, an n-type ohmic contact layer, an n-AlInP roughening expansion layer, a waveguide layer, a multi-quantum well layer and a p-type layer are epitaxially grown on a GaAs substrate in sequence. A hole is opened by lithography, and a multilayer p electrode is evaporated in the hole. The epitaxial wafer is low-temperature bonded with a Si substrate on which a metal layer is evaporated, and is cooled in stages. After the substrate is removed, an n electrode pad layer is lithographically evaporated. A light emitting area is formed by etching, the AlInP etching stop layer is segmented and chemically wet roughened, a passivation layer is deposited, and a single device is obtained through thinning, back gold evaporation and laser cutting. The superlattice layer has a capacitive effect, which matches the hole and electron recombination time, reduces the electron leakage rate, the AlInP roughening layer cooperates with the segmented wet roughening process, improves the light extraction efficiency, the low-temperature bonding and the staged cooling effectively release the thermal stress, and improve the reliability.

The application discloses a photoconductive switch based on a parasitic capacitance effect caused by dislocations, a preparation method and a tuning method, and relates to the technical field of semiconductor devices. The preparation method comprises the following steps: preparing a silicon carbide substrate, performing dislocation analysis on the silicon carbide substrate to obtain different dislocation density substrate intervals, and partitioning the different dislocation density substrate intervals; preparing a composite metal layer on the silicon carbide substrate, and obtaining a positive silicon carbide wafer with a photoconductive switch electrode structure through photoetching, developing, stripping and other processes; performing alloying treatment on the silicon carbide wafer with the non-electrode area removed to obtain a photoconductive switch, and then performing scribing on the photoconductive switch to obtain a single discrete photoconductive semiconductor device. The application realizes the tuning of the output signal half-peak width and the spectrum of the photoconductive switch by regulating the dislocation density of the photoconductive switch device substrate and utilizing the capacitance effect caused by the dislocation defects.

The invention discloses a thin film semiconductor field effect transistor and high-resistance substrate compounded radiation detector and a radiation detection method, and solves the technical problem that the energy resolution and stability of a current gain type radiation detector are limited due to additional noise, dark counting and temperature sensitivity caused by an avalanche process. According to the radiation detector and the detection method, the carrier concentration of the thin film semiconductor channel layer is efficiently modulated through the MOS capacitance effect, and by means of the gain characteristic of the field effect transistor, the tiny change of voltage division of the insulated gate dielectric layer is amplified into drain-source current change; by using the signal amplification capability and low dark current noise of the field effect transistor, the radiation detector has high gain, low noise and low power consumption, and can realize high-sensitivity detection of weak radiation signals.

The application discloses a millimeter wave broadband antenna array of a MEFAB process, which comprises an I-shaped slotted metal floor, two pairs of mutually parallel vertical metal columns, L-shaped metal folded patches, two pairs of rounded rectangular patches and a rectangular coaxial structure; the overall profile height of the antenna is reduced by folding the L-shaped patches and cooperating with the vertical metal columns to change the current path; and a larger space is left between the horizontal rounded rectangular patches and the vertical metal columns to generate a capacitive effect, so that the matching of the antenna is realized; the I-shaped slot gap is slotted and gradually changed, so that the electric dipole and the magnetic dipole are effectively excited; and the maximum gain of the antenna unit is improved through the common radiation of the two pairs of magnetic dipoles and electric dipoles.

This invention relates to a composite functional capacitive sensing chip, comprising: a substrate, a signal processing circuit layer, an interconnect layer, an electrode array layer, and a dielectric layer. The signal processing circuit layer is disposed above the substrate and uses an algorithm to extract fingerprint and handwriting features. The interconnect layer is electrically coupled to the signal processing circuit layer for transmitting capacitance signals. The electrode array layer is arranged in a matrix array to detect changes in capacitance caused by contact pressure and movement trajectory of the contact object; the signal processing layer generates digital information of the fingerprint pattern and handwriting trajectory. The dielectric layer is electrically coupled to the electrode array layer and serves to isolate the electrodes, prevent short circuits, and enhance the capacitance effect; it is formed of a high-dielectric-constant dielectric material, a varistor material, or an insulating material.

The utility model discloses a novel high-frequency wire rod structure, which comprises a wire rod body, the wire rod body comprises a conductor and an insulating jacket, the conductor is formed by pressing and hinging a plurality of outer conductive wires and an inner conductive wire, and the insulating jacket is coated outside the conductor; according to the utility model, a plurality of strands of outer conductive wires and one strand of inner conductive wire are tightly combined together in a pressing and hinging mode, and obvious gaps existing among single wires of a traditional stranded conductor are effectively eliminated, so that the capacitance effect during signal transmission is remarkably reduced, signal attenuation is reduced, and the transmission efficiency and stability of signals are improved. The tightly-pressed and hinged conductor structure enables the conductor to have certain flexibility, can bear certain external force and bending, and is not liable to be snapped, thereby improving the durability and reliability of the wire rod. Meanwhile, the structure also optimizes the arrangement and twisting mode of the conductors, further reduces the resistance of the conductors, and reduces the energy loss in the signal transmission process.

A liquid crystal metasurface unit comprises a top dielectric plate layer, an upper metal layer, a liquid crystal layer, a lower metal layer, a lower dielectric plate layer and a bottom floor metal layer which are sequentially stacked from top to bottom. The upper metal layer and the lower metal layer respectively comprise a plurality of metal patches and direct current bias lines, the metal patches comprise liquid crystal control metal patches, and the liquid crystal control metal patches of the upper metal layer and the liquid crystal control metal patches of the lower metal layer are overlapped up and down to form a capacitance effect with the middle liquid crystal layer. The direct current bias lines are electrically connected with the metal patches respectively and used for applying voltage to regulate and control the dielectric constant of the liquid crystal layer through the liquid crystal regulation and control metal patches, and finally the reflection phase of the metasurface unit is changed; the metal patches form a plurality of resonant phase-shifting structures, and the phase regulation and control effects of the resonant phase-shifting structures are mutually superposed, so that the wide reflection phase regulation and control range of the liquid crystal metasurface unit is realized.

This invention relates to the field of circuit board technology, specifically to a method for detecting copper layers on a PCB board. The method involves placing a PCB board to be drilled on the table of a drilling machine, performing drilling operations using a drill bit, monitoring changes in the capacitance of the drill bit, detecting and recording the positions of each copper layer within the PCB board. Utilizing the change in capacitance effect, different copper layers will exhibit capacitance responses. By monitoring these changes in capacitance effect, the precise relative positions of the copper layers on the PCB board can be determined even when the exact relative positions are not readily apparent during copper layer detection.

The application provides a nonvolatile radio frequency switch chip for a 5G radio frequency front end, wherein an input port, an input transmission line, a ReRAM core MIM unit group, an output transmission line and an output port are sequentially electrically connected; and the input transmission line, the ReRAM core MIM unit group and the output transmission line are peripherally surrounded in a ring shape. The RAM core MIM unit is a three-layer sandwich structure, and the bottom electrode layer, the dielectric layer and the top electrode layer are sequentially arranged from bottom to top; and the bottom electrode and the top electrode are completely separated by the intermediate dielectric layer without electrical connection. The application utilizes n ReRAM core MIM units arranged in the same direction and at equal distances to form the ReRAM core MIM unit group, reduces the switch conduction resistance, significantly reduces the insertion loss, introduces a gradually changing ground coplanar waveguide transmission line to reduce the gap capacitance effect, realizes the improvement of the isolation degree and improves the high-frequency impedance matching.

The application provides a 3kV or more asymmetric high-reliability super-junction silicon carbide VDMOS and a preparation method thereof. The method comprises the following steps: depositing metal on the lower side of a silicon carbide substrate to form a drain metal layer; epitaxially growing on the upper side of the silicon carbide substrate to form a first drift layer; forming a barrier layer, etching, ion implantation, forming a P-type region and an N-type region; removing the barrier layer, epitaxial growth, forming a second drift layer; forming a barrier layer, etching, ion implantation, forming a P-type source region, a protection region, a P-type well region and an N-type source region; etching the N-type source region, the P-type well region and the protection region to form a groove, and oxidizing to form an insulating medium layer; depositing metal to form a gate metal layer; etching the P-type source region and the second drift layer, depositing metal to form a source metal layer, removing the barrier layer, and completing the preparation; the gate reliability of the device is improved, the capacitive effect of the device gate to the drain is shielded, the Miller capacitance of the device is reduced, and the switching speed of the device is improved.

This application relates to the field of photovoltaic module technology and discloses an IV testing method, apparatus, electronic device, storage medium, and program product. The method includes: performing a light bath pretreatment on the module and evaluating the effect through a power stability test; after meeting the standard, performing forward and reverse voltage scan tests, controlling the scan speed to keep the hysteresis below a preset threshold, and determining the test power stability based on a power stability criterion; subsequently calculating the fill factor and photoelectric conversion efficiency, and evaluating the true efficiency value through a weighted average function. This application establishes short-term stability through pretreatment, reducing initial fluctuations caused by capacitance effects; power testing ensures a reliable starting point; scan control and criteria suppress hysteresis errors; and weighted averaging improves accuracy. It effectively solves the hysteresis error problem caused by capacitance effects, achieving efficient and accurate testing, and improving test speed and result reliability.

The present application relates to the technical field of energy storage power station safety protection, in particular to a kind of energy storage battery safety prevention and control system and method, the system includes impedance identification module, active arc suppression module and fault-tolerant reconstruction module.Impedance identification module is coupled to high-voltage DC bus, by injecting high-frequency perturbation current and demodulating voltage feedback signal, real-time calculation system dynamic impedance, once the arc characteristic negative impedance characteristic of detection triggers fault instruction.Active arc suppression module is integrated in bidirectional DC converter, responds to fault instruction and forcibly switches modulation logic, synthesizes virtual capacitor effect with extremely low impedance to high-frequency fault current at input end, utilizes the effect instantaneous absorption line inductance magnetic energy, so that current is reduced below the arc threshold, realizes no contact fast arc extinguishing.Fault-tolerant reconstruction module is used to isolate fault battery module after arc extinguishing, and dynamically adjusts the voltage modulation depth of the remaining healthy module according to the calculated voltage shortage.

The invention discloses a millimeter wave broadband antenna array manufactured by an MEFAB process. The millimeter wave broadband antenna array comprises an I-shaped slotted metal floor, two pairs of mutually parallel vertical metal columns, an L-shaped metal folding patch, two pairs of rounded rectangular patches and a rectangular coaxial structure, the folded L-shaped patch is matched with the vertical metal column to change a current path, so that the overall profile height of the antenna is reduced; a large space is reserved between the horizontal rounded rectangular patch and the vertical metal column to generate a capacitance effect, so that antenna matching is realized; effective excitation of the electric dipole and the magnetic dipole is realized through the I-shaped gap with the gradually-changed slot; through common radiation of the two pairs of magnetic dipoles and electric dipoles, the maximum gain of the antenna unit is improved.

The invention discloses a p-channel gallium nitride transistor with ferroelectric film negative capacitance and a preparation method of the p-channel gallium nitride transistor, the transistor comprises a substrate, a GaN buffer layer, an AlGaN barrier layer and a p-GaN channel layer which are sequentially arranged from bottom to top, and the middle area of the upper surface of the p-GaN channel layer extends downwards to form a grid groove. A source electrode and a drain electrode are arranged on the two sides of the upper surface of the p-GaN channel layer respectively, and ferroelectric gate dielectric layers are arranged on the upper surface of the gate groove, the side faces of the gate groove, the upper surface of the p-GaN channel layer between the source electrode and the gate groove and the upper surface of the p-GaN channel layer between the drain electrode and the gate groove. A TiN contact layer is arranged on the upper surface of the ferroelectric gate dielectric layer, and a gate electrode is arranged on the upper surface of the TiN contact layer; the ferroelectric gate dielectric layer is formed by growing two materials of HfO2 and ZrO2 in turn. According to the invention, the HfO2-ZrO2 ferroelectric film is adopted, and the negative capacitance effect of the HfO2-ZrO2 ferroelectric film is utilized, so that the unconventional total capacitance can be improved in a grid series capacitor network, and the specific interface trap and performance bottleneck problems are solved.

The invention discloses a nonlinear circuit simulation method considering arc time-varying inductance and capacitance effects, and relates to the field of circuit simulation. Comprising the steps of establishing a dynamic arc comprehensive equivalent model, innovatively introducing time-varying arc inductance and time-varying gap capacitance on the basis of a traditional time-varying arc resistance model, comprehensively representing dynamic physical characteristics of an arc, and dynamically coupling parameters of the time-varying inductance and the time-varying capacitance with mechanical motion characteristics of a disconnecting switch contact; controlling the reignition and extinguishing process of the arc by adopting a mixed criterion: taking a gas dielectric theory as an arc ignition criterion, and taking an energy balance theory as an arc extinguishing criterion; based on general electromagnetic simulation software, dynamic simulation of multiple breakdown processes is realized through a circuit, and time domain waveform and spectral characteristics of the VFTO are acquired and analyzed, so that more accurate prediction and analysis of the VFTO are realized, and the problem that an existing arc model is insufficient in very fast transient overvoltage simulation precision in GIS isolation switch operation is solved.