120 results about "Capacitive effect" patented technology

The invention discloses an automatic identification and expansion communication method based on an RS485 interface, and relates to the technical field of industrial automation communication. The problems that an existing RS485 interface is complex in configuration, poor in protocol compatibility and high in data transmission delay are solved. According to the scheme, the terminal matched resistance and the bias current are adjusted in real time by dynamically measuring the bus equivalent distributed capacitance value, and signal attenuation caused by the capacitance effect is inhibited; a silicon controlled rectifier trigger type charge discharge mechanism is adopted to force bus residual charge to return to zero quickly, and an idle state is accurately judged in combination with a hysteresis comparator; dynamically compensating signal edge distortion and calibrating a sampling window time sequence based on a pre-emphasis filtering and Kalman filtering algorithm; multi-node stable communication is realized through capacitance value driven conflict detection threshold adaptive adjustment and a Poisson back-off model; according to the invention, the real-time performance, the anti-interference capability and the multi-node expansion reliability of RS485 communication in a complex industrial scene are obviously improved, and the debugging and maintenance cost of the system is reduced at the same time.

The invention discloses an insulation detection method for an electric automobile, belongs to the technical field of high-voltage safety monitoring of the electric automobile, and solves the problem that the insulation detection precision is reduced due to electromagnetic interference, impedance fluctuation and capacitive effect coupling in a dynamic load switching process. According to the scheme, a test sequence of discrete frequency points is applied to a high-voltage system; measuring a response current value through a current sensor and calculating a ground distributed capacitance value; connecting a test voltage source between positive and negative electrodes of the high-voltage system through a coupling circuit; applying a first pulse signal during no-load, dynamically setting the width according to the capacitance value, measuring a first response current value, and calculating an initial insulation resistance value; a second pulse signal with the same parameter is applied in the load state window, a second response current value is measured, and differential filtering is carried out in combination with the initial value to eliminate load noise; and comparing the filtered insulation resistance value with a threshold value, and outputting a fault signal when the insulation resistance value is lower than the threshold value. The method is used for monitoring the insulation state of the high-voltage system in real time and accurately early warning faults.

The invention discloses a server power supply system and a server, relates to the field of server power supply, and is used for solving the problem of high energy loss in a traditional alternating current power supply architecture. The power conversion module converts the power supply into high-voltage direct current with the voltage not lower than the preset voltage, the high-voltage direct current is transmitted to the power distribution board of the server through the bus copper bar, and the bus copper bar serves as a transmission medium of the high-voltage direct current and has low resistance and high current-carrying capacity. Extra loss caused by electromagnetic induction and a capacitance effect in alternating current transmission is avoided; high-voltage direct current is directly input to the power distribution board, so that multiple times of conversion in an intermediate link are avoided, and energy loss in the conversion process is reduced; and the power distribution board directly converts the high-voltage direct current into the voltage required by the load, so that the loss of multi-stage conversion in the traditional architecture is reduced. According to the invention, the power transmission efficiency is improved, the energy loss is reduced, and the requirement of a modern high-computing-power and high-energy-consumption server for efficient power supply is met.

According to the SGT MOSFET of the Low-k material and the preparation method of the SGT MOSFET, a gate insulating layer of the SGT MOSFET is deposited by adopting the Low-k material based on carbon-doped silicon oxide, and an oxide layer on the side wall of a shielding gate adopts an ONO structure, so that on one hand, the capacitance effect of a device can be reduced through the Low-k material under the condition that the physical thickness of the insulating layer is kept unchanged and electric leakage is not influenced, and the performance of the device is improved; the performance of the device is improved; and on the other hand, the compactness of the silicon nitride layer is high, and the side wall and the bottom of the shield gate polycrystalline silicon are protected by the silicon nitride layer, so that the on resistance of the device is further reduced and the conduction loss of the device is reduced by improving the doping concentration of the epitaxial layer on the basis of not reducing the breakdown voltage. Meanwhile, by controlling the depth of the oxide layer and the silicon nitride layer which are etched on the side wall of the groove, the silicon nitride layer is far away from the grid polycrystalline silicon, and the reliability of the device is improved.

The embodiment of the invention provides an IGBT second-class short circuit process transient voltage and current evaluation method and device, and the method comprises the steps: responding to the second-class short circuit of an IGBT chip until the short circuit current reaches a peak value, and building a relation model between the collector current and the commutation loop voltage according to circuit parameters; establishing a relation model of collector current and grid voltage by utilizing physical characteristics of a chip device; establishing a relation model between the collector-emitter voltage and the chip collector-emitter voltage according to the capacitance effect; according to the relation model of the collector current and the commutation loop voltage, the relation model of the collector current and the grid voltage and the relation model of the collector and emitter voltage and the chip collector and emitter voltage, the collector and emitter voltage and the collector and emitter voltage of the IGBT chip are determined; according to the IGBT state detection method and device, the IGBT second-class short circuit transient voltage and current are analyzed by obtaining the circuit parameters, and the accuracy and reliability of IGBT state detection are improved.

The invention discloses a bio-electricity signal acquisition electrode and an efficient electroencephalogram signal acquisition method, and relates to the technical field of signal processing. The method comprises the following steps: step 1, carrying out electrode-tissue interface dynamic impedance modeling based on ion diffusion and a capacitance effect; calculating density distribution of the conductive coupling agent based on the impedance function; 2, calculating a signal quality index; performing signal enhancement according to the signal quality index to obtain an enhanced signal; 3, performing feature extraction on the enhanced signal to obtain a feature signal; performing dynamic noise suppression according to the characteristic signal to obtain a noise suppression result; and 4, performing signal reconstruction according to a noise suppression result to obtain a reconstructed signal, and completing electroencephalogram signal acquisition. According to the electrode design, the contact quality is improved, the distribution of the conductive coupling agent is more uniform, and long-time stable monitoring is ensured. Meanwhile, the definition and fidelity of the signal are effectively improved through adaptive noise suppression and a signal reconstruction mechanism.

The invention relates to the technical field of flexible electronic sensing, and particularly discloses a composite fiber membrane-based capacitive flexible pressure sensor integrated system and a preparation method thereof. The sensor is composed of a composite fiber membrane sensitive layer, an interlayer type electrode structure, a multi-channel signal acquisition module and an intelligent data processing system. Wherein the composite fiber membrane is prepared through an electrostatic spinning technology, polyvinylidene fluoride serves as a matrix, ionic liquid with the mass ratio of 40%-70% is evenly dispersed, a three-dimensional porous structure is formed, and a pressure signal is converted into capacitance change through the double-electric-layer capacitance effect; the signal acquisition module adopts a high-precision capacitance digital converter to cooperatively work with a microcontroller, 9-channel parallel data acquisition is realized, the resolution reaches 6aF, and data is transmitted through an anti-interference bus protocol; and the data processing system dynamically analyzes the pressure-capacitance relationship based on an exponential function model, suppresses noise to be below 0.1 aF RMS in combination with a filtering algorithm, and synchronously generates a visual pressure distribution map.

The invention relates to an offshore wind power tower tube corrosion detection method and system based on a microprobe technology, and the method comprises the following steps: placing a microprobe corrosion detection device on a to-be-detected offshore wind power tower tube, and setting a probe interval between a signal transmitting probe and a signal receiving probe according to the thickness of an anticorrosive coating of the offshore wind power tower tube and the corrosion condition; in the process that the microprobe corrosion detection device moves on the offshore wind power tower drum to be detected, the signal emission probe emits an alternating current signal according to a preset frequency, and the emitted alternating current signal is propagated by taking the anti-corrosion coating as a medium and penetrates through the coating to enter the main body steel structure; the emitted alternating current signal is transmitted in the main body steel structure and then returns to the signal receiving probe through the anti-corrosion coating; the alternating current signals collected by the signal receiving probe are analyzed, metal resistance and capacitance effect equivalent capacitance values of the main body steel structure in the offshore wind power tower are obtained, and the corrosion conditions of the main body steel structure and the anticorrosive coating of the offshore wind power tower are judged according to the obtained metal resistance and equivalent capacitance values.

The utility model discloses a light-emitting diode epitaxial structure, which comprises a substrate, an electron providing layer, a light-emitting layer and a hole providing layer which are sequentially arranged from bottom to top, and a miniature capacitor layer is added between the electron providing layer and the light-emitting layer. The micro capacitor layer comprises more than one layer of micro capacitor structure, the micro capacitor structure is composed of a GaN: C / GaN: Si structure, the GaN: C is on the upper part, and the GaN: Si is on the lower part. Due to the existence of the capacitance effect, the structure buffers the electron migration rate, solves the problem that the electron hole migration rates are not matched, and further improves the luminous efficiency; moreover, the structure can absorb and disperse electrostatic energy, weaken the influence of instantaneous voltage impact and current peak on the LED structure, and stabilize the working voltage and current, thereby improving the antistatic capability of the LED epitaxial structure.

The invention relates to the technical field of photoelectric devices, in particular to a negative capacitance tunneling phototransistor and a preparation method and application thereof. The negative capacitance tunneling phototransistor is of a structure combining a ferroelectric material and a low-dimensional semiconductor heterojunction material, the characteristics of the ferroelectric material are combined with the tunneling effect and the photoelectric characteristic of a low-dimensional semiconductor heterojunction, and a hafnium oxide-based ferroelectric gate dielectric is used for replacing a gate dielectric layer of a traditional phototransistor. A negative capacitance effect is provided in the grid structure of the negative capacitance tunneling phototransistor so as to improve the performance of the device; through the negative capacitance effect of the ferroelectric material, the electrical performance of the tunneling field effect transistor is enhanced, the switching ratio and the on-state current of the device are improved, the sub-threshold swing of the device is further reduced, and the photoelectric responsivity and the response speed of the device are improved at the same time. Due to the arrangement of the grid electrode and the low-dimensional semiconductor heterojunction, the purposes of ultralow subthreshold swing and no hysteresis are achieved. In addition, the device has the characteristics of good stability, simple structure, easy preparation and the like.

The present disclosure relates to a semiconductor structure and a method for manufacturing the same. The semiconductor structure comprises a substrate, a plurality of active regions arranged in an interval manner; a plurality of bit lines arranged in an interval manner on the substrate; the bit line comprises a bit line conductive layer and a bit line dielectric layer which are stacked; the bit line has a first part and a second part; the first part is located at the overlapping part of the bit line and the active region, and the second part is located between adjacent active regions; the top surface of the bit line conductive layer of the second part is lower than the top surface of the bit line conductive layer of the first part; and a plurality of bit line contact structures are located between the first part and the active region. The semiconductor structure sets the bit line as the first part which overlaps with the active region and the second part which is located between adjacent active regions, and sets the top surface of the bit line conductive layer of the second part as lower than the top surface of the bit line conductive layer of the first part, so that the relative cross-sectional area of adjacent bit lines is reduced, and the coupling capacitance effect between adjacent bit lines is reduced.

The invention discloses a capacitance effect proportion analysis method and system for a hybrid supercapacitor, and relates to the technical field of power systems, and the method comprises the steps: preparing hybrid supercapacitor samples with different battery type electrode mass proportions; determining the total mass of the positive electrode of the hybrid supercapacitor and the mass ratio of the components of the positive electrode; performing an electrochemical test on the hybrid supercapacitor sample by using a cyclic voltammetry; and calculating and analyzing a capacitance effect proportion based on a test result. According to the capacitance effect proportion analysis method of the hybrid supercapacitor provided by the invention, the proportion of the capacitance effect in external characteristics is effectively distinguished according to different working characteristics of the supercapacitor and the lithium battery, so that the capacitance effect in a real working environment can be really simulated. The optimal regulation and control ratio of the composite positive electrode composition material of the hybrid supercapacitor is obtained, and the problems of long time consumption and poor effect caused by empirical values adopted in the actual past production process are solved.

The invention relates to a negative capacitance tunneling field effect transistor and a preparation method thereof, belongs to the technical field of field effect transistors, and solves the technical problems of limited tunneling area and small on-state current of an existing tunneling field effect transistor. The transistor comprises a source region, an intrinsic region, a drain region, a gate oxide layer, a metal gate, a drain electrode, a source electrode and an HfO2 ferroelectric layer. And the lengths of the HfO2 ferroelectric layer and the metal gate are smaller than the length of the gate oxide layer. And the doping type of the intrinsic region is the same as that of the drain region and is opposite to that of the source region. The preparation method comprises the steps of sample wafer pretreatment, photoetching, etching, ion implantation, photoresist removal, activation, implantation and doping, gate oxide layer deposition, HfO2 ferroelectric layer preparation, metal gate preparation, oxide layer removal, and source electrode and drain electrode deposition. The invention is used for the tunneling field effect transistor with the short gate structure based on the negative capacitance effect.

The present invention discloses a novel super junction SGT MOSFET device and a preparation method thereof, belonging to the field of semiconductor technology, comprising a drain contact metal layer and a source contact metal layer, and an N+ type substrate, a super junction region and an isolation oxide layer arranged therebetween, wherein the super junction region comprises a super junction N column region and two lower super junction P column regions, an upper P column region is arranged above the lower super junction P column region, a P well is embedded in the upper P column region, and a source region for N+ ion implantation is embedded in the P well; a deep trench is arranged above the super junction N column region, and a control gate, a shielding gate and a gate oxide layer are arranged in the deep trench. The present invention further reduces the on-resistance, increases the withstand voltage, adjusts the electric field distribution in the drift region, improves the quality of the polysilicon deposited in the control gate, and improves the capacitance effect, and the preparation method provided by the present application simplifies the process steps of the novel super junction SGT MOSFET device and saves the manufacturing cost.

The application discloses a high-frequency ferroelectric negative capacitance field effect transistor and a preparation method thereof, and belongs to the field of field effect transistor logic devices and circuits of CMOS super-large integrated circuits. The high-frequency negative capacitance field effect transistor provided by the application overcomes problems of low working frequency and large hysteresis of a traditional negative capacitance field effect transistor by taking a needle-shaped ferroelectric domain structure ferroelectric film with a fast ferroelectric negative capacitance effect as a gate dielectric layer and combining specific device structures and processes. Compared with similar devices, the product has the outstanding advantages of fast operation speed, small hysteresis and low power consumption, and has important academic and application values in the fields of microelectronic devices, military industry and aerospace.

The invention relates to a power semiconductor technology, in particular to an IGBT device with low switching loss and a preparation method thereof, gate oxide layers are arranged on the inner walls of a first trench and a second trench, the lower parts of the gate oxide layers are filled with virtual trench gates, and the upper parts of the gate oxide layers are filled with effective trench gates, so that a split trench gate structure is formed; the Miller capacitance effect in the switching process of the device is effectively reduced, the coupling effect of voltage change in the starting stage on the grid potential is weakened, the overlapping time of voltage and current in the starting process is shortened, and the starting loss of the device is remarkably reduced; a transport path of carriers in the device is reasonably guided and strengthened by arranging the deep P region, so that the extraction rate of the carriers in the drift region in the turn-off process is increased, the current trailing phenomenon in the turn-off stage is effectively inhibited, the turn-off time is shortened, and the turn-off loss of the device is remarkably reduced.

In aspects, techniques for detecting and discriminating foreign objects near an inductive wireless power transfer system is disclosed. The method is based on hybrid inductive and capacitive sensing. The apparatus includes a sensing system, a measurement circuit, and a controller. The sensing system senses the object based on at least one of an inductive or a capacitive effect. The sensing system includes an inductive sense element, which has an electrical characteristic that changes in a presence of the object based on the inductive effect. The sensing system further includes a capacitive sense element, which has an electrical characteristic that changes in the presence of the object based on the capacitive effect. The measurement circuit measures the electrical characteristics in the inductive and capacitive sense circuits. The controller determines the presence of the object, and discriminates between metallic and non-metallic objects based on the change in the measured electrical characteristics.

A dual-frequency antenna structure includes a substrate, and a grounding element, a conductive sheet, a transmitting antenna, and a receiving antenna that are disposed on the substrate. The transmitting antenna includes a first coupling conductive pad, a first conductive column that is electrically coupled to the first coupling conductive pad and the conductive sheet, and a first feeding conductive pad. The first feeding conductive pad can produce a capacitive effect with each of the first coupling conductive pad and the grounding element. The receiving antenna includes a second coupling conductive pad, a second conductive column that is electrically coupled to the second coupling conductive pad and the conductive sheet, and a second feeding conductive pad. The second feeding conductive pad can produce a capacitive effect with each of the second coupling conductive pad and the grounding element.

The invention relates to the technical field of photovoltaic modules, and discloses an IV test method and device, electronic equipment, a storage medium and a program product, and the method comprises the steps: carrying out the light bath pretreatment of a module, and evaluating the effect through a power stability test; after the standard is reached, forward and backward voltage scanning tests are carried out, the scanning speed is controlled to enable the hysteresis to be lower than a preset threshold value, and the test power is determined to be stable based on a power stability criterion; and then a fill factor and photoelectric conversion efficiency are calculated, and an efficiency true value is evaluated through a weighted average function. Short-term stability is established through preprocessing, and initial fluctuation caused by the capacitance effect is reduced; the power test ensures a reliable starting point; carrying out scanning control and criterion suppression on hysteresis errors; and the weighted average improves the accuracy. The hysteresis error problem caused by the capacitance effect is effectively solved, efficient and accurate testing is achieved, and the testing speed and the result reliability are improved.

The present invention discloses a method and system for analyzing the capacitance effect ratio of a hybrid supercapacitor, which relates to the technical field of power systems, including: preparing hybrid supercapacitor samples with different battery-type electrode mass ratios; determining the total mass of the positive electrode of the hybrid supercapacitor and the mass ratio of its components; performing electrochemical tests on the hybrid supercapacitor samples using cyclic voltammetry; and calculating and analyzing the capacitance effect ratio based on the test results. The capacitance effect ratio analysis method of the hybrid supercapacitor provided by the present invention effectively distinguishes the capacitance effect ratio in the external characteristics of the supercapacitor and the lithium battery according to the different working characteristics of the supercapacitor, thereby ensuring that the capacitance effect in the real working environment can be truly simulated. The optimal control ratio of the composite positive electrode component materials of the hybrid supercapacitor is obtained to solve the problem of long time consumption and poor effect caused by the use of empirical values ​​in the actual production process in the past.

A Z-shaped MEMS double-layer solenoid inductor double-layer coil and its integrated preparation method and inductor element, including a double-layer coil with inner and outer layers and a substrate; the double-layer coil is a MEMS double-layer solenoid inductor double-layer coil with a silicon base or a cast flexible substrate as the base substrate, which expands the existing single-layer MEMS solenoid inductor coil into a double layer, greatly expanding the dimension of the MEMS inductor coil, and making new breakthroughs in improving the inductance value and quality factor. Compared with the traditional C-shaped winding method, the capacitance effect of the Z-shaped winding at high frequency will be well suppressed, so that its resonant frequency can be further improved, so that it can be used in some RF MEMS applications. The use of a pure MEMS preparation method can improve the processing efficiency and reduce the production cost of a single-chip coil. At the same time, the use of the MEMS process method makes it compatible with IC technology, so that it has better IC compatibility in packaging applications.

The utility model discloses a tensile strain germanium substrate and a tensile strain germanium sensor, which can be used in the field of semiconductors. The tensile strain germanium substrate comprises a first silicon substrate, a first intrinsic strain germanium layer, an intrinsic strain germanium / germanium-silicon multi-quantum well layer, a second intrinsic strain germanium layer, a second doped strain germanium layer, a ferroelectric oxide layer and a dielectric layer which are stacked in sequence; the diameter of the first silicon substrate is not less than 8 inches. Therefore, according to the germanium-based sensor manufactured based on the tensile strain germanium-based substrate, on one hand, the ferroelectric oxide has a negative capacitance effect, so that relatively large positive capacitance in a thick germanium vertical PIN structure can be effectively compensated, the capacitance of the whole germanium-based sensor is reduced, and meanwhile, high responsivity and high working speed of the germanium-based sensor are realized; and on the other hand, two photoelectric sensing layers including the second intrinsic strain germanium layer and the intrinsic strain germanium / germanium-silicon multi-quantum well layer exist, and the spectral response range of the germanium sensor can be remarkably expanded through the combined structure of the second intrinsic strain germanium layer and the intrinsic strain germanium / germanium-silicon multi-quantum well layer.

The invention relates to the technical field of molecular devices, in particular to a helicene molecule-based capacitance-inductance dual-function device and a preparation method thereof. The device comprises a first graphene point electrode, helicene molecules and a second graphene point electrode, the first graphene point electrode and the second graphene point electrode form a graphene point electrode pair, and the helicene molecules are connected between the graphene point electrode pair; the helicene molecules are switched between a capacitance effect and an inductance effect by changing the voltage change rate of alternating current applied to the helicene molecules; when the voltage change rate of the alternating current is 0.1-1.0 V / s, the helicene molecules have an inductance effect; and when the voltage change rate of the alternating current is greater than or equal to 10V / s, the helicene molecules have a capacitance effect. According to the preparation method provided by the invention, preparation is carried out on the basis of the graphene single-molecule field effect transistor, remarkable miniaturization of the size of the device is realized, and a relatively high integration level is shown.

The invention relates to a protection circuit for relieving a negative capacitance effect and a control method thereof, and electronic equipment, and relates to the technical field of integrated circuits, the circuit comprises a first field effect transistor, a second field effect transistor, a third field effect transistor and a fourth field effect transistor, the suppression circuit is configured as follows: the input end is connected with the second end of the first field effect transistor, the first output end is grounded, and the second output end is used for outputting a second electric signal with target frequency; the target frequency is associated with the negative capacitance effect of the first field effect transistor; the second field effect transistor is configured as follows: the control end is used for connecting the second output end of the suppression circuit; and the adjusting assembly is connected with the suppression circuit and is used for adjusting the inductance value and / or capacitance value of the suppression circuit, so that the suppression circuit outputs a second electric signal with the target frequency. And the influence of an interference signal generated by a negative capacitance effect on a subsequent MOSFET is suppressed.

The present invention provides a miniaturized narrowband bandpass filter transmission line based on artificial surface plasmons, comprising: an SSPP bandpass filter transmission line, a transition structure, and a 50Ω microstrip line. The 50Ω microstrip line is arranged on the SSPP bandpass filter transmission line and connected to the 50Ω microstrip line through the transition structure. The SSPP bandpass filter transmission line is composed of multiple SSPP bandpass filter units. The SSPP bandpass filter units include a floor layer, a dielectric layer, and a transmission layer stacked in sequence from bottom to top. The transmission layer includes: a central conductive strip, a short-circuit branch, and multiple open-circuit branches. The short-circuit branch and the multiple open-circuit branches are arranged on the central conductive strip. The short-circuit branch is provided with a metal through-hole that penetrates the dielectric layer. The short-circuit branch is directly connected to the floor layer through the metal through-hole to form an inductive effect to filter out low-frequency signals, and the short-circuit branch and the floor layer form a capacitive effect to filter out high-frequency signals. At the same time, curved open-circuit branches are provided to enhance the ability to regulate the frequency band and make the lateral size of the transmission layer more miniaturized.

A method and device for testing solar cells and components based on short pulse width, belonging to the field of solar cell testing, characterized in that: Voc, Isc, and Pmax are obtained through the first IV curve test within a flash cycle, and the accurate Pmax value is further obtained through the second test after adjusting the test parameters. By presetting the equivalent magnification of the second sampling delay, it is ensured that the test data collection in the Pmax core area in the second test is in a stable period. After setting, the test process does not require manual intervention, and accurate test results can be obtained by clicking once; the test method of the present invention does not rely on long pulse width to eliminate the capacitance effect during the test process, and can achieve the purpose of accurate testing within a relatively short pulse width, with simple effects and suitable for popularization and application.

A liquid crystal metasurface unit with fast response and a wide reflection phase regulation range, comprising a top dielectric plate layer, an upper metal layer, a liquid crystal layer, a lower metal layer, a lower dielectric plate layer, and a bottom floor metal layer stacked in sequence from top to bottom; the upper and lower metal layers respectively include a plurality of metal patches and DC bias lines, wherein the metal patches include liquid crystal regulation metal patches, the liquid crystal regulation metal patches of the upper metal layer and the liquid crystal regulation metal patches of the lower metal layer are overlapped up and down, forming a capacitive effect with the middle liquid crystal layer, the DC bias lines are respectively electrically connected to the metal patches, and are used to apply a voltage to regulate the dielectric constant of the liquid crystal layer through the liquid crystal regulation metal patches, and finally change the reflection phase of the metasurface unit; the metal patches form a plurality of resonant phase-shifting structures, and the phase regulation effects of the plurality of resonant phase-shifting structures are superimposed on each other to achieve a wide reflection phase regulation range of the liquid crystal metasurface unit.

The present application discloses a bioelectric signal acquisition electrode and a method for efficient electroencephalogram (EEG) signal acquisition, which relates to the technical field of signal processing. The method includes: Step 1: Based on ion diffusion and capacitance effect, perform dynamic impedance modeling of the electrode-tissue interface; calculate the density distribution of the conductive coupling agent based on the impedance function; Step 2: Calculate the signal quality index; perform signal enhancement according to the signal quality index to obtain an enhanced signal; Step 3: Extract features from the enhanced signal to obtain a feature signal; perform dynamic noise suppression according to the feature signal to obtain a noise suppression result; Step 4: Perform signal reconstruction according to the noise suppression result to obtain a reconstructed signal, and complete the acquisition of the EEG signal. The electrode design of the present invention improves the contact quality, and the distribution of the conductive coupling agent is more uniform, ensuring long-term stable monitoring. At the same time, through the adaptive noise suppression and signal reconstruction mechanisms, the clarity and fidelity of the signal are effectively improved.

The invention provides a nonvolatile radio frequency switch chip for a 5G radio frequency front end. An input port, an input transmission line, a ReRAM core area MIM unit group, an output transmission line and an output port are electrically connected in sequence; and the annular ring surrounds the peripheries of the input transmission line, the ReRAM core area MIM unit group and the output transmission line. The RAM core MIM unit is of a three-layer sandwich structure and comprises a bottom electrode layer, a dielectric layer and a top electrode layer from bottom to top; the bottom electrode and the top electrode are not electrically connected and are completely isolated by the intermediate dielectric layer. According to the invention, the n ReRAM core MIM units are equidistantly arranged in the same direction to form the ReRAM core MIM unit group, the on-resistance of the switch is reduced, the insertion loss is obviously reduced, the gradient ground wire coplanar waveguide transmission line is introduced to reduce the gap capacitance effect, the isolation is improved, and the high-frequency impedance matching is improved.

Method for operating a sensor element (112) for detecting at least one oxygen fraction of an exhaust gas (113) in an exhaust tract, wherein the sensor element (112) comprises at least one pump cell (114) with at least two pump electrodes (118) connected to each other by at least one solid electrolyte (116), wherein the pump electrodes (118) comprise a first pump electrode and a second pump electrode, wherein the first pump electrode is arranged as an inner pump electrode (124) in a cavity of the sensor element (112) and can be exposed to the exhaust gas (113) via a diffusion barrier (121), wherein the second pump electrode is an exhaust air electrode (119) which can be connected to ambient air (125) via an exhaust air duct (123), wherein at least one measured quantity is detected in the method, wherein the measured quantity is a pump current (Ip) between the first and the second electrode, which represents a limiting current, and wherein at least one compensation quantity is determinedwherein the compensation quantity is at least partially dependent on capacitive effects at at least one junction between at least one of the pump electrodes (118) and the solid electrolyte (116), namely a charging current (Δlp) between the first and the second electrode, which is determined by measuring at least one time course of at least one electrical voltage across at least one electrochemical double layer U, dl (t) is determined using the time course of the electrical voltage across the electrochemical double layer U dl (t) and at least one electrode capacitance C IPE using the formula Δ I p = ∂ Q ∂ t = CIPE ∂ U dl ∂ t ΔIp where at least one corrected measured quantity (Ip) is obtained from the measured quantity and the compensation quantity. korr ) is determined using the formula IP korr = Ip - ΔIp, where the corrected measured quantity (Ip) korr) the oxygen content in the exhaust gas (113) is determined.