4results about "Switching accelaration modifications" patented technology

The application provides a high-speed multi-voltage domain level conversion circuit with constant duty cycle, comprising: a level conversion module, the level conversion module comprising a pull-up tube circuit and a pull-down tube circuit; wherein the pull-up tube circuit is connected between a high power voltage domain and an output node, the pull-down tube circuit is coupled to the output node, and the output node is used to output an output signal with high and low levels; a first pull-down module connected between the pull-down tube circuit and a ground terminal, used to control the duty cycle of the output signal when the high power voltage domain is lower than a first preset value; a second pull-down module connected between the output node and the ground terminal, used to control the duty cycle of the output signal when the high power voltage domain is higher than a second preset value; wherein the second preset value is greater than the first preset value. Advantage: two pull-down modules are used to keep the high-speed signal output duty cycle constant at different voltages of the high power voltage domain.

An on-board device installed in a vehicle and is provided with an input circuit including an input end into which an input voltage is entered, and a drive power supply circuit that outputs a drive voltage to the input circuit. The input circuit includes a PNP bipolar transistor, a pull-up circuit, a second pull-up resistance, and a base resistance. The pull-up circuit includes a pull-up power supply, a first pull-up resistance, and a second diode with an anode facing the first pull-up resistance, which are connected in series and are provided between a base of the PNP bipolar transistor and the input end. The second pull-up resistance is provided between the base of the PNP bipolar transistor and the drive power supply circuit. The base resistance is provided between the base of the PNP bipolar transistor and the second pull-up resistance.

Reduced delay and improved threshold tracking over PVT in a comparator input circuit and comparator are provided by circuits that include an inverter stage having a first complementary pair of transistors connected in a push-pull configuration. An input of the inverter stage is coupled to the gates of the first complementary pair of transistors, and an output of the inverter is coupled to the drains of the first complementary pair of transistors. The circuits also include one or more first degeneration transistors coupled between a source of one of the first complementary pair of transistors and a power supply rail of the circuit, and a reference circuit with an output coupled to one or more gates of the first degeneration transistors. The reference circuit controls the one or more first degeneration transistors to cause the inverter stage to have a threshold voltage equal to a threshold control voltage.

Disclosed herein are apparatus, system, method, and computer-readable medium aspects for interfacing a MIPI transmitter with a SERDES receiver. An example method aspect includes receiving first and second MIPI signals at respective inputs and level-shifting each signal using corresponding diodes. The level-shifted signals are applied to the base terminals of first and second transistors, whose emitters are coupled together. A control current is generated via a current mirror formed by a third and fourth transistor, with the current set by a control voltage. This control current is supplied to the coupled emitters, enabling the production of differential output signals at the collector terminals of the first and second transistors for input to a SERDES receiver.