285results about How to "Shorten rise time" patented technology

A cooled electrosurgical system includes an electrosurgical device having at least one electrode for applying electrical energy to tissue. In one embodiment, the electrode includes an internal cavity in which a cooling medium such as water is contained. The internal cavity is closed at both ends of the device such that the cooling medium is contained within the electrode at the surgical site such that the cooling medium does not contact the tissue being treated. The electrosurgical device has an electrode and a heat pipe to conduct heat from the electrodes where substantially all heat conducted from the electrode through the heat pipe is dissipated along the length of the heat pipe. The heat pipe can have a thermal time constant less than 60 seconds and preferably less than 30 seconds.

A compact write element includes a conductive shield layer, an insulating write gap layer, a pole pedestal, a coil, and a conductive pole layer, and, in some embodiments also includes a backgap. The pole pedestal and the coil, and, in some embodiments the backgap, constitute a self-aligned array of components that may be formed in a single masking operation to allow for very tight tolerances between the components for a shorter yoke length. The pole layer is substantially flat and parallel to the conductive shield layer, providing for a shorter stack height. Also, a compact MR read/write head includes such a write element and a magnetic data storage and retrieval system includes the compact MR read/write head having such a write element.

The invention discloses a shift register cell, a gate driving circuit, a data driving circuit and a display, wherein the shift register cell comprises a first signal input end, a second signal input end, a first clock signal input end, a pull-down control signal input end, a signal output end (VOUT), an input module (21), a driving module (22), a driving control end pull-down delay module (23), a clock feed through inhibition module (25) and a low-level retention module (24). According to the invention, the signal output end can quickly discharge by a charging transistor in the driving module by prolonging discharging time for a driving control end in the shift register cell; and the electricity leakage of the transistor in the clock feed through inhibition module is inhibited, so that work speed and integration degree of the circuit are improved.

A driver circuit includes a circuit 200, a transistor 101_—1, and a transistor 101_—2. A signal is selectively input from the circuit 200 to a gate of the transistor 101_—1 and the transistor 101_—2, so that the transistor 1011 and the transistor 101_—2 are controlled to be on or off. The transistor 101_—1 and the transistor 101_—2 are turned on or off; thus, the wiring 112 and the wiring 111 become conducting or non-conducting.

The invention belongs to the technical field of the power supply, in particular to an all solid state high voltage nanosecond pulse power supply. The power supply is divided into the following two parts: a series voltage booster circuit and a pulse compression circuit, wherein the series voltage booster circuit consists of a series of voltage units which are connected in series to realize the function of voltage boost; each voltage unit is provided with a capacitor connected with a switch which can be connected and disconnected, and capacitors of the series of the voltage units form a capacitor unit; one part in the switch is a charge switch to charge the capacitors in parallel, while the other part is a discharge switch to discharge the capacitors in series; the pulse compression circuit is connected with a magnetic switch in a series connection mode by an energy storage capacitor or a sharpening capacitor. The power supply reduces system volume to connect more voltage units in series, and uses a direct current charge power supply with lower voltage to charge a pulse generator; the adopted switch device generator has longer service life and higher frequency; and the used magnetic switch reduces rise time of voltage pulse output by a Marx circuit, and is free of maintenance and has low failure rate.

A driver circuit includes first to third transistors, a first circuit, and a second circuit. In the first transistor, a first terminal is electrically connected to a second wiring, a second terminal is electrically connected to a first wiring, and a gate is electrically connected to the second circuit and a first terminal of the third transistor. In the second transistor, a first terminal is electrically connected to the first wiring, a second terminal is electrically connected to a sixth wiring, a gate is electrically connected to the first circuit and a gate of the third transistor. A second terminal of the third transistor is electrically connected to the sixth wiring. The first circuit is electrically connected to a third wiring, a fourth wiring, a fifth wiring, and the sixth wiring. The second circuit is electrically connected to the first wiring, the second wiring, and the sixth wiring.

A standalone thermal energy recycling device in which exhaust air emitted from an internal combustion engine exchanges heat with that being heated during regeneration of after-treatment devices. By using the thermal energy recycling device, heat generated for regeneration is used to compensate energy loss during heat exchange rather than provide the overall energy needed for boosting exhaust flow temperature to target. Inside the thermal energy recycling device, heat exchanger is bypassed during normal engine operations for decreasing back pressure.

A method of driving an organic light emitting diode using an applied voltage to increase the voltage of the anode is provided. The voltage of the anode is detected and compared to a reference voltage. When the voltage of the anode is lower than the reference voltage, a voltage source is applied to precharge the anode of the organic light emitting diode. When the voltage of the anode reaches the reference voltage, the precharge process is stopped. Alternatively, the reference voltage can be dynamically obtained using a sample/hold circuit to dynamically perform sampling on the output voltage of a constant current source.

Optically isolated bias control circuit which provides bias current for switching circuits. Invention is amenable to high speed switching control with instantaneously variable pulse widths and duty cycles. Invention can be operated from DC upward in frequency, limited only by the characteristics of the implementing electrical components and electrical interconnections. Complementary embodiments of invention provide high speed operation with minimal electrical charge flow. Solar powered embodiments of invention may be used to control the switching of high power MOSFET-based switching circuits.

Provided is a semiconductor device exemplified by an inverter circuit and a shift register circuit, which is characterized by a reduced number of transistors. The semiconductor device includes a first transistor, a second transistor, and a capacitor.

One of a source and a drain of the first transistor is electrically connected to a first wiring, and the other thereof is electrically connected to a second wiring. One of a source and a drain of the second transistor is electrically connected to the first wiring, a gate of the second transistor is electrically connected to a gate of the first transistor, and the other of the source and the drain of the second transistor is electrically connected to one electrode of the capacitor, while the other electrode of the capacitor is electrically connected to a third wiring. The first and second transistors have the same conductivity type.

It is an object to provide a semiconductor device which can supply a signal with sufficient amplitude to a scan line while power consumption is kept small. Further, it is an object to provide a semiconductor device which can suppress distortion of a signal supplied to the scan line and shorten a rising time and a falling time while power consumption is kept small. A semiconductor device which includes a plurality of pixels each including a display element and at least one first transistor and a scan line driver circuit supplying a signal for selecting the plurality of pixels to a scan line. A light-transmitting conductive layer is used for a pixel electrode layer of the display element, a gate electrode layer of the first transistor, source and drain electrode layers of the first transistor, and the scan line. The scan line driver circuit includes a second transistor and a capacitor for holding a voltage between a gate electrode layer of the second transistor and a source electrode layer of the second transistor. The source electrode of the second transistor is connected to the scan line.

The embodiment of the invention discloses an array substrate line drive unit and circuit, and a liquid crystal display panel. An output end of a pull-up control module of an array substrate line driveunit, a control end of a pull-up module, a first end of a pull-down maintenance module, a first end of a pull-up module, a control end of a signal download module and a first end of a bootstrap module are connected with a gate signal point, a second end of the pull-down maintenance module, a second end of the pull-down module, a second end of the bootstrap module and an output end of the pull-upmodule are connected with a horizontal scanning line, a third end of the pull-down maintenance module and a third end of the pull-down module are connected with a first level signal line, a fourth endof the pull-down maintenance module and a fourth end of the pull-down module are connected with a second level signal line, an input end of the pull-up module and an input end of the pull-down moduleare connected with a clock signal line; and the voltage of the first level signal line is smaller than the voltage of the second level signal line. The array substrate line drive unit and circuit, and a liquid crystal display panel can shorten the fall time of the gate signals and can improve the charge efficiency.

Aluminum-base alloy workpieces have surfaces with films of aluminum oxide which inhibit good contact with weld faces of resistance spot weld electrodes and the faying surfaces of, for example, sheet workpieces stacked for welding. Sometimes, the surfaces of the sheets also are coated with an adhesive or a sealer which further complicates welding. But in accordance with this invention, weld faces of opposing, round, copper welding electrodes are pressed against opposite outside surfaces of the sheets at a spot weld site and weld current is applied to the electrodes in accordance with a three-stage weld schedule to better form each weld. The weld schedule comprises a Conditioning stage (stage 1), a weld nugget Shaping stage (stage 2), and a weld nugget Sizing stage (stage 3).

The invention relates to a low-pressure casting filling method comprising the steps of arranging a reducing sleeve arranged on an upper port of a riser tube (10), guiding magnesium alloy liquid from the riser tube (10) to a cast through the reducing sleeve; arranging a protective gas inlet on the reducing tube, and enabling the protective gas into the space above the magnesium alloy liquid in the riser tube (10) for protecting the magnesium alloy liquid in the riser tube (10) and reducing oxidation. The a low-pressure casting filling method uses a low-pressure casting filling device which includes the reducing sleeve composed of an upper part (1) of the reducing sleeve, a lower part of the reducing sleeve; wherein a magnesium alloy liquid sensor mounting hole (10) is arranged on a lower side wall of the lower part of the reducing sleeve; a plurality of subsize air suctions with enough section width are arranged on a joint face of the upper part (1) and the lower part (8) of the reducing sleeve, and the air suctions are slit structures with rectangular sections. The low-pressure casting filling method of the invention can obviously reduce the oxidation of the magnesium liquid in the riser tube and improve the quality of a magnesium alloy low-pressure casting member.

A latch section includes a latch circuit. The latch circuit includes inverters and latches an input signal from a gating section. Between one of the inverters of the latch circuit and the output terminal OUT is disposed an analog switch whose ON/OFF characteristics are switched according to High/Low of a reset signal. Between the output terminal and an input for receiving a low potential as a power supply of a flip-flop is disposed a switching element whose ON/OFF characteristics are switched according to High/Low of the reset signal.

In a constant current switching power supply, the current flowing through the load, is feedback-controlled based on the deviation of the detection value (Id) from the target value (Ir), multiplied by a proportional gain (PG), the value of the gain is set to a predetermined value immediately after the load switching element (5) is turned on, and is thereafter gradually reduced with elapse of time. When the current to the load (4) is supplied by a PWM controlled switching circuit (1), the PWM signal is determined based on a product of the deviation and a proportional gain. It is possible to shorten the rise time of a pulsative load current in a situation where the current is relatively large.

A composite battery set, including a metal-ceramic ruthenium-oxide ultracapacitor and a secondary lithium-ion battery, is provided. The composite battery set is electrically connected to an electrical device, which cuts down the total impedance by the metal-ceramic ruthenium-oxide ultracapacitor to increase the output power and the current. The composite battery set is also able to react a pulse rise time less than 5 ms, to speed up the signal react time of the electronic device. And the composite battery set further includes a protective circuit module (PCM) to protect the secondary lithium-ion battery so as to extend the service life and lifespan.

A source device that provides contents to a sink device and a communication method thereof are provided. The communication method of the source device includes: transmitting a communication signal including a High-bandwidth Digital Content Protection (HDCP) signal to the sink device; determining a communication status with the sink device using an HDCP communication result received from the sink device; and adjusting the communication signal according to the determined communication status. Therefore, the communication method can provide a user with optimized contents.

In the die cushion device, a shock absorber device relieves shock between a cushion pad and a support section. The shock absorber device includes a damping section and an elastic section. The damping section generates reaction force in accordance with the relative speed of the cushion pad with respect to the support section. The elastic section generates reaction force in accordance with the relative displacement of the cushion pad with respect to the support section. The controller section controls a servomotor so that a speed difference between the speed of the slide member and the speed of the support section is set to be a predetermined target speed difference value that changes over time.

A semiconductor memory device includes a first nonvolatile memory cell, a bit line connected to the first nonvolatile memory cell, and a control circuit connected to the first nonvolatile memory cell and the bit line, and disposed and configured in such a manner as to reset the bit line to a predetermined first potential state only for a certain period “a” of time in response to transition of an input address signal. The first nonvolatile memory cell has a gate electrode formed on a semiconductor layer via a gate insulating film; a channel region disposed under the gate electrode; diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region; and memory functional units formed on both sides of the gate electrode and having the function of retaining charges.

A circuit for a high speed digital buffer has an active load circuit connected to an output of the digital buffer. The active load circuit loads the buffer output with an active inductance to reduce the RC time constant at the buffer output. The active load circuit may be based on two active devices connected to the buffer output so as to form a differential cascode circuit.