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485results about How to "Improve write performance" patented technology

Method and system for internal cache management of solid state disk based on novel memory

The invention provides a method and a system for internal cache management of a solid state disk based on a novel memory. The system for internal cache management of the solid state disk comprises an SATA (serial advanced technology attachment) interface controller, a microprocessor, a DRAM (dynamic random access memory), a local bus, a flash controller, an NAND flash and a PCRAM (phase change random access memory) cache. The PCRAM cache comprises a data block displacement area and a mapping table storage area, wherein the data block replacement area is used for storing data blocks displaced to the PCRAM cache from the DRAM, and the mapping table storage area is used for storing mapping tables among logic addresses and physical addresses of data pages. By the method for internal cache management of the SSD (solid state disk) based on the PCRAM, write cache for the solid state disk is realized to overcome read-write imbalance of the solid state disk, write performances are effectively improved, random write operation and wiping operation of the solid state disk are decreased, accordingly, the service life of the solid state disk is prolonged, and the integral I / O (input / output) performance of the solid state disk is improved.
Owner:SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI

Write buffer detector, addressing method of written data and parallel channel write method

The invention provides a solid state disk (SSD) controller based on a write buffer detector, an addressing method of written data and an optional parallel channel write method, which achieve accurate judgment on address characteristics of data, respectivelycache continuous address data and random address data, write different write strategies according to different data types, and improve write speed of random data. The write buffer detector comprises an address subtractor, a continuous data buffer and a random data buffer, wherein the address subtractor is used for conducting subtraction on current page addresses and previous page addresses and comprises a previous page address register and a current page address register, the previous page address register is used for storing data and addresses at the previous page, and the current page address register is used for storing data and addresses at the current page; the size of the continuous data buffer is set to be a parameter Sequential-Buffer-Size, the continuous data buffer is used for caching data which is probably judged to be continuous access data, and data in the continuous data buffer is judged to be continuous data if the length of data in the continuous data buffer reaches the set parameter; and the random data buffer is used for caching random access data.
Owner:SHANGHAI JIAO TONG UNIV

Flash data management method and system

The invention is adapted to the technical field of a solid-state storage technology, in particular to a flash data management method and a flash data management system. The flash data management method comprises the following steps of: managing address mapping, building a logic physical address mapping table mapped on the same physical page by a plurality of logic pages, setting the logic pages as index of the logic physical address mapping table, wherein each logic page corresponds to a physical page value, the physical page value comprises data segments of index values which respectively point to the actual physical page address and correspond to one of the logic pages, and arbitrary logic sequences between the plurality of logic pages in the physical page are relevant; and mapping the logic page to the physical page and updating the logic physical mapping table during writing data operation, or reading the logic physical address mapping table according to the logic pages during reading data operation, and indexing to the corresponding physical page. Therefore, the plurality of logic pages can be mapped to the same physical page according to the size of the physical page and the sizes of the logic pages, reduction of ready-modify-write (RMW) operation is facilitated, and the writing performance is improved.
Owner:RAMAXEL TECH SHENZHEN
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