Flash data management method and system

A technology of data management and flash memory management, which is applied in the direction of memory system, electrical digital data processing, memory architecture access/allocation, etc., can solve the problems of flash memory data management method and practical use inconvenience of the system, and achieve reduction of RMW operation, reduction of RMW, The effect of improving write performance

Inactive Publication Date: 2013-01-09
RAMAXEL TECH SHENZHEN
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Problems solved by technology

[0003] In summary, the existing flash memory data management methods and systems obvio

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  • Flash data management method and system
  • Flash data management method and system
  • Flash data management method and system

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Embodiment Construction

[0050] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0051] like figure 2 Shown, a kind of flash memory data management method of the present invention comprises:

[0052]Step S201, establishing a logical-physical address mapping table in which multiple logical pages are mapped to the same physical page. The logical-physical address mapping table uses the logical page as an index, and each logical page corresponds to a physical page value, and the physical page value includes pointers to actual physical pages. The page address and data segment corresponding to the index value of a logical page.

[0053] Step S202, mapping the logical page to a phy...

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Abstract

The invention is adapted to the technical field of a solid-state storage technology, in particular to a flash data management method and a flash data management system. The flash data management method comprises the following steps of: managing address mapping, building a logic physical address mapping table mapped on the same physical page by a plurality of logic pages, setting the logic pages as index of the logic physical address mapping table, wherein each logic page corresponds to a physical page value, the physical page value comprises data segments of index values which respectively point to the actual physical page address and correspond to one of the logic pages, and arbitrary logic sequences between the plurality of logic pages in the physical page are relevant; and mapping the logic page to the physical page and updating the logic physical mapping table during writing data operation, or reading the logic physical address mapping table according to the logic pages during reading data operation, and indexing to the corresponding physical page. Therefore, the plurality of logic pages can be mapped to the same physical page according to the size of the physical page and the sizes of the logic pages, reduction of ready-modify-write (RMW) operation is facilitated, and the writing performance is improved.

Description

technical field [0001] The invention relates to the technical field of solid-state storage, in particular to a flash memory data management method and system. Background technique [0002] In the FTL (Flash Translation layer, Flash Translation Layer) of the existing solid-state hard disk, based on the page mapping technology, the physical page size of NAND FLASH (NAND flash memory) is used as the logical page size, that is, the physical page and the logical page are one by one. corresponding. Although the minimum operating unit of the host system is a logical block, its size is 512B, but the actual read and write files are often 4KB (determined by the file system), the physical page size of the previous NAND FLASH is not greater than 4KB, so there is no need to distinguish logical pages and physical pages. But at present, the physical page size of NAND FLASH is mainly 8KB / 16KB, or even larger. In this case, the physical page is still used as the logical page, and the rand...

Claims

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Application Information

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IPC IPC(8): G06F12/06
CPCG06F12/0246G06F12/0292G06F12/0871G06F12/0897G06F2212/1016G06F2212/7201G06F2212/7203
Inventor 方浩俊王猛徐伟华
Owner RAMAXEL TECH SHENZHEN
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