10 results about "Elementary circuit" patented technology

The invention relates to the technical field of circuit design, in particular to a digital circuit simulation design method and system. The method comprises the following steps: identifying a design demand document, performing deep semantic analysis and demand constraint mining, and constructing a demand specification constraint parameter set; performing demand complexity evaluation and multi-level division according to the demand specification constraint parameter set, and constructing a basic circuit architecture design blueprint; circuit routing path planning is carried out according to the basic circuit architecture design blueprint, and a standardized circuit topology network is constructed; performing electric signal propagation simulation on the standardized circuit topology network, and performing global circuit adaptability adjustment to obtain a circuit topology design scheme; and carrying out an extreme condition simulation test based on the circuit topology design scheme, and carrying out comprehensive performance evaluation to obtain a circuit performance evaluation report. By deeply understanding the user demand intention, the circuit layout matched with the user demand is designed, and the overall circuit performance is improved.

The present invention provides a method for establishing a process drift model of circuit characteristics for circuit simulation, comprising: performing first, second, third, and fourth Monte Carlo simulation operations based on a first netlist file and predetermined process model data to generate first, second, third, and fourth performance simulation results, wherein the first netlist file is used to indicate the basic circuits in the circuit system; and executing a performance simulation result extension procedure based on the first, second, third, and fourth performance simulation results to generate a plurality of performance simulation results to establish the process drift model for circuit simulation to generate circuit simulation results of the circuit system based on one or more of the plurality of performance simulation results, wherein the number of the plurality of performance simulation results is greater than four.

Comprising a housing, in which a basic circuit board (11) comprising electrical, electronic and mechanical components is arranged within the device, by means of which the function of the device is achieved, an input and an output are provided, the invention relates to a device (1) for access to the Internet, in particular for access to the Internet, in such a way that the device can be connected to a network connection via an input for access to the Internet and to a further device on an output side in a wired and / or wireless manner, a general-purpose main board (10) is provided, which is connected to a base circuit board (11) via interfaces (1, 2) of the base circuit board and corresponding interfaces of the main board, at least one module (A, B) is also provided. The basic circuit board (11) has at least one interface (1, 2) independently of the module (A, B) or the function of the module (A, B).

The invention relates to a drive circuit for the control input of a power transistor in a clocked converter, in particular in a bridge leg, which comprises two power transistors to be connected. The drive circuit is coupled in parallel to the control input of each power transistor. The drive circuit comprises two first auxiliary transistors, which are connected together at their emitter at a first connection point. One PNP and one NPN auxiliary transistor are operated in a base circuit, respectively. Each drive circuit is activated by applying a current to its first connection point. The activation current is a charging or discharging current of at least one capacitor, which is also connected to the first connection point. The at least one capacitor is connected in parallel to the output of the bridge leg. The combination of the bridge capacitor and / or the activation capacitor with the drive circuit causes the control input of the power transistor connected thereto to be short-circuited for as long as the operating voltage of the same power transistor changes, in order to place it in a standby position for this length of time.

This disclosure relates to a power unit and a power module. The power unit includes: a first metal layer comprising a power region, a low-voltage region, and a high-voltage region arranged sequentially in a first direction; a basic circuit unit including: at least two main switching transistors located in the power region, with their drains electrically connected to the power region and their sources electrically connected to the low-voltage region; an auxiliary switching transistor located in the high-voltage extension region, with its drain electrically connected to the high-voltage extension region and its source electrically connected to the drain of the main switching transistors; a clamping capacitor electrically connected to the low-voltage region and the high-voltage region; the low-voltage region of the first basic circuit unit being electrically connected to the power region of a second basic circuit unit via a connection region; and the low-voltage extension region being electrically connected to the low-voltage region of the second basic circuit unit. The design of clearly separating the high-electric-field and low-electric-field regions within the power unit improves its electrical reliability. The high symmetry of the power module design based on the power unit reduces the module's parasitic inductance and improves the dynamic response speed of the power module.

The invention relates to a single-ended crystal oscillator circuit capable of rapidly starting oscillation, and relates to the field of analog CMOS (complementary metal oxide semiconductor) integrated circuits. According to the technical scheme, three basic circuits, namely a voltage series positive feedback circuit, a transconductance amplifier circuit and a controlled source circuit, are adopted to form equivalent negative resistance required by quartz crystal oscillation; wherein the voltage series positive feedback circuit is used for sampling the terminal voltage of the quartz crystal and transmitting the sampled terminal voltage to the transconductance amplifier in a positive feedback form; the transconductance amplifier converts the positively fed-back voltage signal into a current signal; the controlled source circuit linearly amplifies a current signal output by the transconductance amplifier so as to provide a large enough current for the quartz crystal, and finally the oscillation circuit is generally represented as an equivalent negative resistance satisfying the oscillation of the quartz crystal. Moreover, compared with a traditional double-end crystal oscillator structure, the double-end crystal oscillator has the advantages that the number of chip pin terminals is reduced, and the cost of chip manufacturing and chip application is further reduced.

A manufacturing method for a circuit board structure is provided. The manufacturing method for the circuit board structure includes the following steps. A plurality of conductive films are patterned to form a plurality of circuit layers, wherein the circuit layers include a first circuit layer and a second circuit layer. A plurality of dielectric layers are provided, wherein the dielectric layers include a first dielectric layer and a second dielectric layer. The first dielectric layer, the first circuit layer, the second dielectric layer, and the second circuit layer are sequentially stacked on the first basic circuit layer. A lamination process is performed to fixedly attach the first dielectric layer, the first circuit layer, the second dielectric layer, and the second circuit layer to the first basic circuit layer.

An electrical connection box (11) is provided with circuit elements (23, 33), and is provided with: a first circuit unit (21) having a plate-shaped first base member (22) and a basic circuit element (23) disposed on the first base member (22) and constituting a part of the circuit elements; and a second circuit unit (31) having a plate-shaped second base member (32) and an additional circuit element (33) disposed on the second base member (32) and constituting a part of the circuit element. The second circuit unit (31) is laminated on the first circuit unit (21).

The application discloses a battery formation and rationing reference generation and data back-checking equipment, which comprises a basic circuit and an acquisition circuit, the basic circuit comprises a first digital-to-analog converter, a second digital-to-analog converter, a first resistor, a second resistor and an operational amplifier, the acquisition circuit comprises an analog-to-digital converter, a multi-channel analog switch and an MCU processor, battery channels are divided into multiple groups, each group of battery channels corresponds to a set of multi-channel analog switches, each battery channel is electrically connected with a corresponding channel detection port of the analog-to-digital converter through the set of multi-channel analog switches, and a signal output end of the analog-to-digital converter is electrically connected with a signal input end of the MCU processor through an SPI bus; the application further comprises a back-checking method, which comprises the following steps: establishing an output reference; realizing independent calibration of each battery channel; acquiring battery data and performing numerical operation. The application has the beneficial effects of simple hardware, low cost, batch application in occasions with more channels of single equipment and cost reduction.

The invention provides a test board for a chip aging test, and relates to the technical field of chips. In the test board, the input end of a micro buffer circuit is used for inputting an initial high-frequency square wave signal, and the output end of the micro buffer circuit is used for being electrically connected with the input end of an N-order passive LC low-pass filter; the output end of the N-order passive LC low-pass filter is used for being electrically connected with one end of the impedance matching resistor and the input end of the chip to be tested so as to input a target sine wave signal to the chip to be tested, the other end of the impedance matching resistor is grounded, and the value of N is an even number larger than 2; the micro buffer circuit is used for adjusting the input initial high-frequency square wave signal into a target high-frequency square wave signal; and the N-order passive LC low-pass filter is used for converting the target high-frequency square wave signal into a target sine wave signal, so that a test board can be arranged based on fewer basic circuit elements, the test cost is low, the occupied space is small, and the output target sine wave signal can meet the signal quality requirement.