526 results about "Phase discrimination" patented technology

A method for electrically investigating a wall of a borehole in a geologic formation including injecting a current into the formation at a first position along the wall and returning the current at a second position along the wall, the formation current having a frequency below about 100 kHz, measuring a voltage in the formation between a third position and a fourth position along the wall, the third and fourth positions being located between the first and second positions, and determining an amplitude of a component of the voltage in phase with the current.

The invention discloses a field programmable gate array (FPGA)-based multi-channel real-time global position system (GPS) tracking method. The method comprises the following steps of: establishing an FPGA-based coupling circuit of an incoherent delay lock loop and a digital Costas loop to track Doppler drift of a coarse / acquisition (C / A) code phase and carrier frequency, demodulating navigation data during tracking, and adding a lock detector into the digital Costas loop to judge the demodulated result; establishing an FPGA-based single-channel control module and a whole tracking control module, and controlling phase discrimination filtering work in each tracking channel and the whole channel so as to control coordinative operation of the whole multi-channel tracking; and directly copyinginstantiation on the basis of finishing a single channel, realizing a parallel multi-channel tracking mode, and transmitting the tracked and demodulated multi-path navigation messages to subsequent navigation calculation in a single program initiation (SPI) bus mode.

A clock test apparatus for a semiconductor integrated circuit includes a delay unit configured to delay an internal clock signal. A comparison unit compares the phase of an output signal of the delay unit with the phase of a reference clock signal. A phase discrimination unit receives a test mode signal, the reference clock signal, and an output signal of the comparison unit, thereby outputting a discrimination signal.

The invention provides a digital PLL (Phase-Locked Loop) based phase noise measuring device. The digital PLL based phase noise measuring device comprises a frequency power measuring unit, a phase discrimination unit, a filtering unit, a DC (Direct Current) bias compensation unit, a low-noise amplification unit, an acquisition, frequency discrimination and phase discrimination unit, a digital loop filtering unit, a phase discrimination constant detection unit, a self-adaptive digital gain control unit, a reference source unit, and a signal processing and displaying unit. According to the digital PLL based phase noise measuring device, a double-balanced mixer is adopted as a phase discriminator, the phase noise of a measured source is extracted through a digital PLL, the specific noise extraction mode is divided into frequency mixer phase discrimination and digital delay line frequency discrimination, and DC caused by a loop circuit is counteracted through a DC bias compensation circuit, so that too big DC after amplification, induced ADC saturation and induced loop lock-losing are prevented. The implementation scheme of the digital PLL based phase noise measuring device is simple, totally excellent phase noise measuring sensitivity can be realized, the realized analysis frequency spectrum range is also very wide, and phase noise testing demands of most signal sources can be satisfied.

The invention provides a GNSS / MINS (global navigation satellite system / micro-electro-mechanical systems inertial navigation system) super-deep combination navigation method, aiming to realize super-deep combination of a GNSS and an MINS. The GNSS uses a direct location estimation method to estimate location errors, speed error and clock errors according to location and speed auxiliary information provided by an INS (inertial navigation system) to close loops; a system takes an MIMU (MINS inertial measurement unit) and a base band correlator as sensors to realize all the navigation functions in a top combinational algorithm, in other words, the algorithm takes the GNSS base band correlator as the sensor of sensitive space-time locating fields and takes the MIMU as the sensor of sensitive inertance fields to realize integral combination of the GNSS and the MINS; and by the aid of the INS, the GNSS combines multichannel information to perform vector phase discrimination and vector locating. The invention further provides super-deep combination system and device applied to the method. The method, the system and the device have the advantages of high navigation accuracy, good dynamic property, high GNSS tracking sensitivity, high GNSS anti-interference performance, wide GNSS dynamic pulling range and the like; and in theory, the dynamic range is limited by trends of the MINS, and -160dBM (decibels above one milliwatt in 600 ohms) signal tracking can be realized by the GNSS by the aid of the MINS.

The invention discloses a synchronous compression transformation order analysis method for rolling bearing fault diagnosis. According to the method, firstly, SST is utilized to analyze a variable-speed vibration signal of a bearing to obtain time-frequency distribution of the vibration signal; secondly, an instantaneous frequency ridge of frequency conversion is extracted and subjected to high-order polynomial fitting, a fitted instantaneous frequency curve is obtained, and phase discrimination time marks are solved according to the fitted instantaneous frequency curve; thirdly, equal-angle resampling is performed on the original vibration signal to obtain an angular domain signal; and fourthly, Hilbert envelope demodulation is performed on the angular domain signal, an envelope order spectrum of the angular domain signal is solved, whether the rolling bearing has a fault or not and the fault type are judged by analyzing the envelope order spectrum, a diagnosis result is given, maintenance suggestions are proposed, and therefore normal running of a metro vehicle is guaranteed. Through the synchronous compression transformation order analysis method, instantaneous frequency conversion information contained in the vibration signal can be precisely extracted, order tracking is realized, a specific hardware device is not needed, the installing process is greatly simplified, and thefault monitoring cost is lowered.

The invention discloses a high-precision time difference type single-pulse ultrasonic flowmeter system and a flow measurement method thereof. The method comprises the following steps of: sending a control signal to a transceiving switch unit and a single-pulse signal transmitting and driving unit; sending a standard time delay signal to a phase discrimination integral unit; calculating to obtain a time difference of the ultrasonic sequential stroke transmission and the ultrasonic return stroke transmission in a flowmeter pipeline by measured ultrasonic sequential stroke transmission time and the measured ultrasonic return stroke transmission time; selecting an ultrasonic energy converter; generating a single-period sine wave signal; sending the signal to the ultrasonic energy converter; sending an ultrasonic signal to an ultrasonic signal processing unit; filtering and amplifying the ultrasonic signal; determining an arrival signal by zero detection and threshold value detection; comparing the arrival signal with the standard time delay signal to obtain the ultrasonic sequential stroke transmission time and ultrasonic return stroke transmission time; and according to the time difference of the ultrasonic sequential stroke transmission and the ultrasonic return stroke transmission as well as the pipeline diameter, calculating to obtain the unit time flow of pipeline fluid.

Reference signals are combined with a chop frequency signal in a pulse width modulator (PWM) to provide plural inputs to a multi-phase H-bridge amplifier. Also provided to the bridge amplifier is a high voltage DC input which is converted by the pulsed inputs to the bridge amplifier to a variable AC voltage for driving a motor. The AC drive voltage is also provided to a variable frequency voltage-controlled oscillators (VCOs) in a feedback arrangement, with the variable frequency VCO outputs heterodyned with each of plural outputs of a multi-phase ring oscillator to provide plural baseband signals having a constant phase relationship at a high frequency. The baseband signals form the aforementioned reference signals provided to the PWM in the feedback arrangement with closed loop control and frequency and phase discrimination using phase lock loop techniques for synchronous motor control over a range of DC-100 kHz with 0-25 MHz VCOs.

The present invention relates to a control device based on the bluetooth technology and used for a mobile robot. In the present invention, a DSP+CPLD control mode is adopted, a DSP serves as the master control chip of a robot motion platform, at the same time, a CPLD is used for the phase discrimination of the pulse signal fed back by a motor, for the signal conformity, and for the expanding of the four paths of signals generated by the DSP, so as to reduce the burden of a nuclear controller and make up the deletion thereof, thereby, the nuclear controller is mainly used for the realization of the highlevel control algorithm. The wireless communication is realized based on the bluetooth technology. The present invention mainly comprises a powder pack, a communication unit, a motor driving unit, a nuclear control unit, a CPLD unit and an attitude detecting unit. A mobile robot subsystem prepared by means of the present invention, the sampling period can be very small even in a complicated control process, the control effect is similar to a continuous control process; besides, in the run procedure, the response speed is rapid, the overshoot is small, and the stability is high; furthermore, the control effect can be further improved by combining with the signal of a multiple sensor, the program memory has no need of expanding, the periphery circuit of the nuclear unit is simple, the function of the controller is convenient to be expanded.

This invention relates to application technical field of satellite remote-sensing data, specifically a satellite remote-sensing monitoring method of daytime marine fog. This invention gradually eliminates cloudless marine region, ice-phase cloud system, large-particle cloud system, top coarse cloud system and lower cloud system through steps as cloud-ground separation, phase discrimination, particle size judgment, image characteristic analysis, height analysis and error correction based on physical characteristics and image characteristics of marine fog and according to type of fog as ground object and satellite image characteristics, thereby realizing satellite remote-sensing monitoring of daytime marine fog. As for channel settings of AVHRR3 / NOAA17 satellite, according to monitoring result acquired by performing long-term monitoring to the Yellow sea and the Bohai sea in China, it proves that this invention is able to effectively and automatically monitor marine fog events, and clearly provide influence covering range of marine fog, thereby providing meterorological information service to naval navigation, fisheries production and coastal domestic use. In addition, this invention is applicable to other satellite sensors with similar channel settings.

The invention discloses a locking indication and fault diagnosis method for passive rubidium atom frequency scale, which adding a phase-adjustable square wave sampling time sequence signal on the basis of synchronization phase discrimination modulation signal and reference signal, wherein frequency of the sequence signal is fourfold of a modulation signal, and duty ratio of the sequence is 1:1. The sampling time sequence carries locking signal collection for an alternating current generated after quantum frequency discrimination, light detection amplification and square wave reshaping to estimate atom frequency scale locking condition at this point. The method uses continuous four rising edges of sampling time frequency of fourfold modulation signal as trigger pulse to carry level sampling for signal after quantum frequency discrimination, levels of the four rising edges are recorded as D1, D2, D3 and D4, atom frequency scale is estimated if it is in locking state according to recorded four sampling levels, when D1=D2 and D3=D4, the atom frequency scale is in locking state. The method can detect operation state and fault point of the passive rubidium atom frequency scale system, and can easily and conveniently exchange fault module.

The invention relates to an FPGA (field programmable gate array)-based resolver angle measurement system. According to a phase discrimination type angle measurement device, the highly integrated, configurable, low-cost, high-precision and FPGA platform-based dual-channel resolver angle measurement system with certain universality, which can be used for angle measurement in the controller of a modularized joint robot, is constructed to provide excitation signals needed by a resolver and output an angle value after an output signal is resolved, and comprises an on-chip IP and an external circuit, the on-chip IP generates digital excitation signals for the resolver and can calculate the digital signal value inputted by the resolver and converted by the external circuit, and the external circuit carries out the digital-to-analog conversion and power amplification of excitation signals, and is connected with the dual-channel resolver to carry out the analog-to-digital conversion of output values.

This invention relates to a digital balance and carrier recover joint algorithm and its circuit structure used in high order quadrature amplitude modulation (QAM). Demodulation becomes difficult since the high-order QAM signal is influenced by the carrier frequency deviation and channel distortion, this invention applies four steps of blind balance, frequency discrimination, phase discrimination and the least square error adaptive balance to obtain the stable balance and carrier recover performance, which can capture the carrier frequency deviation of 9% baud rate. This invention also provides a structure for realizing the circuit.

The invention discloses a vector tracking-based GNSS / SINS deep integrated navigation method. The method includes the following steps that: after in-phase orthogonal signals outputted by a correlator are calculated by a phase discrimination function, an obtained phase discrimination result is adopted as measurement information of a pre-filter, so that a pre-filter model can be constructed to estimate tracking error information, and therefore, the pseudo-range and pseudo-range rate of a GNSS tracking channel can be obtained; an integrated navigation main filter performs processing according to the pseudo-ranges and pseudo-range rates outputted by the GNSS tracking channel and an SINS, so that pseudo-range deviation and range rate deviation can be obtained and are adopted as measurement variables quantity, and the measurement quantity is used for updating navigation error state variables, and updated navigation error parameters are fed back to the SINS, so that the navigation parameters of the SINS can be calibrated; and an integrated navigation system infers the signal tracking parameters of a GNSS according to the calibrated SINS navigation parameters and ephemeris information so as to control the local pseudo codes of a receiver and a carrier digital-controlled oscillator, and therefore, tracking for input signals can be maintained. The method of the invention has excellent anti-jamming performance and dynamic tracking ability, and has a bright application prospect.

Disclosed is a GPS (global positioning system) software receiver tracking method based on an FPGA (field programmable gate array). Inputted digital intermediate-frequency signals are transmitted into a code correlator after multiplying two channels I and Q of a carrier generator to obtain six channels of relevant results; in a carrier tracking loop, IP and QP in six channels of relevant outputs are transmitted into a phase decision device, frequency discrimination computation is carried out by a carrier frequency discriminator when phase deviation meets the condition that delta theta is larger than theta H, phase discrimination computation is carried out by a carrier phase discriminator if the phase deviation meets the condition that delta theta is smaller than theta H, a result is transmitted into the carrier generator after being filtered by a carrier loop filter so that carrier frequency is adjusted; and in a code tracking loop, IE, IL, QE and QL are taken to be transmitted into a code loop discriminator to be in phase discrimination computation, and results are transmitted into a CA (coarse acquisition) code generator after being filtered by a code loop filter so that phase ofCA codes is adjusted. The two loops are cross-coupled, the carrier frequency and the phase of the codes are synchronously tracked, accordingly, locally reproduced carriers and codes are aligned with signals, and navigation data bits are obtained after integral judgment for the IP is carried out by a posterior integral accumulation decision device.

The invention discloses a frequency tracking system for output signals of an ultrasonic power supply based on a fuzzy PI control technology, which is composed of a hardware circuit and software programs, wherein the hardware circuit includes a voltage and current sampling circuit, a band-pass filtering circuit, a phase discrimination circuit, an STM32 chip, an IGBT driving circuit and a display screen connected with the STM32 chip, the phase discrimination circuit collects the phase difference between voltage and current and realizes a digital phase-locked loop, the fuzzy PI control technologyis implemented in the form of the software programs, the software programs are executed by the STM32 chip, the main control program includes a system initialization program, a display screen program,a phase difference information capturing program and a PWM frequency control output program, and the PWM frequency control output program includes a PWM output program and a fuzzy PI algorithm program. The frequency tracking system disclosed by the invention can enable the frequency of the output signals of the ultrasonic power supply to change along with the resonant frequency of a transducer, thereby achieving automatic, accurate and fast tracking for the resonant frequency of the transducer.

The invention discloses a fully differential reset delay adjustable frequency and phase discriminator, which comprises four RS triggers, nand gates G0, a delay control circuit DL and two output buffer circuits, wherein all the four RS triggers have the structures that two nand gates are crossed and coupled; all nand gates are fully differential static CMOS (Complementary Metal Oxide Semiconductor) logics with positive feedback; the DL delay circuit is formed by cascading three delay fixed units and three delay controllable units; and each buffer circuit is formed by cascading fully differential phase inverters with transistors of multiplied sizes and positive feedback. Reset signals generated by the nand gates G0 are delayed by the DL circuit to perform reset control on the four RS triggers; and four paths of pulse control signals are output by the second RS trigger and the fourth RS trigger through the buffer circuits which are connected with the second RS trigger and the fourth RS trigger respectively. The discriminator has the advantages of small phase discrimination error, controllable reset delay, high driving capacity and high matching degree output of the four paths of pulse control signals and can be used for a high-performance phase locked frequency synthesizer.

A phase detector is comprised of two cross-coupled gates which are capable of phase discrimination down to a level of approximately 10 picoseconds. An arbiter circuit, responsive to the cross-coupled gates, generates mutually exclusive UP and DOWN pulse signals. The UP and DOWN pulse signals may be filtered and used to control the delay line of an all digital delay locked or phase locked loop.

The invention discloses a clock synchronization device and method. The device comprises a phase discriminator, a loop filter, a voltage-controlled oscillator, a frequency synthesizer and a clock driver in the sequential connection, wherein clock signals output by the clock driver are fed back to an input end of the phase discriminator after being subjected to frequency division by a frequency divider; phase discrimination is carried out on the clock signals which is subjected to the frequency division and reference clock signals by the phase discriminator, and the obtained phase discrimination value is input to the loop filter; after the input phase discrimination value is subjected to low pass filtering by the loop filter, voltage signals are obtained and then input to the voltage-controlled oscillator, and the voltage-controlled oscillator controls the clock signals generated by oscillation according to the input voltage signals; and after the frequency synthesizer performs the frequency synthesis on the clock signals generated by the oscillation, the obtained clock signals with set frequencies are input into the clock driver, and the clock driver drives the clock signals to generate the required clock signals. According to the invention, the phase position of a clock can be controlled and output accurately, and the system clock performance is improved.

The invention provides a linear displacement sensor, and belongs to the field of accurate displacement measurement. The sensor consists of two substrates, namely a long ruler and a short ruler, wherein an excitation coil and an induction coil are simultaneously wound on one ruler substrate; a row of magnetizers are arranged on the other ruler substrate at equal intervals and are unwound; the excitation coil is connected with an excitation power supply; an induction signal is generated on the induction coil; when the short ruler and the long ruler do relative motion, the amplitude of the induction signal is changed due to the change of magnetic flux; and electric signals output by the excitation coil and the induction coil are connected to a conditioning circuit to be processed, the processed signals are sent to a signal processing circuit to be subjected to amplitude and phase discrimination, an amplitude difference or a phase difference of the signals is expressed by the number of interpolated clock pulses and is converted into a linear displacement value, and the linear displacement value is directly used as linear displacement data to be displayed or output or is subjected to error correction and the like by a microprocessor and a memory and used as the linear displacement data to be displayed or output.

The invention discloses a high-precision local wireless positioning system which comprises anchor nodes, a positioned destination node and a central processing module, wherein the anchor nodes comprise a vertex anchor node and a central anchor node, the vertex anchor node is allocated on the vertex of a polygon on the edge of a positioned region, the central anchor node is abutted against the central processing module arranged at the center of the polygon, and each anchor node is respectively connected with the central processing module; the positioned destination node is in a sleep state in normal times, and when the node needs to be positioned, the positioned destination node is aroused, emits a wireless signal which is modulated through an ASK (Amplitude Shift Keying) modulator, and then continues to sleep until being aroused the next time; and a plurality of groups of arrival time differences are obtained through the demodulation and phase discrimination processing of the anchor modes on the wireless signal and the relevant operation based on a received signal phase difference, and then the position of the positioned node is determined according to the position relation between the anchor nodes. The invention can realize the high-precision positioning within a local range (100-meter radius), and the power consumption of the positioned destination node is low.

The invention discloses a distance measurement method and a distance measurement device based on orthogonal locking of microwave photon signals. The conventional phase-type laser distance measurement and phase discrimination circuit is complex and high in cost. The distance measurement method disclosed by the invention comprises the following steps of: dividing a radio-frequency signal generated by a swept-frequency signal generator into two paths via a power divider, conveying one path to a Mach-Zehnder intensity modulator, and conveying the other path to a local oscillator port of a frequency mixer; conveying the output of a laser to a first port of a three-port circulator after passing through the Mach-Zehnder intensity modulator, and then conveying to an optical fibre collimator via a second port to be emitted; returning an optical signal reflected by a target to the three-port circulator after passing through the optical fibre collimator, outputting the optical signal to an optical amplifier via a third port, amplifying the optical signal and then conveying the optical signal in a photoelectric detector, conveying the detected radio-frequency signal to a radio-frequency port of the frequency mixer, connecting a mid-frequency port of the frequency mixer with a low-pass filter, and conveying the signal to a computer after filtering; and measuring a frequency differences among orthogonal locking points by a plurality of times to obtain a measured distance. The distance measurement method and the distance measurement device disclosed by the invention inherit the advantages of phase-type laser distance measurement, and can realize high-accuracy middle-short distance measurement with millimetre-level accuracy.

The invention discloses an improved rubidium atom frequency scale, which comprises a voltage controlled crystal oscillating module, an isolation amplifying module, a microprocessor, a digital frequency synthesis module, a radio frequency multiplication module, a physical system module, a first synchronous phase discrimination module and a temperature compensating module. The isolation amplifying module is used for isolating and amplifying output frequencies of the voltage controlled crystal oscillating module; the microprocessor is used for generating a frequency synthetic instruction, a key-controlled frequency modulation signal and a synchronous phase discrimination reference signal; the digital frequency synthesis module is used for generating a comprehensive modulation signal according to the frequency synthetic instruction and the key-controlled frequency modulation signal generated by the microprocessor; the radio frequency multiplication module is used for generating a microwave polling signal; the physical system module is used for carrying out frequency discrimination on the microwave polling signal and generating a quantum frequency discrimination signal; the first synchronous phase discrimination module is used for carrying out phase discrimination on the quantum frequency discrimination signal and generating a first voltage control signal and the temperature compensating module is used for measuring surrounding temperature of the voltage controlled crystal oscillating module and generating a second voltage control signal according to the temperature. The invention can compensate the influence on the output frequencies of the voltage controlled crystal oscillating module due to the temperature so as to improve the stability of the output frequency of the rubidium atom frequency scale.

The invention provides a wideband and low-phase noise local frequency synthesizing circuit. The wideband and low-phase noise local frequency synthesizing circuit includes a direct digital frequency synthesizer, frequency multipliers, low-pass filters, high-pass filters, a band-pass filter, a quadrature mixer, a mixer, amplifiers, an integer frequency divider, a phase discriminator, a loop filter, a voltage-controlled oscillator and a coupler. According to the wideband and low-phase noise local frequency synthesizing circuit of the invention, high phase discrimination frequency is adopted perform phase discrimination, and therefore, phase noise deterioration of a loop can be decreased; the loop adopts the integer frequency divider, and therefore, the effects of the mantissa of fractional frequency division on phase noises can be eliminated; baseband signals generated by the direct digital frequency synthesizer are subjected to quadrature up-conversion, so that high-resolution, low-phase noise and high-frequency signals can be generated, and the high-frequency signals and the output of the voltage-controlled oscillator are subjected to mixing down-conversion, and signals obtained after the down-conversion can become signals with large step. Since the output of the voltage-controlled oscillator and the high-resolution and low-phase noise signals are subjected to the down-conversion, the input frequency of the integer frequency divider can be reduced, and the frequency division ratio of integer frequency division can be decreased.

A general incoherent direct sequence spread spectrum signal tracking method comprises the steps of (1) determining coherent integral time and generating a coherent integral pulse according to the feature of an incoherent direct sequence spread spectrum signal to be tracked; (2) calculating parameters to be configured which are the centre carrier frequency, the data rate, the spreading code rate and the loop filter coefficient; (3) carrying out digital downconversion, wherein an input analog intermediate frequency signal is converted into a digital intermediate frequency signal after being sampled and is multiplied by a locally reproductive digital intermediate carrier to achieve digital downconversion; (4) carrying out correlation operation on a digital downconversion result and a spreading code; (5) carrying out coherent integration result frequency discrimination and phase discrimination and filtration, wherein coherent integration results IP and QP are used for carrier ring frequency discrimination and phase discrimination, frequency discrimination and phase discrimination results are output to a carrier ring loop filter with a third order assisted by a second order, and a filtration result is fed back to a control data NCO. General tracking of the incoherent direct sequence spread spectrum signal with the spreading code rate and the data rate changeable is achieved through the five steps.

The invention discloses a phase-locked loop with low phase noise. The phase-locked loop comprises a frequency digital converter, an oscillator frequency calibrator, a loop bandwidth calibrator, a digital oscillator, a phase discriminator, a time to digital converter, a filter and a clock distributing module, wherein an input end of the frequency digital converter receives an input signal, and an output end of the frequency digital converter is connected with input ends of the oscillator frequency calibrator and the loop bandwidth calibrator; an output end of the oscillator frequency calibrator is connected with an input end of the digital oscillator, and an output end of the loop bandwidth calibrator is connected with a control end of the filter. The phase-locked loop with low phase noise of the embodiment of the invention uses the time to digital converter with high resolution to realize conversion of phase difference, replaces a traditional digital phase discriminator, and is free from the limitation of system clock frequency to phase discriminating speed to further reduce size of a high-frequency phase discrimination dead zone, thereby greatly reducing the phase noise of the phase-locked loop.

The invention provides a pulse modulation signal phase noise measuring device. The pulse modulation signal phase noise measuring device comprises a down conversion and orthogonal phase discrimination arithmetic unit, wherein the down conversion and orthogonal phase discrimination arithmetic unit comprises a down conversion unit, an orthogonal phase discrimination unit and a sampling arithmetic unit, which are sequentially arranged from an input end to an output end, the down conversion unit comprises a local oscillator, a frequency mixer, a tunable band pass filter and a primary low noise amplification unit, the orthogonal phase discrimination unit comprises a phase discriminator, a low pass filter, a secondary low noise amplification unit, a loop filter and a reference source, the sampling arithmetic unit comprises an A / D (analog to digital) sampling unit and an analysis and arithmetic unit, and a phase noise measuring result is obtained after an output signal of the orthogonal phase discrimination unit passes through the A / D sampling unit and the analysis and arithmetic unit. The pulse modulation signal phase noise measuring device decreases numbers of needed test instruments and electric cables, simplifies measurement steps, and reduces test difficulty.

Based on one input signal as reference, the digital phase locked loop generates one or more relatively stable clock signals after attenuating dithering in input signal. The phase locked loop includes following parts. Phase discrimination filter circuit compares difference between output clock and reference signal, and filters out high frequency component. Digital controlled oscillator (DCO) provides crystal oscillator for master clock. A time-delayed chain with taps is composed of cascaded same delay units in multiple stages. Compensation circuit eliminates influence caused by temperature and workshop deflection as well as selects suitable circuit from time-delayed chain to be output. One time-delayed chain can be provided for multiple circuits to use, and generates multiple frequency points at the same time. since new time sequence is utilized in the invention, only one time-delayed chain generates all frequency points so as to raise precision of clock as well as save area of chip.

The invention discloses a multi-symbol detecting and symbol synchronizing method based on CPM (critical path method) modulation. The arithmetic comprises the following steps: determining the starting time of receiving the baseband signal symbol so as to carry out multi-symbol detection treatment; generating local likelihood detecting codes; adopting a single-symbol cycle lead-lag likelihood detection arithmetic to extract phase discrimination information; carrying out clock regeneration by a loop filter circuit; controlling the lead-lag likelihood detection circuit by the regeneration clock, thus achieving the aim of completing high-quality symbol synchronization. The method has the following effective technical effects: the method is based on the maximum likelihood detection so as to ensure the synchronous performance under the low signal-to-noise ratio condition; the time window of the likelihood detection of symbol synchronization is a symbol cycle, and the likelihood detection matching baseband has simple waveform, so that the engineering is convenient to realize.

The invention discloses an any-rate CPFSK (Continuous Phase Frequency Shift Key) signal timing synchronization method which is implemented according to the following technical scheme: an MSD unit demodulates baseband signals which are subjected to resampling processing, and a feedback signal unit carries out processing on a demodulation result so as to acquire feedback signals; a correlation operation unit carries out a correlation operation on the feedback signals and a leading branch, a real-time branch and a lagging branch of CPFSK signals, and a correlation result is subjected to coherent integration and then sent to a code ring discriminator so as to acquire phase discrimination information; a loop filter filters the phase discrimination information, and a filtering result is sent to an NCO; and a resampling unit adjusts an integration interval under control of output enable signals of the NCO, and the phase of the CPFSK signals is changed, thereby achieving a purpose of timing synchronization. According to the invention, advantages of MSD demodulation are utilized, a likelihood function envelope is detected to acquire a timing error, tracking is carried out on code Doppler by using a delay locked loop, and accurate CPFSK signal timing synchronization can be realized under a low signal to noise ratio.