The invention relates to the technical field of
electromagnetic compatibility (EMC) design of electronic circuits, in particular to a method suitable for a flow cytometer and capable of reducing interference of
clock signals on EMC. The method comprises the steps that S100,
clock circuit components are concentrated in a 5mm * 5mm area of the top layer of a PCB, routing is limited to a second layer through buried holes, and
fundamental frequency is dynamically set; s200, laying
copper in a key area for grounding, and adding a
ground bounce suppression array to three
layers; s300, arranging an upper ground
copper layer and a lower ground
copper layer by using a flexible circuit board; s400, covering the top circuit with a ferrite
alloy cover, and
welding and grounding; and S500, the flow velocity and the
cell density are collected in real time, the
clock frequency is dynamically adjusted, a
frequency stabilization mechanism exists in an extreme scene,
radiation is effectively reduced, and the detection precision and stability are improved. According to the method, the EMC interference of the
clock signal of the flow cytometer is reduced from multiple dimensions of source inhibition, shielding protection, connection optimization and cooperative control.