116 results about "Circuit under test" patented technology

The utility model provides a slide rail type circuit board test fixture, and belongs to the technical field of test fixtures. Comprising a bottom plate, a circuit board butting connector is fixed to the left side of the upper surface of the bottom plate, a circuit board fixing tool is arranged in the middle of the upper surface of the bottom plate, the lower portion of the circuit board fixing tool is slidably connected with the upper surface of the bottom plate in the left-right direction, and the upper portion of the circuit board fixing tool is used for fixing a circuit board; the tool sliding driving part is connected with the circuit board fixing tool. The tool sliding driving part drives the circuit board fixing tool to slide left and right to achieve butt joint and separation of the circuit board and the circuit board butt joint connector. According to the utility model, the performance and the function of the circuit board can be rapidly and simply tested, the clamping safety and the clamping efficiency of the tested circuit board are improved, the clamping is stable and convenient, and the stability and the reliability of the tested circuit board in the testing process are ensured.

The invention relates to the technical field of computers, and provides an integrated circuit testing method, electronic equipment and a storage medium, and the method comprises the steps: building an address conversion model function based on the system architecture information of a to-be-tested integrated circuit; generating a standard address of each intermediate module and a standard address of each Slave module in the integrated circuit to be tested based on the input address of each Master module in the integrated circuit to be tested and the address conversion model function; and based on the actual output address and the standard address of each Slave module and the actual output address and the standard address of each intermediate module, obtaining a routing test result of the integrated circuit to be tested. According to the method, the correctness of all possible routing paths in the integrated circuit to be tested can be accurately verified, whether routing errors exist in the middle module in the integrated circuit to be tested or not can be found more accurately and more efficiently, and the routing test efficiency, the test coverage rate and the integrity of the integrated circuit test can be remarkably improved.

The invention discloses a circuit board general online test method and system. The system comprises a master control system, a tool box, an online conveying device, an automatic docking device and a circuit board general test device. A general control system, an automatic docking device and a circuit board universal testing device are arranged on the side of the near end of the online conveying device, the automatic docking device is located on the other side, and the general control system is in communication connection with the online conveying device, the automatic docking device and the circuit board universal testing device; the tool box loaded with the circuit board to be tested is conveyed to the automatic butt joint device through the online conveying device, and the automatic butt joint device automatically achieves electrical butt joint between the tool box and the circuit board universal testing device. Test and data processing software is arranged in the circuit board general test device, and the test software is used for testing voltage, current, resistance, frequency and / or waveform of different circuit boards and carrying out data acquisition, statistical analysis, test report generation and the like. According to the invention, automatic on-line testing of different circuit boards is realized.

The invention provides a relay protection device constant value state validity automatic checking system and method, and relates to the technical field of relay protection. Fixed value information of a protection device and input / exit state information of a tripping outlet pressing plate are collected through a data collection module, data processing is carried out, then in a two-way checking engine, a forward character comparison unit carries out character comparison item by item, a reverse logic derivation unit carries out logic relation verification on state data associated with each fixed value, and finally, the protection device and the tripping outlet pressing plate are checked. The comprehensive judgment module verifies whether all the association conditions meet the AND gate relation or not according to the result of the bidirectional check engine, and a final check result is obtained; according to the method, the qualification of the current logic protection circuit to be detected is accurately judged, the detection accuracy is improved, verification interference caused by misoperation of other circuits is avoided, the accuracy of a verification result is improved, the misjudgment risk is reduced, and the reliability of relay protection is improved.

A circuit test device includes a housing. The circuit test device includes a circuit disposed in the housing and including an electromagnetic field (EMF) sensor and a signal detector coupled to the EMF sensor. The circuit test devices includes a conductor disposed on the housing and an interface extending through the housing and coupling the conductor to a circuit under test (CUT). The EMF sensor is configured to generate a signal in the presence of a time varying flow of current from the CUT in the conductor, and provide the signal to the signal detector.

The invention belongs to the technical field of current detection, and discloses a circuit system for detecting current, which comprises an MCU (Microprogrammed Control Unit), a switch M1, a switch M2, an ADC1, a capacitor C and a WiFi (Wireless Fidelity) module for communicating with a mobile phone, the ADC1 is used for collecting and measuring the voltage V1 at the two ends of the capacitor C in real time; and the MCU is used for controlling the on-off of the switch M1 and the switch M2, and obtaining a V1 voltage value through the ADC1. According to the invention, the capacitor is used as a core element for current testing; the system has a convenient mobile phone control function, and a user can access the system to a circuit to be tested according to actual requirements when the current needs to be tested, so that the current is accurately tested by utilizing the capacitance characteristics. In the testing process, the system can acquire current data in real time; after the determination is finished, the system can automatically turn off related switches and quickly disconnect the connection with a main current circuit; the design ingeniously prevents the system from interfering with the normal operation of the main circuit in a non-test stage.

This invention relates to the field of electronic measurement technology and discloses an online measurement method and system for the quality factor of resonant circuits. The method involves injecting a small-amplitude sinusoidal disturbance signal into the excitation end of the resonant circuit under test using weak electromagnetic coupling, extracting the amplitude and phase of the disturbance response using lock-in amplification technology, performing Lorentz fitting on the frequency response curve to calculate the negative 3 dB bandwidth, outputting the quality factor in real time from the ratio of the resonant frequency to the bandwidth, introducing cross-correlation narrowband filtering to compress the equivalent noise bandwidth to below 1 Hz, and having an automatic resonant frequency tracking function.

A fault injection evaluation method and system, and a computer program product and a medium. The fault injection evaluation method comprises: configuring a target number of cycles for a circuit under test (101), wherein the target number of cycles is the number of cycles during which said circuit operates after being reset; injecting a fault into said circuit (102); outputting a reset signal to said circuit, and acquiring a fault output result that is output by said circuit after the fault is injected (103); and on the basis of the fault output result and a reference output result, performing a comparison to acquire a fault evaluation result (104). By means of the method, it is not necessary to additionally provide a reference circuit, so that the structural complexity of the fault injection evaluation system can be reduced, and the consumption of resources required during evaluation can be reduced.

The embodiment of the invention discloses a current detection circuit and current detection equipment, the current detection circuit comprises a power supply input interface, a power supply output interface and a detection circuit, and the power supply output interface is connected with a circuit to be detected; the detection circuit comprises a shunt unit, a first connecting end, a second connecting end and a third connecting end, the shunt unit is connected between the first pole of the power input interface and the second connecting end, a first ampere meter is connected between the first connecting end and the second connecting end, and a second ampere meter is connected between the second connecting end and the third connecting end; when the current of the to-be-tested circuit is greater than a preset threshold value, the shunting unit is conducted, and the current drives the second ammeter to generate pointer deflection through the shunting unit; when the current of the to-be-tested circuit is smaller than a preset threshold value, the shunting unit is switched off, and the current drives the first ammeter to generate pointer deflection; wherein the first ampere meter and the second ampere meter are different in measuring range. The test efficiency and reliability can be improved.

A test pattern generation method includes: obtaining design data about a circuit under test (CUT); generating, based on the design data, a first test pattern for detecting transition delay (TD) faults and a pre-detection fault list (PDFL) including fixed type (SA) faults respectively corresponding to detectable TD faults included in the detectable TD fault list and detectable by simulation; and generating a second test pattern for detecting the SA fault based on the design data and the PDFL.

The invention relates to the field of current sensors, and discloses a shunt-based two-way conditioning current sensor, the sensor comprises a shunt detection module and a Hall detection module, the shunt detection module is used for connecting a shunt in series in a loop to be detected, when current flows through the shunt, tiny voltage difference is generated, and the Hall detection module is used for detecting the current flowing through the shunt. Isolating, amplifying, raising and calibrating the voltage difference, and substituting the voltage difference into a UI fitting formula to obtain a current value to be measured; the Hall detection module and the diverter detection module carry out detection synchronously, and a measured voltage signal is output after being amplified, raised and calibrated. By adopting a mode of double-path independent measurement and synchronous comparison of the shunt sensor and the Hall sensor, measurement errors can be detected in real time, and an on-line self-diagnosis function is realized. According to the shunt-based dual-path conditioning current sensor provided by the invention, the Hall element and shunt dual-path conditioning are combined, so that common cause failure is avoided, and the measurement accuracy and reliability are improved; two-way synchronous detection is adopted, faults can be judged when deviation is large, modules can be replaced conveniently, and the self-diagnosis capacity and safety are enhanced.

The present invention provides a system and method for prototype verification of a circuit under test. The system includes a packet generator, a perturbation circuit, the circuit under test, and a detection circuit, wherein the perturbation circuit, the circuit under test, and the detection circuit are implemented on a field programmable gate array. The packet generator outputs a plurality of standard packets, wherein each standard packet has a length that falls within a standard range. The perturbation circuit generates a plurality of perturbation packets to the circuit under test based on the plurality of standard packets, such that the circuit under test generates a plurality of output packets based on the plurality of perturbation packets, wherein any perturbation packet has a length that falls outside the standard range. The detection circuit verifies the operation of the circuit under test based on the plurality of perturbation packets and the plurality of output packets.

To provide a semiconductor integrated circuit capable of continuing an operation in an analog circuit even while a scan test is executed in a digital circuit.SOLUTION: The semiconductor integrated circuit 1 includes a circuit under test 100 that generates an output signal for controlling the operation of an analog circuit in response to an input signal, a test control unit 146 that controls a scan test in the circuit under test 100, and a holding unit 170 that holds the output signal. The test control section 146 performs a scan test on the circuit under test 100 when the analog circuit is in an active state. While the scan test is executed, the holding unit 170 holds the output signal after the signal for requesting the execution of the scan test is transmitted to the semiconductor integrated circuit 1 and before the scan test is started, and outputs the held output signal so that the analog circuit can maintain the active state.SELECTED DRAWING: Figure 2

An electronic device (40) comprises: a control unit (41); output pins (45) that can be connected to an external apparatus (30); a signal generator (47) that is provided in an output circuit (46) connecting the control unit (41) and the output pins (45); input pins (49) that can be connected to the external apparatus (30); an analog to digital converter (50) that is provided in an input circuit (51) connecting the input pins (49) and the control unit (41); and a communication unit (53) that receives, from the external apparatus (30), a command for generating an output signal from the signal generator (47), and transmits the state of a circuit (20) being measured to the external apparatus (30). The circuit (20) being measured is connected between the output pins (45) and the external apparatus (30) or between the input pins (49) and the external apparatus (30).

The invention provides a chip testing circuit, a chip testing method and a chip, and is applied to the technical field of chip testing, the chip testing circuit comprises a plurality of grouping testing circuits, each grouping testing circuit comprises a plurality of tested circuit modules, and each tested circuit module comprises a plurality of IP cores; each grouping test circuit is connected with a special test channel pin; the tested circuit modules in the same grouping test circuit are connected in series with the special test channel pins, and the plurality of grouping test circuits are tested in a parallel test mode.

The invention discloses an electric control board fault prediction and self-healing method and device, and belongs to the field of electronic equipment health management, and the method comprises the steps: generating a probing excitation signal; injecting the probing excitation signal into a detected circuit of the electric control board, and synchronously capturing global field response data of the detected circuit under the combined action of the probing excitation signal and the working signal; according to the global field response data and the probing excitation signal, a real-time physical parameter map of the tested circuit is reconstructed by solving a physical inverse problem; according to the deviation between the parameter value of each node in the real-time physical parameter map and the corresponding nominal value, generating a corresponding parameter tuning instruction; and executing the parameter adjustment instruction to dynamically adjust the adjustable element parameter of the corresponding node in the tested circuit, so that the electrical performance of the node approaches to a nominal value, early-stage accurate prediction and non-inductive self-healing of the fault of the electric control board can be realized, and the stability and reliability of the control system are remarkably improved.

This application provides a method for detecting the quality of a hot plate in a plasma deposition apparatus. The hot plate is disposed within a housing, which is grounded. The hot plate contains metal wiring, which is part of the radio frequency (RF) circuitry of the plasma deposition apparatus. The method includes: constructing a first measurement circuit, which includes a measurement circuit and a first circuit under test, wherein the first circuit under test includes the metal wiring and the housing, the metal wiring and the housing forming a first parallel-plate capacitor; the measurement circuit outputs voltage signals at different frequencies and feeds back impedance spectra at the different frequencies; measuring the first impedance spectrum of the first parallel-plate capacitor using the measurement circuit; and determining whether the metal wiring of the hot plate is normal based on the first impedance spectrum.

This invention relates to the field of industrial equipment fault detection technology, and discloses a vertical spiral stirring mill live fault detection device, comprising: a housing; a detection head, detachably mounted on one end of the housing, for contacting and fixing to the circuit under test; a circuit board, disposed inside the housing, integrating a main control chip, a detection circuit module, a wireless communication module, and a data processing module; a power supply, disposed inside the housing and electrically connected to the circuit board; and an insulating rod, detachably mounted on the other end of the housing. This invention allows the detection head to be fixed to the circuit under test, enabling real-time detection of the circuit through the detection circuit module, reducing the loss of manpower, material resources, and financial resources; and it can be carried by the insulating rod, improving portability and flexibility.

The utility model relates to the field of circuit board function testing, in particular to a circuit board testing device, which comprises a power supply unit, a testing unit and a user interaction unit. And the tested circuit board is fixedly arranged on the test unit. The test unit is electrically connected to both the test unit and the user interaction unit. The power supply unit is electrically connected to the tested circuit board through a first channel and is connected to the test unit and the user interaction unit through a second channel. And the first channel and the second channel are electrically isolated. The circuit board testing device provided by the utility model is convenient and simple in testing operation, improves the working efficiency of testing the circuit board, and increases the reliability of a testing result. Meanwhile, the display interface content of the user interaction unit of the circuit board testing device is clear, the operation process is simple and convenient, and the testing function with high calibration rate and high precision can be realized. Finally, the circuit board testing device can feed back the testing state in real time, and the real-time working state of the tested circuit board can be judged conveniently.

A fault injection evaluation method and system, and a computer program product and a computer-readable storage medium. The fault injection evaluation method comprises: configuring a target number of cycles (301), wherein the target number of cycles is the number of cycles during which a circuit under test operates after being reset; at a configured fault injection moment, injecting a fault into said circuit (302); acquiring a fault output result that is output by said circuit after the fault is injected (303); and comparing the fault output result with a reference output result, so as to acquire a fault evaluation result (304).

The present invention belongs to the field of circuit verification technology, and specifically relates to a dual-MCU-based internal module circuit verification method and system. The method includes a first MCU module sending a first EN signal to drive a circuit module under test to generate an internal signal. A process sampling module collects and samples the internal signal of the circuit module under test to obtain a first sampling signal. The first MCU module and the second MCU module compare and determine whether the first sampling signal is consistent with an expected signal. If they are consistent, it is determined that the circuit module under test is working normally. Otherwise, the first MCU module shuts down and sends a first EN signal. The second MCU module sends a second EN signal and a second signal signal to construct a second sampling signal. Based on the second sampling signal, the circuit module under test is sampled for a second time to obtain a new first sampling signal. Faults are determined based on the new first sampling signal. The present invention can achieve rapid judgment of circuit faults by performing self-calibration verification on the circuit.

This application discloses functional safety test circuits and methods, neural network processors, and storage media, relating to the field of functional safety technology. [Solution] The functional safety test circuit includes a configurator for generating and outputting configuration information for testing an integrated circuit under test; a plurality of test data generators for generating and outputting first test data corresponding to each of the plurality of test data generators based on the configuration information; an integrated circuit under test for processing the plurality of first test data and acquiring and outputting a plurality of second test data; and a first comparator for comparing the consistency of the plurality of second test data and acquiring a first test result of the integrated circuit under test.

The invention provides a static var generator control circuit board testing device, and belongs to the field of current testing. The static var generator control circuit board testing device comprises a shell and a testing probe or a connector arranged at the top of the shell, and is characterized in that a power supply wiring groove and a signal wiring groove are formed in the shell, the power supply wiring groove is provided with a power supply circuit used for providing electric energy for the testing device or a tested circuit board, and the signal wiring groove is provided with a signal wiring groove. The signal wiring groove is provided with a signal line used for transmitting signals, and the extension direction of the power supply wiring groove is perpendicular to the extension direction of the signal wiring groove. The power supply circuit and the signal circuit are separated and vertically arranged, so that electromagnetic interference of the power supply circuit to the signal circuit is effectively reduced, and the accuracy of a test result is improved.

The utility model discloses a low power circuit integration junction box, including casing, modular interface array, embedded control module and safety protection module, wherein, the modular interface array contains at least three kinds of specifications test terminal, and each test terminal is connected with the measured circuit board through the elastic contact, embedded control module contains microprocessor, programmable signal generator and AD conversion unit. In addition, the low power circuit integration junction box still includes power module and wireless communication module. The utility model provides junction box through using S3C2451 embedded control processor to realize the automatic measurement and judgement of low power point fast, and can save the various measurement parameters of detected through programmable signal generator and AD conversion unit, then through wireless communication module carries out data transmission, and the convenient implementation detection result inquiry and transmission have improved the detection efficiency, and the detection result also has higher measurement accuracy and good repeatability.

This disclosure provides a multi-channel testing device and method for a digital instrumentation and control system of a nuclear power plant. The multi-channel testing device includes: a load simulation module comprising a fixed resistor and an adjustable resistor; the adjustable resistor receives a first control signal from a host computer and adjusts its resistance value according to the first control signal; the fixed resistor and the adjusted adjustable resistor together constitute the target load of the device under test; an analog signal acquisition module acquires the voltage across the fixed resistor and transmits the voltage to the host computer; the host computer calculates the current signal of the circuit under test formed by the device under test and the load simulation module based on the voltage across the fixed resistor and the actual resistance value of the fixed resistor; and analyzes whether the device under test passes the test based on the sampled waveform of the current signal; both the load simulation module and the analog signal acquisition module are located inside the chassis; this solves the problem of large size of traditional testing instruments and realizes simultaneous testing of multiple devices under test, improving testing efficiency.

The invention provides a flip testing seat pressed down by a connecting rod cam mechanism, belongs to the technical field of integrated circuit board testing, and solves the technical problem that a pressing block cannot be ensured to vertically press down a tested integrated circuit. A flip testing seat pressed down by a connecting rod cam mechanism comprises a base, one side of the top of the base is fixedly connected with a connecting seat, the top of the connecting seat is connected with an upper cover through a torsional spring, the top of the upper cover is rotatably connected with a rocker, two sides of the rocker are symmetrically and slidably sleeved with cam plates, and the two cam plates are slidably connected in the upper cover. Connecting rods are rotatably connected to the interiors of the sides, close to the rocker, of the two cam plates, the other ends of the two connecting rods are rotatably connected to one side of the rocker, two Z-shaped holes are formed in one sides of the two cam plates, bearings are slidably connected to the interiors of the two Z-shaped holes, and the two bearings are rotatably connected to one side of the pressing block back plate. According to the invention, through the arrangement of the double bearings, the pressing block can be driven to vertically move up and down.

The invention discloses a parallel boundary scan test system based on an SVF format test input file, and the system employs a single-chip microcomputer or a microcontroller to serve as a boundary scan test actuator, and reads a test instruction and a test excitation vector described by the SVF format test input file. Test excitation and test control signals such as TDI / TMS / TCK / TRST are respectively generated on four IO pins of the boundary scan test actuator; after being driven and amplified by a bus driver, the signals are broadcasted and issued to TAP interfaces of all tested circuit boards and a reference circuit board through a star bus, all comparators judge test results according to the consistency of TDO output signals of the reference circuit board and TDO output signals of all the tested circuit boards, and finally LED lamps are used for displaying the test results of all the parallel test branches. The boundary scanning test system has the parallel test capability which is not possessed by a traditional boundary scanning test system, and is extremely high in cost-efficiency ratio.

The utility model relates to the field of circuit board testing, and discloses a testing system. The test system comprises a test frame, a clamp piece and a connecting unit, the test frame comprises a platform and a vertical table, the connecting unit comprises a lamp panel module, and the lamp panel module is suitable for being electrically connected with a door lock circuit board. According to the application, the test frame is combined with the lifting bracket capable of sliding and lifting, so that flexible adjustment of the clamp piece in the vertical space position can be realized to press the door lock circuit board to be tested, the positioning requirements of the door lock circuit boards with different sizes are met, and various door lock models are supported and adapted; and the clamp piece is linked with the lifting bracket, so that the tested circuit board can be quickly fixed / released, and the test preparation time is shortened. According to the invention, the lamp panel module is used as an output device, and a light indication signal of the lamp panel module gives a test result feedback immediately, so that an operator can judge and process problems quickly and conveniently; and specifically, the control assembly uniformly manages on-off of electric connection, so that the standardization of the test process is ensured, and manual operation errors are reduced.

The utility model relates to the technical field of detection circuits, and especially relates to an open circuit and short circuit intelligent detection device comprising an input interface connected with one end of a circuit to be detected; the output interface is connected with the other end of the to-be-detected circuit; the analog switch circuit comprises an input connection module and an output connection module, the input connection module is connected with the input interface, the output connection module is connected with the output interface, each of the input connection module and the output connection module comprises an analog switch chip, and the analog switch chips are used for determining a target core wire of the circuit to be detected based on selection; the MCU is connected with the module switching circuit; and the LED indicating lamp circuit is connected with the MCU and is used for indicating the detection results of the target core wires, and the target core wires are selected and detected through the analog switch circuit, so that the detection results of all the target core wires are provided, and detection omission is avoided.

The present invention provides a DFT test mode control circuit, method, and chip, relating to the field of integrated circuit testing technology. The circuit includes a timing verification module, which receives a test clock signal and is used to record rising edge count values ​​and compare them with pre-designed values ​​to obtain a timing comparison result; a signal verification module, which receives a test data signal and is used to record actual sampling values ​​and compare them with preset sampling values ​​to obtain a signal comparison result; and a test control module, which outputs a preset logic level signal to control the circuit under test to enter DFT test mode when the rising edge count value is equal to the pre-designed value and the actual sampling value is equal to the preset sampling value. The circuit utilizes signal resources output by existing ports to form a multi-verification mechanism for triggering the test mode, improving the reliability of the circuit under test entering the test mode. It eliminates the need for separate ports, reduces the number of ports, and reduces chip cost. DFT testing can also be performed even when the chip does not have all test ports.