219 results about "Automatic test equipment" patented technology

The invention provides an automatic test system and method for a third-party high-power repeater, and relates to the technical field of automatic test equipment, and the system comprises an integrated reconfigurable passive link box, a control host, a vector signal generator and a vector signal analyzer. The integrated reconfigurable passive link box comprises a box body, a radio frequency switch matrix network, an embedded function network, a control port, an input port, an output port, an uplink interface and a downlink interface. The radio frequency switch matrix network and the embedded function network are arranged in the box body. The input port, the output port, the uplink interface and the downlink interface are arranged on the surface of the box body. The vector signal generator is connected with the input port, the vector signal analyzer is connected with the output port, and a third-party high-power repeater to be tested is arranged between the uplink interface and the downlink interface. According to the invention, the radio frequency switch matrix network and the embedded function network are packaged in the integrated reconfigurable passive link box, and the control host is utilized to carry out automatic testing on the third-party high-power repeater according to the preset process, so that frequent operation processes are avoided, and damage to instruments is reduced.

The invention relates to the technical field of data storage, and discloses a method and system for optimizing test data collected by a memory chip based on machine learning, and the method comprises the steps: collecting original test data from a test platform of a to-be-tested memory chip; constructing a convolutional neural network model, learning a mapping relationship between test data features and memory defects through the convolutional neural network model, training the convolutional neural network model through the collected original test data, optimizing parameters of the convolutional neural network model according to a training result through a back propagation algorithm, and obtaining memory defects through the optimized parameters. The performance of the convolutional neural network model tends to be stable; converting a parameter vector output by the convolutional neural network model into a test vector executable by ATE; and taking the generated test vector as a new training sample, feeding back the new training sample to an original test data updating data set, and iteratively training and optimizing the convolutional neural network model. According to the invention, intelligentization of the test process is realized, and hidden defects sensitive to voltage and time sequence can be effectively captured.

An automated test equipment (ATE) for testing semiconductor devices, the test equipment comprises a test handler, a spare part, or a contactor socket, and a semiconductor devices tester, The spare part comprises an electronic component for storing and / or processing data regarding the spare part or a portion thereof, The test equipment comprises an operator terminal comprising a display or GUI and a data exchange interface which is connected or connectable to the electronic component within the spare part, for at least displaying data stored therein. The ATE further comprises a data buffer unit for buffering the data, a maintenance planning and control unit for planning and controlling maintenance actions of the test equipment, and a dedicated database residing in a control computer.

The present application relates to discrete device testing technology field, especially to a kind of discrete device full automation test equipment with intelligent temperature control and buffer scheduling, setting tool handling unit, visual identification manipulator, at least one tool positioning area, multiple positioning material placing mechanisms, multiple aging test machines and at least one cooling buffer warehouse, multiple positioning material placing mechanisms include at least one to be tested positioning material placing mechanism, at least one tested positioning material placing mechanism, at least one defective positioning material placing mechanism and at least one buffer positioning material placing mechanism;Each positioning material placing mechanism is configured with material placing container, and the material placing container is configured to store multiple discrete devices;It can improve test efficiency and equipment utilization, through full-process unmanned collaborative work, multiple aging test machines synchronous test, non-stop buffer replacement and seamless connection of temperature control and equipment scheduling, avoid time-consuming and equipment emptying, plugging problem of artificial operation, significantly improve test pace and equipment utilization.

The utility model relates to an FPC integrated automatic test equipment, including transmission band support, loading transmission band, FPC loading plate, front side test structure, overturn structure, reverse side test structure, the loading transmission band is connected in the transmission band support, a plurality of groups of FPC loading plates are arranged on the loading transmission band at equal intervals, the overturn structure is arranged on the front side test structure, the reverse side test structure is arranged on the reverse side test structure, and the reverse side test structure is arranged on the reverse side test structure. The front testing structure is fixed on the conveying belt support, the overturning structure is fixed on the conveying belt support, and the back testing structure is fixed at the top end of the overturning structure. According to the utility model, the arrangement of the FPC detection structure is optimized, the traditional FPC detection mode is changed, the detection equipment with the overturning function is designed, and the overturning structure is simple, convenient to maintain and use and suitable for popularization and use.

The invention relates to the technical field of optical module automatic test equipment, and discloses optical module automatic test equipment, which comprises an adsorption carrying table, and the adsorption carrying table is rotationally arranged on a machine base through a rotation driving part; the product carrying mechanism comprises a product moving module and a vacuum suction nozzle connected to the output end of the product moving module; the probe card testing mechanism comprises a first moving module, a visual detection module connected to the output end of the first moving module, probe plates symmetrically arranged on the two sides of the visual detection module and a plurality of probes arranged on the probe plates; the optical fiber alignment testing mechanism comprises a second moving module, an optical fiber posture adjusting assembly connected to the output end of the second moving module and an alignment optical fiber connected to the output end of the optical fiber posture adjusting assembly, and an optical fiber tube of the alignment optical fiber faces the product and is used for collecting light emitted by the product to achieve luminous flux detection.

The invention discloses a software ecological management method of automatic test equipment and application thereof, and belongs to the technical field of integrated circuit test. The method comprises the following steps: automatically writing a version identifier containing firmware information of an upper computer and a lower computer when a test program is compiled; when the program is loaded, the system obtains the actual version of the current operating environment and compares the actual version with the version identifier; if the versions are not matched, the system interrupts program execution through consistency verification and an interlocking controller, and a version switching manager is started; and the version switching manager automatically closes the current environment according to the version identifier, searches a version information base, switches the software of the upper computer, synchronously updates the firmware of the lower computer to a target version, and restores the test after the environment verification is passed. Through binding during compiling and forced verification during loading, automatic and accurate switching of the test environment is achieved, the problems that manual switching is prone to errors and software and hardware collaboration is poor are solved, and the test risk and the maintenance cost are remarkably reduced.

The invention relates to an automatic code spraying test line for a ceramic heating sheet. The automatic code spraying test line comprises a base, a jig return line, a withstand voltage detection module, a resistance detection module, an NG blanking module, a code spraying module, a code scanning module, a blocking module and a plurality of jigs, a feeding station, a withstand voltage detection station, a resistance detection station, an NG discharging station, a code spraying station, a code scanning station and a discharging station which are arranged in sequence are formed on the jig return line; the withstand voltage detection module is arranged at the withstand voltage detection station; the resistance detection module is arranged at the resistance detection station; the NG blanking module is arranged at the NG blanking station; the code spraying module is arranged at the code spraying station; the code scanning module is arranged at the code scanning station; blocking modules are arranged at the multiple stations. And the plurality of jigs are arranged on the jig return line and circularly move on the jig return line. According to the invention, the problem that products with inaccurate code spraying information possibly flow to the market in the existing automatic testing equipment for the ceramic heating sheet is solved.

The present application relates to a kind of porous ceramic material size automatic test equipment and method, belong to image measurement technical field.Test method includes: step S1, multiple sample numbers and in order are placed into each sample compartment of material taking frame, and blank material receiving frame is placed in material taking frame side;Step S2, according to the size specification of sample, the size of material taking frame and material receiving frame, sample quantity, set the sampling program and sample receiving program of mechanical arm;Step S3, according to the size specification of sample, set the measurement program of image measuring instrument measurement sample size;Step S4, according to sampling program, control mechanical arm from material taking frame sampling and place in image measuring instrument;According to measurement program, control image measuring instrument to sample size measurement;According to sample receiving program, control mechanical arm and sample receiving to material receiving frame in, until complete the measurement of all samples.The present application can realize the accurate test of large batch sample size, improve test efficiency and accuracy.

The invention discloses an active shock absorber test system, a test method, test equipment and a storage medium. The active shock absorber test system comprises a configuration module in which a parameter search space is stored; the automatic test module is used for controlling the active shock absorber and can obtain test data; the parameter selection module is used for inputting calibration parameters into the controller; and the data processing module is used for analyzing the test data to obtain a comprehensive performance score. The active shock absorber test method comprises the following steps: defining a parameter search space; performing formal testing by using the calibration parameters; analyzing to obtain a performance comprehensive score; repeating formal testing and data analysis; and outputting calibration parameters. The automatic test device for the automobile active damper comprises a processor configured to execute the steps of the active damper test method; and a memory storing processor executable instructions. Computer program instructions are stored in the computer readable storage medium, and the steps of the active shock absorber testing method are achieved when the program instructions are executed.

A method performed by automated test equipment (ATE) includes power cycling a solid state drive (SSD) device under test by the ATE, wherein the SSD device includes a memory controller integrated circuit (IC) attached to a printed circuit board (PCB) having a PCB interface; communicating one or more signals between the ATE and the memory controller IC using the PCB interface in a normal system mode; sending a command to cause the memory controller IC to place the PCB interface in a boundary scan mode; remapping a portion of pins of the PCB interface to a boundary scan interface; and communicating one or more boundary scan signals between the ATE and the memory controller IC using the remapped portion of pins of the PCB interface in the boundary scan mode.

This disclosure provides a test circuit, calibration method, and test equipment, wherein the test circuit includes a main control chip and an internal calibration circuit; the internal calibration circuit includes a resistor with a preset resistance value, a relay array, and a correction ADC; the main control chip is used to control the relay array to activate the measurement link in the internal calibration circuit corresponding to the control signal according to the received control signal; the internal calibration circuit is used to receive the test electrical signal, output it to the corresponding correction ADC through the measurement link, and acquire the value of the output electrical signal through the correction ADC. The test circuit provided by this disclosure allows the acquisition of the electrical signal output by the test chip within an ATE (Automatic Test Equipment) device, and the calibration of the test chip based on these electrical signals, integrating the test chip calibration function within the ATE device, thereby improving the integration level of the ATE device.

The utility model provides a kind of abnormal sound test equipment for automobile combination switch, including automatic test equipment main body and be provided in the quiet room of automatic test equipment main body, main control component, automatic feeding component, automatic test component, power supply component, display component, microphone for collecting sound data is equipped in quiet room, automatic test component is set in quiet room, automatic feeding component and automatic test component are respectively set in the inside two sides of automatic test equipment main body and mutually cooperate, main control component is respectively with automatic feeding component, automatic test component, power supply component, display component, microphone control connection, automatic test component is equipped with mutually cooperating combination switch fixing device and combination switch calibration test device. The utility model has the beneficial effect that: it can simulate driving personnel to operate automobile combination switch and test whether it exists abnormal sound.

The present application relates to the field of integrated circuit automatic test equipment, and discloses an asynchronous execution method and system for ATE test machines.The asynchronous execution method comprises the following steps: an SDK module forms a plurality of executable tasks from test item interface instructions issued by an upper computer and stores the executable tasks in a task stack; the SDK module polls tasks in the task stack, judges the executability of the tasks and processing modules; if the tasks are executable, the SDK module further judges whether lower modules participate; according to the judgment result, the SDK module processes the tasks by itself or distributes the tasks to an ATOS module for processing or distributes the tasks to an FPGA module through the ATOS module for processing; the SDK module, the ATOS module and the FPGA module asynchronously process the assigned tasks at the same time; and after the tasks are completed, the processing results are returned to the task stack; after all subtasks of the current test item are completed, the SDK module loads tasks of the next test item until all test items are completed.

The invention provides a mass production test system for an analog-to-digital converter based on a JESD204B interface, and the system comprises a to-be-tested chip which is provided with the JESD204B interface; the automatic test equipment is in communication connection with the JESD204B interface of the chip to be tested; the signal generator is used for providing an analog input signal and a clock for the chip to be tested and providing a reference clock for the automatic test equipment; wherein the automatic test equipment controls the to-be-tested chip to output a fixed waveform signal, so that the automatic test equipment performs sampling edge alignment based on the fixed waveform signal so as to capture output data of the JESD204B interface for analysis, application layer data is obtained, and a test result is determined based on the application layer data. The test efficiency can be effectively improved, and the complexity of a test architecture is reduced.

The invention belongs to the technical field of high-speed data testing, and discloses a high-speed signal eye pattern testing method and system based on automatic testing equipment, and the method comprises the steps that a high-speed signal configuration vector is divided into a configuration section and an action section, the configuration section is used for rapidly configuring a testing environment, and the action section is used for controlling a testing action; in the action section, constructing a virtual clock as a reference Trigger signal, and synchronizing the virtual clock and a high-speed signal to be detected to the same sequence group; performing waveform capture on the synchronized high-speed signal to be detected, and generating a two-dimensional array formed by sampling time and level values; the two-dimensional array is processed by a difference peak-valley segmentation method, the eye height, the rising / falling time and the jitter are measured based on a processing result, automatic control, measurement and output of test data can be realized through testing of automatic test equipment, data analysis and processing are facilitated, the test efficiency is improved, and interference of human factors is avoided.

The invention discloses an automatic test device and method for a navigation management responder. Relates to the technical field of equipment testing. The automatic test equipment for the navigation management responder comprises a human-computer interaction interface used for starting a test and sending a test instruction; the signal generation circuit is used for generating a test signal based on the received signal generation instruction; the signal receiving circuit is used for receiving a measurement signal returned by the measured navigation management responder; and the test case module is used for generating a signal generation instruction based on a test instruction sent by the human-computer interaction interface, and judging whether the tested navigation management responder is abnormal or not based on a pre-stored standard threshold value and the measurement signal. According to the invention, the problems of inconvenience in carrying and low automation degree in the testing process of related air traffic control responder testing equipment can be solved.

A system and method for jitter injection is provided. The system may include a serializer-deserializer (SerDes) circuit. In some examples, the serializer-deserializer (SerDes) circuit have a pre-emphasis circuit and a post emphasis circuit. The system may also include a controller, which may be used to apply specific and varying amounts of pre-emphasis and post-emphasis. The system may also include a jitter injector. In some examples, the jitter injector may be used to inject jitter into the serializer-deserializer (SerDes) circuit based on the applied pre-emphasis and post-emphasis.

The invention discloses a method and a system for improving resolution and linearity of a time sequence generator based on an FPGA (Field Programmable Gate Array), and belongs to the technical field of automatic test equipment. In order to solve the problem that an existing FPGA time sequence generator is difficult to consider high resolution, large dynamic range and high linearity at the same time, a multi-phase clock and coarse and fine delay lines of a carry chain are adopted to form a three-level time interpolation framework, and picosecond interpolation in the large dynamic range is achieved with extremely few logic resources; meanwhile, a time measurement channel is constructed in the chip to obtain actual physical delay, the actual physical delay is transmitted to the upper computer to execute a selection algorithm, and a target delay code with the minimum integral nonlinear error is screened out to update the delay code table. According to the invention, non-linear deviation caused by bottom hardware wiring is effectively overcome, the accuracy of time sequence edge placement and the system test rate are remarkably improved, and the method is mainly used for high-precision time sequence signal generation in digital integrated circuit automatic test equipment.

This invention relates to an automatic testing device and control method for a handheld terminal, comprising a frame composed of several supports and cover plates. The internal space of the frame is divided into a testing area and an electronic control area by partitions and supports. An electronic control module is located inside the electronic control area. A first control module is mounted on the side wall of the partition in the testing area, and a second control module is mounted on the first control module. The first control module is used to enable lateral movement of the second control module on the first control module. A third control module for changing the position of the handheld terminal is located at the bottom of the frame. The first control module includes a first synchronization belt. The advantages of this structure are that it solves the problems of low testing efficiency, large errors, complex structure, and testing of handheld terminals using only one or two control axes in existing handheld terminal testing methods.

Exemplary embodiments according to the invention include an automatic test equipment for testing a test object, wherein the automatic test equipment comprises a plurality of device power supplies, the device power supplies being configured to operate in a multiple operating mode. The automatic test equipment is configured to provide individual acquisition measurement results that are assigned to the individual device power supplies of a set of device power supplies when the individual device power supplies of the set of device power supplies are grouped.

The application discloses a kind of FPGA-based timing generator resolution and linearity promotion method and system, belong to automatic test equipment technical field.For the problem that existing FPGA timing generator is difficult to consider high resolution, large dynamic range and high linearity, the application adopts multi-phase clock and carry chain coarse, fine delay line to form three-stage time interpolation architecture, to realize picosecond-level interpolation of large dynamic range with very few logic resources;At the same time, the actual physical delay is obtained by constructing a time measurement channel in the chip, and is transmitted to the host computer to execute the selection algorithm, and the target delay code with the smallest integral nonlinear error is selected to update the delay code table.The application effectively overcomes the nonlinear deviation caused by the underlying hardware wiring, significantly improves the accuracy of timing edge placement and the system test rate, and is mainly used for generating high-precision timing signals in digital integrated circuit automatic test equipment.

An optoelectronic unit (6) for use with an automatic test equipment system (1), the automatic test equipment system (1) comprising a plurality of channel cards (10a-n), wherein the optoelectronic unit (6) comprises at least one optical circuit (6a) and a plurality of optoelectronic transducers (13a, 13b, 14), wherein the optoelectronic unit (6) is adapted to connect with contacts of the automatic test equipment system (1), and wherein the optoelectronic unit (6) is configured to transfer signals originating from at least one first channel card (10a) of the plurality of channel cards (10a-n) to at least one second channel card (10b) of the plurality of channel cards (10a-n) or back to the first channel card (10a) and / or from the at least one second channel card (10b) to the at least one first channel card (10a) or back to the second channel card (10b).

The utility model belongs to the mainboard test technical field especially relates to a kind of automatic test equipment of wired PCBA mainboard.It includes rack, and the two sides of rack are equipped with inlet and discharge port;Assembly line component is installed in the rack, and assembly line component is connected from inlet to discharge port, for transporting PCBA mainboard to be measured;Jig box is equipped in the below of assembly line component, and jig box is equipped with lower mould component;First driving mechanism is connected with assembly line component, for driving assembly line component to move downwards to make PCBA mainboard to be measured and lower mould component be connected;Upper mould component and second driving mechanism are equipped in the above of assembly line component, for driving upper mould component to move downwards to carry out the test of the lower pressure connection to PCBA mainboard to be measured.The utility model can be not interrupted, not separate main production assembly line without interruption, quickly, automatically, reliably complete test, realize the seamless embedding of PCBA mainboard test link, optimize production process, reduce manpower cost, improve test efficiency and product quality.

The invention discloses an algorithm testing system and method and a computer readable storage medium, and relates to the technical field of chip testing. The algorithm testing system comprises automatic testing equipment and a connecting jig. A to-be-verified algorithm and a test program are stored in the automatic test equipment; and the connecting jig is electrically connected with the automatic test equipment and is used for establishing electric connection with an external chip. Wherein the automatic test equipment executes the test program to provide test data for the to-be-verified algorithm and drive the to-be-verified algorithm to process the test data to obtain processing data output by the to-be-verified algorithm; the automatic test equipment sends the processing data to the external chip through the connection jig, and receives return data generated by the external chip based on the processing data through the connection jig; and the automatic test equipment verifies the to-be-verified algorithm according to the return data.

An interface device is provided between a test head and a device under test (DUT). A socket board includes sockets each configured to mount a DUT, and a socket PCB having a first face that mounts the sockets and a second face provided with multiple back face electrodes. An interposer has a first face provided with multiple deformable electrodes and a second face provided with multiple non-deformable electrodes and is configured such that the multiple deformable electrodes are in contact with the multiple back face electrodes of the socket PCB. An FPC cable has multiple electrode pads to be coupled with the multiple non-deformable electrodes on the second face of the first interposer.

The utility model relates to the technical field of test equipment, and discloses an automatic test device of an automobile central armrest box, which comprises a test board body, a placing piece and a tool piece, the placing piece is arranged on the test board body and is used for quickly placing and taking down the tool piece, the tool piece is arranged on the placing piece, and the tool piece is used for quickly placing and taking down the tool piece. A tool table for positioning and placing a product is arranged on the tool piece; according to the utility model, the problems that the tool table of the existing CNSL automatic test equipment is fixedly arranged on the equipment, and when the automobile central armrest boxes with different sizes need to be tested, the tool table cannot be replaced conveniently and quickly, so that the test time is shortened are effectively solved; and complex adjustment is often required to be carried out on the whole test equipment or an auxiliary device is used to adapt to armrest boxes with different sizes.

The invention discloses an automatic testing device, and relates to the technical field of circuit board testing, the automatic testing device comprises a rack, positioning assemblies, a first moving module, a second moving module and a pressing mechanism, and the multiple positioning assemblies flexibly move in a two-dimensional plane through the first moving module and the second moving module. When the positioning assemblies surround and abut against the outer side of the periphery of the to-be-tested circuit board, accurate limiting of the to-be-tested circuit board can be achieved through the multiple positioning assemblies, the positioning assemblies at different positions move independently and can also adapt to the to-be-tested circuit boards of different sizes and shapes, and after the positioning assemblies move in place, the positioning assemblies can be used for positioning the to-be-tested circuit board. The upper pressing plate can press the upper surface of the to-be-tested circuit board, the lower pressing plate can press the lower surface of the to-be-tested circuit board, the to-be-tested circuit board is automatically pressed under the action of elastic force of the upper pressing plate and the lower pressing plate, the to-be-tested circuit board can be prevented from shifting in the testing process, and the stability of the to-be-tested circuit board in the testing process is ensured.

A permanent defect qubit repair system using a redundant repair circuit at a quantum circuit level, includes: automatic test equipment configured to provide a fault address table with information of a permanent fault address (FA) and a spare address (SA) for replacing the FA to a quantum memory; a redundant repair circuit configured to constitute a circuit to repair a permanent defect qubit consisting of an address comparison and address replacement process and transfer an updated memory address to an address routing circuit; and the quantum memory comprising the address routing circuit configured to receive the updated memory address from the redundant repair circuit and then route the updated memory address to a memory cell according to an address value.

The application discloses a chip trimming function test method, device, equipment and medium, and relates to the technical field of chip testing. The method is applied to an automatic test equipment, and comprises the following steps: a general input / output interface is configured for a chip to be tested; a chip test mode is executed according to a test signal in the general input / output interface, and serial data sent by the automatic test equipment is acquired; a data flow direction of the serial data is determined according to a preset data format, and the serial data is written into a trimming register based on the data flow direction. Through the technical scheme, the test method can be simplified, and the test time can be shortened.