A test circuit, a calibration method thereof and a test apparatus
By integrating the main control chip and internal calibration circuit into the ATE equipment, and using a relay array and a correction ADC for signal calibration, the problems of low calibration efficiency and insufficient integration in the existing technology are solved, and efficient and highly integrated chip testing is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- WUHAN LIANXUN INSTRUMENT CO LTD
- Filing Date
- 2026-04-02
- Publication Date
- 2026-06-02
AI Technical Summary
In existing chip testing systems, calibration methods rely on external instruments, resulting in low efficiency, complex hardware connections, and a failure to keep up with the trend of equipment miniaturization. The calibration rate is also limited, making it unsuitable for multi-channel, large-scale mass production environments.
A test circuit is provided, including a main control chip and an internal calibration circuit. It uses a relay array and a correction ADC to perform calibration inside the ATE equipment. It realizes signal input and output by switching measurement links and determines the calibration value by combining a preset calibration algorithm.
It enables efficient calibration within ATE equipment, improves integration, reduces hardware connection complexity, adapts to multi-channel, large-scale mass production needs, and improves calibration speed.
Smart Images

Figure CN122131215A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of chip testing, and in particular to a test circuit, its calibration method, and test equipment. Background Technology
[0002] In a chip testing system, the test chip is responsible for providing precise voltage and current signals to the device under test. The accuracy of its output DC signal directly determines the test quality, so calibrating the test chip is an essential step.
[0003] Currently, conventional calibration methods primarily rely on external instruments, which presents several drawbacks. Firstly, manual calibration, involving connecting a DC signal to a resistor and source meter via cables, requires manual calculation of calibration parameters, resulting in extremely low efficiency and unsuitability for multi-channel, large-scale mass production environments. Secondly, calibration board-based solutions utilize external dedicated calibration boards to extract signals and work with the source meter. This not only increases the complexity of hardware connections and operations but also reduces the overall integration of the automated test equipment (ATE), contradicting the trend towards equipment miniaturization. Finally, directly connecting the source meter to a relay board for calibration is severely limited by the communication and measurement speed of the source meter itself, leading to excessively long calibration times during mass production and significantly reducing production capacity.
[0004] In summary, existing technologies generally suffer from problems such as heavy reliance on external source meters, cumbersome hardware physical connections, and low calibration efficiency. Therefore, there is an urgent need for a calibration method that requires no external source meters or calibration boards, has high integration, and offers fast calibration speed, which has become a pressing technical challenge in the current chip testing field. Summary of the Invention
[0005] This disclosure provides a test circuit, a calibration method therefor, and a test device, which are used to provide a test circuit applied inside an ATE (Automatic Test Equipment) so that it can calibrate test chips inside the ATE equipment.
[0006] In view of the above problems, in a first aspect, this disclosure provides a test circuit, including: a main control chip and an internal calibration circuit; The internal calibration circuit includes: a resistor with a preset resistance value, a relay array, and a correction ADC; The main control chip is used to control the relay array according to the received control signal to activate the measurement link in the internal calibration circuit corresponding to the control signal; The internal calibration circuit is used to receive the test electrical signal, output it to the corresponding correction ADC through the measurement link, and acquire the value of the output electrical signal through the correction ADC.
[0007] In conjunction with the first aspect, in one possible implementation, the internal calibration circuit is further provided with a test signal interface for connection to an external signal channel, and / or a source meter interface for connection to a source meter. The relays in the relay array are respectively set at the preset connection nodes between the resistor, the test signal interface, the source meter interface and the correction ADC, and are used to switch the conduction relationship according to the control command of the main control chip to establish a measurement link between the preset nodes in the test signal interface, the resistor, the source meter and the correction ADC. The source meter interface is used to receive the test electrical signal output by the source meter and input it into the measurement link; and to receive the feedback electrical signal output by the measured measurement link. The test signal interface is used to receive the test electrical signal transmitted by the external signal channel and input the measurement link being measured. The correction ADC is used to acquire the output electrical signal at the end of the measurement link measured by the test signal interface, and transmit the output electrical signal to the main control chip.
[0008] In conjunction with the first aspect, in one possible implementation, the resistors with preset resistance values are divided into a preset number of groups, and the resistance value in each group is determined according to the range of values of the test electrical signal. One end of the resistor is connected to a first common connection point and a second common connection point. The first common connection point is connected to the test signal interface side and the source meter interface side, respectively. The second common connection point is connected to the source meter interface side and the correction ADC side, respectively. The other end of the resistor is connected to the third common connection point and the ground point, respectively, and the third common connection point is connected to the source meter interface side.
[0009] Secondly, embodiments of this disclosure provide a calibration method for a test circuit, which, based on the internal calibration circuit described in any one of the first aspects, establishes a measurement link between the test signal input terminal and the test feedback signal output terminal by switching the conduction state of the relay array; The method includes: For each measurement link, the measurement link is turned on, a test signal is input through the test signal input terminal, the test signal passes through the measurement link, and a test feedback signal is output through the test feedback signal output terminal. Based on the test feedback signal, the device under test in the measurement link is calibrated.
[0010] In conjunction with the second aspect, in one possible implementation, the test signal input terminal includes a source meter interface; the test feedback signal output terminal includes a correction ADC; the measurement link includes a first measurement link; by switching the conduction state of the relay array, corresponding first measurement links are established between the correction ADC and the source meter interface respectively; and the output terminals of the first measurement links are all connected to the source meter interface. For each measurement link, the measurement link is turned on, a test signal is input through the test signal input terminal, the test signal passes through the measurement link, and a test feedback signal is output through the test feedback signal output terminal, including: For each first measurement link, the first measurement link is turned on so that the first test signal generated by the source meter is transmitted through the first measurement link to the correction ADC connected to the first measurement link; Based on the test feedback signal, the device under test in the measurement link is calibrated, including: Based on the output electrical signal value obtained by the correction ADC and the corresponding electrical signal value actually output by the source meter, the calibration value corresponding to the correction ADC is determined by a preset calibration algorithm.
[0011] In conjunction with the second aspect, in one possible implementation, the step of determining the calibration value corresponding to the calibration ADC based on the value of the output electrical signal obtained by the calibration ADC and the corresponding electrical signal value actually output by the source meter, through a preset calibration algorithm, includes: The output electrical signal value corresponding to the first test signal acquired by the correction ADC is sampled multiple times to obtain the first sampled value, and the corresponding electrical signal value actually output by the source meter is sampled to obtain the second sampled value. Using the first sampled value as the abscissa and the second sampled value as the ordinate, multiple first calibration points are determined in the coordinate system; The first calibration equation is obtained by fitting the first calibration point; wherein the first calibration equation is a linear equation in two variables with the first sample value as the independent variable and the second sample value as the dependent variable. The correction coefficient in the first calibration equation is determined as the calibration value for the ADC.
[0012] In conjunction with the second aspect, in one possible implementation, the test signal input terminal includes a test signal interface; the test feedback signal output terminal includes a correction ADC; the measurement link includes a second measurement link; by switching the conduction state of the relay array, a second measurement link is established for each corresponding resistor between the correction ADC and the test signal interface, passing through that resistor; and the test signal interface is connected to the source meter through an external signal channel. For each measurement link, the measurement link is turned on, a test signal is input through the test signal input terminal, the test signal passes through the measurement link, and a test feedback signal is output through the test feedback signal output terminal, including: For each second measurement link, the second measurement link is turned on, so that the second test signal generated by the source table passes through the second measurement link and is transmitted to the correction ADC connected to the second measurement link respectively; Based on the test feedback signal, the device under test in the measurement link is calibrated, including: Based on the output electrical signal value obtained by the correction ADC and the corresponding second test signal value generated by the source meter, the calibration value of the second measurement link where each resistor is located is determined by a preset calibration algorithm.
[0013] In conjunction with the second aspect, in one possible implementation, the step of determining the calibration value of each resistor in the second measurement link based on the output electrical signal value obtained by each correction ADC and the corresponding second test signal value generated by the source meter, using a preset calibration algorithm, includes: For each resistor, the output electrical signal value acquired by the correction ADC in the second measurement link of that resistor is sampled multiple times to obtain the third sampled value, and the actual output value of the corresponding second test signal acquired by the source meter is obtained. Using the third sampled value as the abscissa and the actual output value as the ordinate, multiple second calibration points are determined in the coordinate system. The second calibration equation is obtained by fitting the second calibration point; wherein, the second calibration equation is a linear equation in two variables with the third sampled value as the independent variable and the actual output value as the dependent variable. The correction factor in the second calibration equation is determined as the calibration value of the resistor in the second measurement link.
[0014] In conjunction with the second aspect, in one possible implementation, the test signal input terminal includes the input terminal of the source meter; the test feedback signal output terminal includes the output terminal of the source meter; the measurement link includes a third measurement link; by switching the conduction state of the relay array, corresponding third measurement links are established between the output terminal of the source meter, the resistor under test, and the input terminal of the source meter, respectively. For each measurement link, the measurement link is turned on, a test signal is input through the test signal input terminal, the test signal passes through the measurement link, and a test feedback signal is output through the test feedback signal output terminal, including: For each third measurement link, the third measurement link is turned on so that the third test signal generated by the source meter for the resistor under test in the third measurement link passes through the third measurement link, and the electrical signal fed back by the third measurement link is received through the input terminal of the source meter. Based on the test feedback signal, the device under test in the measurement link is calibrated, including: Based on the third test signal corresponding to the third measurement link and the feedback electrical signal, determine the measured resistance value of the resistor to be measured in the third measurement link; The deviation of the resistance value of the resistor under test is determined based on the deviation between the measured resistance value and the corresponding ideal resistance value.
[0015] In conjunction with the second aspect, in one possible implementation, it further includes: A verification equation is established based on the calibration value, the calibrated object is verified, and the percentage of error corresponding to the calibration value is determined based on the verification result. The error percentage is compared with a first threshold. If the error percentage is less than the first threshold, the calibration object is determined to have passed calibration.
[0016] In conjunction with the second aspect, in one possible implementation, a verification equation is established based on the calibration value, the calibrated object is verified, and the percentage of error corresponding to the calibration value is determined based on the verification result, including: A two-variable linear equation is established with the output electrical signal of the correction ADC as the independent variable, the calculated electrical signal value as the dependent variable, and the calibration value as the coefficient. The output electrical signal value obtained by the correction ADC is input into the binary linear equation to determine the corresponding calculated electrical signal value. Based on the electrical signal deviation between the calculated electrical signal value and the target electrical signal value, the ratio of the electrical signal deviation value to the preset maximum permissible error is determined, and the ratio is determined as the error percentage corresponding to the calibration value.
[0017] Thirdly, embodiments of this disclosure provide a test apparatus, including: a test circuit as described in any of the first aspects, and / or a calibration method for the test circuit as described in any of the second aspects.
[0018] The beneficial effects of the embodiments disclosed herein include: This disclosure provides a test circuit, calibration method, and test equipment, wherein the test circuit includes a main control chip and an internal calibration circuit; the internal calibration circuit includes a resistor with a preset resistance value, a relay array, and a correction ADC; the main control chip is used to control the relay array to activate the measurement link in the internal calibration circuit corresponding to the control signal according to the received control signal; the internal calibration circuit is used to receive the test electrical signal, output it to the corresponding correction ADC through the measurement link, and acquire the value of the output electrical signal through the correction ADC. The test circuit provided by this disclosure allows the acquisition of the electrical signal output by the test chip within the ATE equipment, and the calibration of the test chip based on these electrical signals, integrating the test chip calibration function within the ATE equipment, thereby improving the integration level of the ATE equipment. Attached Figure Description
[0019] Figure 1 This is one of the schematic diagrams of the test circuit provided in the embodiments of this disclosure; Figure 2 One of the schematic diagrams of the connection structure of the test circuit provided in the embodiments of this disclosure; Figure 3 This is a second schematic diagram of the test circuit provided in an embodiment of the present disclosure; Figure 4 A second schematic diagram of the connection structure of the test circuit provided in the embodiments of this disclosure; Figure 5 This is a schematic diagram of resistor wiring provided in an embodiment of the present disclosure; Figure 6 A schematic flowchart of the calibration method for the test circuit provided in the embodiments of this disclosure; Figure 7 A schematic diagram of the ADC calibration process for the test circuit provided in the embodiments of this disclosure; Figure 8 This is a schematic diagram of the measurement link calibration process for the test circuit provided in the embodiments of this disclosure. Detailed Implementation
[0020] This disclosure provides a test circuit, its calibration method, and a test device. Preferred embodiments of this disclosure are described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustrative and explanatory purposes only and are not intended to limit the scope of this disclosure. Furthermore, the embodiments and features described herein can be combined with each other unless otherwise specified.
[0021] This disclosure provides a test circuit, such as... Figure 1 As shown, it includes: main control chip 1 and internal calibration circuit 2; The internal calibration circuit 2 includes: a resistor 21 with a preset resistance value, a relay array 22, and a correction ADC 23; The main control chip 1 is used to control the relay array 22 to turn on the measurement link in the internal calibration circuit 2 corresponding to the control signal according to the received control signal; The internal calibration circuit 2 is used to receive the test electrical signal, output it to the corresponding correction ADC 23 through the measurement link, and acquire the value of the output electrical signal through the correction ADC 23.
[0022] In this embodiment, the test circuit can be a circuit for testing a chip. This circuit includes a test chip, which outputs an electrical signal to the chip under test (DUT). Based on the electrical signal output by the DUT, the performance of the DUT is detected, thus achieving the test of the DUT. As a preferred embodiment, the test chip can be a PE (Pin Electronics) chip. To calibrate the PE chip in this circuit, the test circuit of this disclosure integrates an internal calibration circuit and a control circuit (e.g., a main control chip) on the PE chip side for calibration. This allows the ATE device to calibrate the PE chip without requiring an additional calibration device.
[0023] The test circuit may include an internal calibration circuit 2 and a main control chip 1. The main control chip 1 can communicate with a lower-level computer and receive control signals from the lower-level computer. It should be noted that the lower-level computer referred to in this disclosure is in contrast to the upper-level computer used for overall control of the ATE equipment. The lower-level computer in this disclosure can be a computer device capable of controlling the main control chip and source meter, and capable of acquiring the data collected by both (e.g., the value of the acquired test electrical signal). This lower-level computer can also execute corresponding calibration algorithms based on this data. The upper-level computer in this disclosure can communicate with the lower-level computer and can send corresponding control signals through the lower-level computer to control the main control chip and source meter.
[0024] Specifically, such as Figure 2 As shown, the main control chip 1 can be connected to the data transfer unit board (DTU) via a signal backplane. Signal connectors are located at both ends of the signal backplane; one connector connects to the main control chip 1, and the other connects to the DTU board. The DTU board can communicate with the lower-level machine via an optical module or other network protocols. It can convert control signals from the lower-level machine and send them to the main control chip 1, and it can also send data acquired by the main control chip 1 to the lower-level machine.
[0025] The main control chip 1 can be implemented as a programmable system-on-a-chip. Embedded software can be pre-installed within the main control chip 1. Based on the instructions of the control signals, the main control chip 1 can output corresponding signals through extended interfaces such as integrated circuit bus (I2C), serial peripheral interface (SPI), or local bus. Specifically, the main control chip 1 can include a processing system (PS) section and a programmable logic (PL) section.
[0026] The internal calibration circuit 2 can include multiple sets of resistors with different preset resistance values. Each resistor in a set can calibrate the corresponding channel of an electrical signal output from a different channel in the PE chip. The number of resistor sets can be set according to the number of channels in the PE chip to be calibrated, and each resistor set can correspond to multiple output channels in the PE chip. For example... Figure 1 As shown, Figure 1 R1 to R5, R6 to R10, and R11 to R15 are three identical sets of resistors. Taking R1 to R5 as an example, the five resistors can have different preset resistance values, such as 83Ω, 2.5MΩ, 500kΩ, 50kΩ, and 5kΩ. This is for illustrative purposes only and is not a limitation.
[0027] The correction ADC can acquire the value of the electrical signal in the internal calibration circuit 2 and is connected to the main control chip 1. It can upload the acquired value to the main control chip 1, and the main control chip 1 can transmit it to the lower-level machine for calibration calculation and data recording. Specifically, the correction ADC can be implemented as an analog-to-digital converter (ADC).
[0028] Multiple relays are installed on the connection lines between each resistor, the correction ADC, the test signal interface, and the source meter interface. These relays form a relay matrix, which may also include an input / output (I / O) expansion chip. This expansion chip is connected to the I2C interface of each relay and the main control chip 1. Under the control of the main control chip 1, the expansion chip switches the conduction state of different relays, thereby forming different signal paths as measurement links for measuring the output signal of the PE chip. Specifically, the measurement link is a signal route constructed by switching the state of the relay matrix to directionally transmit the electrical signal output by the PE chip to the target component (e.g., the correction ADC).
[0029] The circuit described above can acquire the electrical signals output by the PE chip within the ATE equipment, and execute the corresponding calibration algorithm based on these electrical signals to calibrate the various functions of the PE chip. This achieves the goal of integrating the PE chip calibration function into the ATE equipment, thereby improving the integration level of the ATE equipment.
[0030] Another embodiment provided in this disclosure, such as Figure 1 As shown, the internal calibration circuit 2 is also provided with a test signal interface 24 for connecting to an external signal channel, and / or a source meter interface 25 for connecting to a source meter; The relays in the relay array 22 are respectively set at the preset connection nodes between the resistor, the test signal interface 24, the source meter interface 25 and the correction ADC 23, and are used to switch the conduction relationship according to the control command of the main control chip 1 to establish a measurement link between the preset nodes in the test signal interface 24, the resistor, the source meter and the correction ADC 23. The source meter interface 25 is used to receive the test electrical signal output by the source meter and input it into the measurement link; and to receive the feedback electrical signal output by the measured measurement link. The test signal interface 24 is used to receive the test electrical signal transmitted by the external signal channel and input the measurement link being measured. The correction ADC23 is used to acquire the output electrical signal at the end of the measurement link measured by the test signal interface 24, and transmit the output electrical signal to the main control chip 1.
[0031] In this embodiment, since the calibration of the PE chip requires high precision, the internal calibration circuit 2, which measures the output signal of the PE chip, also needs to have high precision. Therefore, before using the internal calibration circuit 2 to calibrate the PE chip, the components in the internal calibration circuit 2 need to be calibrated first. To achieve this, the internal calibration circuit 2 needs to be calibrated by using a calibrated source meter as a reference signal source. To enable the input of the signal emitted by the source meter into the internal calibration circuit 2 and to acquire the electrical signal in the internal calibration circuit 2, a source meter interface 25 is provided in the internal calibration circuit 2. The probes of the source meter can be connected to the above interface to realize signal transmission. Specifically, the test method required by the source meter varies depending on the object being measured. For example, for testing small resistances, a four-wire method is required, that is, two loops need to be established between the source meter and the resistor under test. Therefore, the source meter interface can include at least four interfaces: two interfaces for source meter signal input and two interfaces for source meter signal output.
[0032] Since the calibration ADC is a crucial signal acquisition component during the PE chip calibration process, it is necessary to calibrate the calibration ADC in the internal calibration circuit 2 before calibrating the PE chip itself to ensure high accuracy in the subsequent PE chip calibration process. In this disclosure, a test electrical signal is output from the source meter interface 25 to the internal calibration circuit 2. This signal passes through an operational amplifier connected to the input of each calibration ADC for gain and tracking. The calibration ADC can then acquire the value of this test electrical signal and, combined with the actual output value of the source meter, calibrate the calibration ADC.
[0033] Furthermore, a digital-to-analog (DA) converter circuit can be set in the internal calibration circuit 2. This DA circuit outputs a test electrical signal, which is then acquired by the correction ADC and the source meter. The calibration algorithm is then used to calibrate the correction ADC. The structure of this internal calibration circuit can be as follows: Figure 3 As shown. According to Figure 3 As can be seen, the DA circuit can be connected to a relay matrix. When calibration of the correction ADC is required, the main control chip can control the conduction of the relays in the relay matrix, thereby establishing corresponding signal routes between the DA circuit and the correction ADC, and between the DA circuit and the source meter interface. The DA circuit can output corresponding test electrical signals according to the control of the main control chip, and then input the test electrical signals into the two signal routes mentioned above. The correction ADC and the source meter collect the values of the test electrical signals through these signal routes, and the calibration algorithm is used to calibrate the correction ADC.
[0034] In another possible implementation, the source meter can be connected to an external load board. The source meter outputs a test signal to the internal calibration circuit through the external load board. The calibration ADC then acquires the value of this test signal and, combined with the actual output value of the source meter, calibrates the calibration ADC using a calibration algorithm. The source meter can be connected to the external load board near the PE chip to simulate the signal transmission path in a real chip testing environment. In this implementation, the overall circuit structure can be as follows: Figure 4 As shown. Figure 4 As shown, the source meter can be connected to the input interface of the load board. The main control chip then controls the conduction of the relays in the relay matrix, establishing a signal route between the test signal interface and the correction ADC, enabling the correction ADC to acquire the test electrical signal output from the source meter. Based on the value of the test electrical signal acquired by the correction ADC and combined with the actual output value of the source meter, the correction ADC is calibrated using a calibration algorithm.
[0035] In this embodiment, the test signal interface 24 is the interface for the signal input to the internal calibration circuit 2 from the PE chip side. The test signal interface 24 can establish a connection with the output channel of the PE chip through an external signal channel outside the internal calibration circuit 2. Depending on the actual situation, each external signal channel can be connected to multiple output channels and connected to a corresponding test signal interface 24.
[0036] In another embodiment provided in this disclosure, the resistor with the preset resistance value is divided into a preset number of groups, and the resistance value in each group is determined according to the value range of the test electrical signal. One end of the resistor is connected to a first common connection point and a second common connection point. The first common connection point is connected to the test signal interface side and the source meter interface side, respectively. The second common connection point is connected to the source meter interface side and the correction ADC side, respectively. The other end of the resistor is connected to the third common connection point and the ground point, respectively, and the third common connection point is connected to the source meter interface side.
[0037] In this embodiment, during the subsequent calibration of the PE chip, various signals need to be output from the PE chip to the internal calibration circuit, and the PE chip is calibrated based on the values acquired by the internal calibration circuit. To accommodate different signal output levels of the PE chip, the internal calibration circuit includes multiple resistors of different values, which can be divided into multiple groups. Each group of resistors corresponds to the complete signal output range of the PE chip. In one possible implementation, for the 60mA output level of the PE chip, an 83.167Ω resistor can be included in each group to adapt to this current level, ensuring that the voltage across the resistor is controlled within the range and preventing voltage over-limit. For the 10uA output level of the PE chip, a 500KΩ resistor can be included in each group to adapt to this current level, ensuring that the voltage across the resistor is a larger, easily acquired value, facilitating calibration.
[0038] Depending on the specific number of output channels of the PE chip, multiple such resistor groups can be set in the internal calibration circuit. Each group can be responsible for receiving test electrical signals from multiple output channels in the PE chip and performing calibration simultaneously, thereby reducing calibration time and improving calibration efficiency.
[0039] Each set of resistors in the internal calibration circuit can be connected to at least one test signal interface 24. That is, the set of resistors can measure the test electrical signal of the output channel of the PE chip connected to the test signal interface 24, and then calibrate these channels.
[0040] like Figure 5As shown, in each resistor combination, one end of each resistor is connected to two common connection points (i.e., a first common connection point and a second common connection point). The first common connection point is connected to at least one test signal interface 24 and the source meter interface 25, while the second common connection point is connected to the source meter interface 25 and the correction ADC. A relay is installed on the connection line between each resistor and these two common connection points. Controlling the conduction of the relays controls the on / off state of that connection line. Furthermore, relays are also installed between the common connection point and the source meter interface 25, between the common connection point and the correction ADC, and between the common connection point and the test signal interface 24. The other end of each resistor is also connected to a third common connection point and grounded, which is connected to the source meter interface 25 side. Multiple measurement links for acquiring test electrical signals can be formed through different combinations of these relay channels.
[0041] This disclosure also provides a calibration method for a test circuit, which, based on the internal calibration circuit described in any of the embodiments, establishes a measurement link between the test signal input terminal and the test feedback signal output terminal by switching the conduction state of the relay array. Calibration methods for test circuits, such as Figure 6 As shown, it can be implemented as follows: S101. For each measurement link, turn on the measurement link, input a test signal through the test signal input terminal, let the test signal pass through the measurement link, and output a test feedback signal through the test feedback signal output terminal. S102. Based on the test feedback signal, calibrate the device under test in the measurement link.
[0042] In this embodiment of the disclosure, each measurement link is a signal path connected by different relays in the relay array. By introducing external test signals into different measurement links in the internal calibration circuit, and based on the test feedback signals obtained in different measurement links, the response of each measurement link is determined, thereby calibrating different components in the internal calibration circuit.
[0043] Specifically, the devices under test in the internal calibration circuit can include resistors, a calibration ADC, and transmission lines between these components. For resistors, the resistance value can be calibrated; for the calibration ADC, the sampling accuracy can be calibrated; and for transmission lines, the leakage current in the measurement link can be determined.
[0044] It should be noted that the test signal in this disclosure can be a test electrical signal output by components such as a source meter or DA circuit. Depending on the needs of different tests or calibrations, the electrical signal here can be a current signal or a voltage signal, etc.
[0045] In another embodiment provided in this disclosure, the test signal input terminal includes a source meter interface; the test feedback signal output terminal includes a correction ADC; the measurement link includes a first measurement link; by switching the conduction state of the relay array, corresponding first measurement links are established between the correction ADC and the source meter interface respectively; and the output terminals of the first measurement links are all connected to the source meter interface. In step S101 above, "for each measurement link, turn on the measurement link, input a test signal through the test signal input terminal, let the test signal pass through the measurement link, and output a test feedback signal through the test feedback signal output terminal," can be implemented as follows: S101A. For each first measurement link, turn on the first measurement link so that the first test signal generated by the source meter passes through the first measurement link and is transmitted to the correction ADC connected to the first measurement link. In step S102 above, "calibrating the device under test in the measurement link based on the test feedback signal" can be implemented as follows: S102A: Based on the value of the output electrical signal obtained by the correction ADC and the corresponding electrical signal value actually output by the source meter, determine the calibration value corresponding to the correction ADC through a preset calibration algorithm.
[0046] In this embodiment, the source meter is a test instrument that integrates the functions of a precision power supply and a multimeter. The source meter has signal output capability, serving as a voltage or current source to provide excitation signals to the device under test; it also has signal measurement capabilities, allowing simultaneous measurement of the voltage or current response at the device terminals while outputting a signal. Furthermore, the source meter has the function of monitoring and outputting its actual output value (i.e., readback). This function is independent of set values and confirms the actual voltage or current applied to the circuit through real-time measurement.
[0047] This embodiment mainly focuses on calibrating the correction ADC in the internal calibration circuit 2. Specifically, the first measurement link includes a signal path between the source meter interface 25 and the correction ADC. The first test signal output by the source meter enters the first measurement link through the source meter interface and is then output to the correction ADC. By comparing the difference between the actual output electrical signal value of the source meter and the electrical signal value obtained by the correction ADC, the correction ADC can be calibrated.
[0048] The correction ADC here can be a separate ADC chip corresponding to each set of resistors; or it can be an ADC chip with multiple input channels that integrates a multiplexer, where each input channel of the ADC chip can correspond to a set of resistors.
[0049] The main control chip 1 can read the electrical signal value obtained by the correction ADC through a communication interface (e.g., SPI interface), and then perform data processing and format conversion operations inside the main control chip 1. Finally, it uses a specific protocol (e.g., Standard Commands for Programmable Instruments (SCPI) protocol) to upload the electrical signal value to the lower-level machine.
[0050] The electrical signal value obtained from the source table is directly uploaded to the lower-level machine. The lower-level machine calculates the calibration value for the correction ADC based on the obtained value using a preset calibration algorithm.
[0051] In another embodiment provided in this disclosure, the above step S102A, "determining the calibration value corresponding to the calibration ADC based on the value of the output electrical signal obtained by the calibration ADC and the corresponding electrical signal value actually output by the source meter through a preset calibration algorithm," can be implemented as follows: S102A1. The output electrical signal value corresponding to the first test signal acquired by the correction ADC is sampled multiple times to obtain the first sampled value, and the corresponding electrical signal value actually output by the source meter is sampled to obtain the second sampled value. S102A2: Using the first sampled value as the abscissa and the second sampled value as the ordinate, determine multiple first calibration points in the coordinate system; S102A3. Obtain the first calibration equation by fitting the first calibration point; Wherein, the first calibration equation is a linear equation in two variables with the first sample value as the independent variable and the second sample value as the dependent variable; S102A4. The correction coefficient in the first calibration equation is determined as the calibration value of the ADC.
[0052] In this embodiment of the disclosure, the lower-level machine can send a corresponding calibration command as a control signal to the main control chip 1 for each correction ADC. The main control chip 1 controls the I / O expansion chip according to the control signal, and the I / O expansion chip further controls the relay to switch on and off, so that the relay between the source meter interface 25 and the correction ADC under test is switched to the on state, so that the first test signal generated by the source meter can be transmitted to the correction ADC.
[0053] Furthermore, the lower-level machine can send instructions to the source table, controlling it to output a first test signal, which is then acquired by the correction ADC. The first sampled value acquired by the correction ADC is first uploaded to the main control chip 1, and then uploaded by the main control chip 1 to the lower-level machine. The second sampled value actually output by the source table is directly uploaded to the lower-level machine via a network cable or other connection method. The lower-level machine matches and records these two values. After acquiring the value of one first test signal, the lower-level machine can send another command to control the source table to generate a first test signal with another predetermined value, and then acquire new first and second sampled values. This process is repeated multiple times until multiple sets of first and second sampled values are obtained. The number of first and second sampled values can be determined as needed. To increase the speed of the calibration operation, the number of sets of sampled values can be reduced accordingly; to increase the calibration accuracy, the number of sets of sampled values can be increased accordingly. To ensure the smooth progress of the calibration process, a typical value of 4 can be selected, meaning that four sets of first and second sampled values can be obtained by outputting four different first test signals.
[0054] After acquiring the sampled values, multiple first calibration points can be obtained in a coordinate system using the first sampled value as the x-axis and the second sampled value as the y-axis. By fitting these first calibration points using a lower-level computer, a system of two linear equations in two variables can be obtained; this system of equations is the first calibration equation. Furthermore, the slope and intercept of this system of two linear equations can be determined as correction coefficients for the first calibration equation, thereby obtaining the calibration value of the rectified ADC.
[0055] The lower-level machine can transmit the calibration value to the main control chip 1, which stores it in a non-volatile storage space connected to the main control chip 1 for retrieval as needed.
[0056] After obtaining the calibration value of a correction ADC, the lower-level machine can continue to control the main control chip 1, switch the conduction of the first measurement link corresponding to another correction ADC, and execute the above process again to determine a calibration value for each correction ADC in the internal calibration circuit 2.
[0057] Here is an example to illustrate the process of calibrating and correcting the ADC by using the source meter output test electrical signal.
[0058] When calibration of the correction ADC in the internal calibration circuit 2 is required, the lower-level machine can connect to the external source table by calling the interface via the instruction connectToSmu(enable, smu_type). The enable field indicates the connection or disconnection status of the source table; true indicates connection, and false indicates disconnection. In this example, true is used because a connection to the source table is required. smu_type indicates the type of source table to connect to. Based on this type, the interface type and communication protocol during communication between the lower-level machine and the source table can be defined. The configuration data in the lower-level machine's memory (e.g., the IP address, serial port number, or baud rate for communication with the source table) is modified by a pointer. The same pointer triggers the connect command, enabling the lower-level machine to establish hardware communication with the source table according to the aforementioned instruction program.
[0059] After establishing a communication connection with the source table, the `peSetAdcADCCalibArg(group, calType, k, b)` instruction can be called to clear the calibration values previously stored for the corresponding correction ADC by the main control chip 1, resetting `k` and `b` (where `k` is the slope of the linear equation in two variables and `b` is the intercept of the linear equation in two variables) to 1 and 0 respectively. The `group` field indicates the number of the correction ADC whose calibration values need to be cleared. Assuming there are 3 correction ADCs in the internal calibration circuit 2, this field can be set to 0, 1, or 2 as needed. The `calType` field represents the corresponding calibration type. Since the correction ADC needs to be calibrated using voltage values, this is the type of calibration performed on the voltage of the correction ADC in the system calibration, and the preset number for this calibration type is 8. Therefore, the final instruction is `peSetAdcADCCalibArg(0, 8, 1, 0)`. Here, system calibration refers to the operation of calibrating other parts of the test circuit besides the test chip (e.g., components in the internal calibration circuit).
[0060] After resetting the calibration value of the ADC, you can call the setSmuFuncMode(mode) instruction to set the source meter's state to current source state; where mode represents the source meter's mode, 0 represents current mode and 1 represents voltage mode. Here, it is set to current mode 0, i.e., setSmuFuncMode(0).
[0061] The setSmuVClamp(volt) instruction is called to set the clamping voltage of the source table to avoid overvoltage. Here, the voltage item volt is usually set to 10V, i.e., setSmuVClamp(10).
[0062] The internal calibration circuit 2 is set to the corresponding mode for voltage calibration of the correction ADC by calling the peDcCalStepModeSet(index) instruction. The value of the index item indicates the mode to be set. Each correction ADC can correspond to a mode number, which is 16, 17 and 18 respectively. For the first correction ADC, the instruction can be peDcCalStepModeSet(16).
[0063] The voltage range of the source meter can be set by calling the setSmuVoltRange(volt) instruction. Generally, the 6V range is used for values below 6V, and the 40V range is used for values above 6V. The range is set according to the voltage value to be output later. If the value of the first test signal is 1V, the 6V range of the source meter can be used, i.e., setSmuVoltRange(6).
[0064] The setSmuVsrc(volt) instruction sets the output voltage of the source meter. The number of sets of the first and second sampled values can be set according to the number of sets of the first and second sampled values that need to be obtained. Assuming that 9 voltage values are set, -5, -3, -2.5, -1, 0, 1, 2.5, 5, 6, 8, the corresponding instructions can be called in sequence. That is, the first call is setSmuVsrc(-5) to control the output of the corresponding voltage value.
[0065] Calling `setSmuOutput(on)` enables the output of the source table. `on` indicates whether the output is turned off or on. Turning off is `false` and turning on is `true`. Here, we need to turn it on, so we can set this item to `true`, i.e., `setSmuOutput(true)`.
[0066] The `getSmuMeasValue(type, value)` command is used to collect the voltage value measured by the source meter. The `type` field indicates whether current or voltage needs to be collected. 0 represents voltage and 1 represents current. Here, we need to collect voltage, so this field is output as 0. The `value` field is the variable of the collected voltage value. The source meter can fill in the position of this field according to the collected value, as the second sampled value returned, i.e., `getSmuMeasValue(0, value)`.
[0067] The `peAdcADCReadVolt(isSysMode,range,group,volt)` instruction is used to acquire the voltage value measured by the ADC. The `isSysMode` field indicates whether the test circuit is in system mode. System mode refers to the calibration of devices in the test circuit. Here, the calibration ADC belongs to the test circuit part, so this field can be filled with `true`. Non-system mode refers to the on-board mode for calibrating the PE chip. If it is on-board mode, this field should be filled with `false`. `range` represents the current range, mainly used for current calibration. Here, the voltage is set to 0 by default. The `group` field indicates the number of the calibration ADC that needs to be calibrated. The `volt` field is the variable of the acquired voltage value. The calibration ADC end can fill in the position of this field according to the acquired value as the first sampled value to be returned, i.e., `peAdcADCReadVolt(true,0,0,volt)`.
[0068] Based on the data returned from the lower-level machine, determine whether the values of the 9 pre-set voltage points have been collected. If not, call the instruction to control the source meter to output the voltage of the next voltage potential, and continue measuring the next point until the voltage of all potentials has been collected.
[0069] Using the value acquired by the source table as a benchmark, the value acquired by the correction ADC is fitted, and the instruction peAdcADCAutoCali(group,range,measVolt,realVolt,arrayCount,saveFlag) is called to calculate a new calibration value. In this instruction, the group item represents the number of the correction ADC being processed, the range voltage is 0, the measVolt item represents the voltage array acquired by the correction ADC (i.e., all first sampled values), the realVolt item represents the voltage array acquired by the source table (i.e., all second sampled values), the arrayCount item represents the size of the electrical signal group, i.e., the number of electrical signal groups acquired, which is 9, and the saveFlag item indicates whether the calibration value needs to be saved to a file, true means save to a file, false means do not save, thus obtaining the instruction peAdcADCAutoCali(0,0,measVolt,realVolt,9,true).
[0070] The `setSmuOutput(on)` command is used to turn off the source table output. The `on` option indicates whether the output is turned off or on. Turning off is `false` and turning on is `true`. After obtaining 9 sets of data, the source table output can be turned off, i.e., `setSmuOutput(false)`.
[0071] The `connectToSmu(enable)` command is called to disconnect the external source table. The `enable` field indicates the connected or disconnected state. After calibration, the source table connection needs to be disconnected, i.e., `connectToSmu(false)`.
[0072] The above execution process can be as follows: Figure 7 As shown, Figure 7 This is a flowchart illustrating the calibration process of a correction ADC using only a source meter. After the calibration process begins, the source meter interface is connected, linking the internal calibration circuit to the external source meter. The pre-stored K and B values of the correction ADC (i.e., the calibration values of the correction ADC) are then reset to 1 and 0, respectively. After resetting, the source meter is set as a current source and its clamping voltage via a program in the lower-level machine. The calibration program is then set to voltage calibration mode in the system calibration, allowing the lower-level machine to execute the preset program. After these settings are completed, the calibration program is executed. It checks whether all voltage points set in the program have been acquired. If any voltage points have not been acquired, the source meter outputs the corresponding voltage value (i.e., the first test signal) at the corresponding voltage level, and the correction ADC acquires and records the value of the corresponding first test signal (i.e., the first sampled value). If all voltage points have been acquired, the calibration value of the correction ADC is calculated according to the calibration algorithm, and the obtained K and B values are stored to complete the calibration process and calibrate the correction ADC. After the calibration procedure is completed, the source table can be closed and the source table connection disconnected to complete the calibration process of the ADC.
[0073] In another embodiment provided in this disclosure, the test signal input terminal includes a test signal interface; the test feedback signal output terminal includes a correction ADC; the measurement link includes a second measurement link; by switching the conduction state of the relay array, a second measurement link is established between the correction ADC and the test signal interface for each corresponding resistor, passing through that resistor; and the test signal interface is connected to the source meter through an external signal channel. In step S101 above, "for each measurement link, turn on the measurement link, input a test signal through the test signal input terminal, let the test signal pass through the measurement link, and output a test feedback signal through the test feedback signal output terminal," can be implemented as follows: S101B. For each second measurement link, the second measurement link is turned on so that the second test signal generated by the source meter is transmitted to the correction ADC connected to the second measurement link through the second measurement link. In step S102 above, "calibrating the device under test in the measurement link based on the test feedback signal" can be implemented as follows: S102B: Based on the output electrical signal value obtained by the correction ADC and the corresponding second test signal value generated by the source meter, the calibration value of the second measurement link where each resistor is located is determined by a preset calibration algorithm. In this embodiment, calibration is mainly performed on the leakage current of different signal paths in the internal calibration circuit 2. In practical applications, different losses will occur when the signal passes through different signal paths in the internal calibration circuit 2. This causes a difference between the current collected by the correction ADC and the actual output current of the PE chip during the PE chip calibration process, reducing the accuracy of the PE chip calibration. Therefore, it is necessary to calibrate the paths through which the signal may pass in the internal calibration chip.
[0074] During the calibration process of the PE chip, the electrical signals output by the PE output channel with different values will be output to the internal calibration circuit 2 via the test signal interface 24, and then received by the correction ADC after passing through the resistor corresponding to the electrical signal value. Therefore, in the calibration process of this embodiment, it is necessary to calibrate the path from the correction ADC to the test signal interface 24 corresponding to each resistor in the internal calibration circuit 2. This path is the second measurement link.
[0075] For the calibration process of each second measurement link, the test signal interface 24 and the signal output terminal of the source meter can be connected through an external signal channel. This external signal channel can be implemented as a load board with multiple signal lines. One end of each signal line is connected to a test signal interface 24, and the other end is connected to the signal output terminal of the source meter. The second test signal output by the source meter can be output to the corresponding test signal interface 24 through the corresponding signal line. The calibration ADC obtains the value of the second test signal and, combined with the actual output value of the source meter, calibrates the second measurement link.
[0076] In another embodiment provided in this disclosure, step S202B above, "determining the calibration value of the second measurement link where each resistor is located by means of a preset calibration algorithm based on the output electrical signal value obtained by the correction ADC and the corresponding second test signal value generated by the source meter," can be implemented as follows: S202B1. For each resistor, the output electrical signal value collected by the correction ADC in the second measurement link of the resistor is sampled multiple times to obtain the third sample value, and the actual output value of the corresponding second test signal collected by the source meter is obtained. S202B2. Using the third sampled value as the abscissa and the actual output value as the ordinate, determine multiple second calibration points in the coordinate system. S202B3. The second calibration equation is obtained by fitting the second calibration point; wherein, the second calibration equation is a linear equation in two variables with the third sampled value as the independent variable and the actual output value as the dependent variable. S202B4. The correction coefficient in the second calibration equation is determined as the calibration value of the resistor in the second measurement link.
[0077] In this embodiment, the calibration of the second measurement link for each resistor can first be initiated by a control signal issued by a lower-level machine, which then controls the relay matrix of the main control chip 1 to activate the measurement link to be calibrated. Specifically, the main control chip 1 controls the I / O expansion chip to switch the relays between the test signal interface 24 and the resistor, as well as the relays between the resistor and the correction ADC, to the activated state, thereby activating the second measurement link.
[0078] Furthermore, the lower-level control unit outputs a predetermined second test signal from the source meter. This test signal passes through a resistor and is received by the correction ADC, which collects it as a third sample value. This sample value is then uploaded to the lower-level control unit via the main control chip 1. The actual output value of the source meter is also uploaded to the lower-level control unit. By executing the above process multiple times, multiple sets of electrical signal values can be obtained. When performing the above process for each resistor, the voltage value output by the source meter can be different each time. Assuming the resistance value in the second measurement link is 83.167Ω, in this disclosure, this resistance value can be used to calibrate the 60mA current output channel of the PE chip. To calibrate this channel, the output range of the source meter can be set to the 60mA current output range. The value of the second test signal output each time can be a current within 60mA, such as -3mA, -1mA, 0mA, 10mA, 20mA, 30mA, 40mA, 50mA, or 60mA, etc. The number of times the second test signal is output for each resistor can be set according to the actual situation. In order to ensure the normal progress of the test process and improve the accuracy of the test data, a typical value is to output the second test signal three times for each resistor.
[0079] After the lower-level computer acquires the third sampled value and the actual output value, multiple second calibration points can be obtained in a coordinate system using the third sampled value as the x-axis and the actual output value as the y-axis. By using the least squares method to fit these second calibration points, a system of two linear equations in two variables can be obtained; this system of equations is the second calibration equation. Furthermore, the slope and intercept of this system of two linear equations can be determined as correction coefficients for the second calibration equation, thereby obtaining the calibration value for the second measurement link containing the resistor.
[0080] The lower-level machine can transmit the calibration value to the main control chip 1, which stores it in a non-volatile storage space connected to the main control chip 1 for retrieval as needed.
[0081] After obtaining a calibration value for a second measurement link, the lower-level machine can continue to control the main control chip 1 to switch on another second measurement link and repeat the above process to determine a calibration value for each second measurement link where each resistor in the internal calibration circuit 2 is located.
[0082] Here is an example illustrating the process of calibrating the second measurement link described above.
[0083] When the second measurement link needs to be calibrated, the lower-level machine can first connect to the source table by calling the connectToSmu(enable, smu_type) instruction.
[0084] The `peSetAdcADCCalibArg(group, calType, k, b)` command is invoked to clear the original calibration values of the calibration ADC by resetting `k` and `b` to 1 and 0, respectively. Assuming the second measurement link to be calibrated is connected to the calibration ADC numbered 0, the `group` item is set to 0. The corresponding calibration type is set through the `calType` item. Calibrating the second measurement link requires calibration using current values, and current calibration is divided into different ranges based on the current range. Assuming there are five current ranges: 60mA, 1mA, 100uA, 10uA, and 2uA, with default numbers 0, 1, 2, 3, and 4, if testing the first 60mA range, the `calType` item must be set to 0, i.e., `peSetAdcADCCalibArg(0, 0, 1, 0)`.
[0085] The setSmuFuncMode(mode) instruction is called to set the source table to current source mode; where mode represents the mode, 0 represents current mode and 1 represents voltage mode, i.e. setSmuFuncMode(0).
[0086] The `setSmuOutput(on)` instruction enables the source table output. The `on` field indicates whether the output is turned off or on. Turning off is `false` and turning on is `true`, i.e., `setSmuOutput(true)`.
[0087] Based on the number of the third sampled values and the actual output values obtained, determine whether all current ranges that need to be calibrated have been calibrated. If not, continue to calibrate the next range.
[0088] The setSmuVClamp(volt) instruction is called to set the clamping voltage of the source table to avoid overvoltage. Here, the voltage item volt is usually set to 10V, i.e., setSmuVClamp(10).
[0089] The peDcCalStepModeSet(index) instruction is called to set the internal calibration current to the corresponding mode for calibrating the second measurement link. The index item indicates the mode to be set. Each mode can turn on a different second measurement link. Assuming that there are three sets of resistors in the calibration circuit, each set of resistors corresponds to a correction ADC. There are 5 resistors in each set of resistors that correspond to the five current levels of the PE chip output channel. The formula for calculating the index item is index=(group%3)*5+1. If it is a correction ADC with the number , the instruction is peDcCalStepModeSet(1).
[0090] The setSmuCurrRange(curr) instruction is called to set the current range of the source meter. Assuming there are 5 current ranges, namely 60mA, 1mA, 100uA, 10uA and 2uA, corresponding to the numbers 0, 1, 2, 3 and 4. If calibration is required at the 60mA range, the instruction is setSmuCurrRange(0).
[0091] Based on the number of the third sampled value and the actual output value, determine whether the values of the current points set for each gear have been collected. If not, continue to measure the next point.
[0092] The setSmuIsrc(curr) instruction is called to set the source table output current. Assuming that we have set a total of 9 points for the 60mA range, each value represents an output current value, such as -3, -1, 0, 10, 20, 30, 40, 50 and 60. The lower computer calls the instruction in sequence, that is, the first call is setSmuIsrc(-3), and so on.
[0093] The `getSmuMeasValue(type, value)` command is used to collect the current value measured by the source meter. The `type` field indicates whether current or voltage is being collected; 0 represents voltage and 1 represents current, i.e., `getSmuMeasValue(1, value)`.
[0094] The `peAdcADCReadVolt(isSysMode,range,group,volt)` instruction is used to acquire the voltage value measured by the calibration ADC. The `isSysMode` item indicates whether the current is in system mode. System mode is true, and on-board mode is false. Here, the current of the test circuit is being calibrated, which is system mode, so it is true. The `range` item indicates the current range, with 60mA corresponding to 0. The `group` item corresponds to the number of the calibration ADC whose data needs to be acquired. Therefore, the instruction is `peAdcADCReadVolt(true,0,0,volt)`.
[0095] After each acquisition and correction of the ADC, the number of sampled values returned should be checked to see if it corresponds to the number of current points set.
[0096] Once the current value measurement for that range is complete, the setSmuOutput(on) instruction is called to turn off the source table output. The on item indicates whether the output is turned off or on, false means off, and true means on, i.e., setSmuOutput(false).
[0097] After turning off the source table output, return to check whether the number of sampled values collected corresponds to the number of current ranges.
[0098] If the data acquisition for all gear positions is not completed, the next second measurement link can be switched on by calling the peDcCalStepModeSet(index) command to continue calibration.
[0099] Once the calibration of all second measurement links is complete, the connectToSmu(enable) command can be called to disconnect the source table. The enable option indicates whether the source table is connected or disconnected, i.e., connectToSmu(false).
[0100] The above execution process can be as follows: Figure 8 As shown, Figure 8 This diagram illustrates the process of calibrating the leakage current of a measurement link using a source meter. As shown, after the calibration process begins, the source meter's output is first connected to the internal calibration circuit via a load board, and the pre-stored calibration values K and B are cleared. The lower-level computer is then programmed to set the source meter as a current source and enable its output function. It checks if all set current ranges have been tested. If any current ranges are not tested, a corresponding clamping voltage is set for the source meter, and the lower-level computer sets the test circuit to enter the corresponding system calibration current calibration mode. After completing the above program settings, the calibration program is executed, causing the source meter to output the set current point within that current range. The calibration program then checks if all current ranges have been tested and acquired. If not, the source meter outputs the corresponding current value (the second test signal), and the actual output of the source meter (the actual output value) and the value acquired by the correction ADC (the third sampled value) are recorded. If all current points have been acquired, the source meter's output at that current range is stopped, and the process moves to the next current range. Once all current points for all current ranges have been collected, the source meter can be disconnected to end the calibration process.
[0101] In another embodiment provided in this disclosure, the test signal input terminal includes the input terminal of the source meter; the test feedback signal output terminal includes the output terminal of the source meter; the measurement link includes a third measurement link; by switching the conduction state of the relay array, corresponding third measurement links are established between the output terminal of the source meter, the resistor under test, and the input terminal of the source meter, respectively; In step S101 above, "for each measurement link, turn on the measurement link, input a test signal through the test signal input terminal, let the test signal pass through the measurement link, and output a test feedback signal through the test feedback signal output terminal," can be implemented as follows: S101C. For each third measurement link, the third measurement link is turned on so that the third test signal generated by the source meter for the resistor under test in the third measurement link passes through the third measurement link and the electrical signal fed back by the third measurement link is received through the input terminal of the source meter. In step S102 above, "calibrating the device under test in the measurement link based on the test feedback signal" can be implemented as follows: S102C1. Determine the measured resistance value of the resistor to be measured in the third measurement link based on the third test signal corresponding to the third measurement link and the feedback electrical signal. S102C2. Determine the deviation of the resistance value of the resistor under test based on the deviation between the measured resistance value and the corresponding ideal resistance value.
[0102] In this embodiment, since the resistors in the internal calibration circuit 2 may have inaccurate resistance values due to factors such as process deviations during manufacturing, it is necessary to measure the resistance value of each resistor in the circuit to determine whether the deviation of the resistance value can meet the accuracy requirements.
[0103] In this process, a third measurement link can be established for each resistor. This third measurement link is a signal path between the source meter interface 25 and the resistor under test. The lower-level computer sends a control signal to the main control chip 1, which then controls the I / O expansion chip to control the relay between each resistor and the source meter interface 25, putting it into the conducting state, thereby activating the third measurement link corresponding to that resistor.
[0104] The third test signal is output from the source meter's output terminal, enters the internal calibration current through the input interface of the source meter interface 25, and then passes through the resistor under test. The signal is then transmitted back to the source meter's input terminal through the output interface of the source meter interface 25. Based on the third test signal and the feedback electrical signal, the source meter can calculate the measured resistance value. It should be noted that the form of the third measurement link and the method of measuring the resistance value differ for different resistors.
[0105] Specifically, for resistors with low resistance values, a four-wire testing method can be used. The source meter's HI port is connected to one end of the resistor via an input interface of the source meter interface 25 in the internal calibration circuit 2. The source meter's LO interface is connected to a common ground point in the internal calibration circuit 2 via an output interface of the source meter interface 25. The source meter's SenseHI port is connected to the end of the resistor connected to the HI port via another input interface of the source meter interface 25. The source meter's Sense LO port is connected to the ground terminal (the other end of the resistor) of the resistor via another output interface of the source meter interface 25. During calibration, the lower-level computer controls the source meter to output a third test signal, which is input to the internal calibration circuit via the HI interface. This third test signal can be a current signal, the value of which can be matched to the value of the resistor under test. For example, if the resistance of the resistor under test is 83.389Ω, the third test signal can be a 30mA current, which can form a loop through the HI port and the LO port.
[0106] At this point, the Sense HI and Sense LO ports can measure the voltage difference applied across the resistor. Using the feedback voltage difference and the output current value, the measured resistance can be calculated using Ohm's law. Because the input impedance between the Sense HI and Sense LO ports is very high, the path between them will not shunt the current output from the HI port, thus reducing the error caused by line resistance and allowing for the measurement of resistors with smaller resistance values.
[0107] For resistors with large resistance values, the effect of line resistance can be ignored, and a two-wire method can be used for measurement. Specifically, the HI port of the source meter is connected to one end of the resistor through an input interface of the source meter interface 25 in the internal calibration circuit 2; the LO port of the source meter is connected to a common ground point in the internal calibration circuit 2 through an output interface of the source meter interface 25. During calibration, the lower-level computer controls the source meter to output a third test signal through the HI interface. For example, if the resistance of the resistor under test is 500KΩ, the third test signal can be a 5uA current.
[0108] After determining the measured resistance value of each resistor, this value can be compared with the ideal resistance value of the resistor. The deviation of the resistance value is determined by the ratio of the difference between the two to the ideal resistance value.
[0109] Assuming the measured resistance is 83.389Ω, we can further subtract the predetermined resistance of the wires between the source meter and its interface (25Ω) to obtain the resistance value. The ideal resistance value of this resistor is 83.167Ω, so the deviation of the resistance value can be calculated as follows: 0.0144%. This indicates that the resistor deviation is small and can be used in subsequent calibration processes. If the measured resistance deviation is too large, the circuit needs to be adjusted or the components replaced.
[0110] The calibration method for the test circuit provided in this disclosure also includes the following steps: Step 1: Establish a verification equation based on the calibration value, verify the calibrated object, and determine the percentage error corresponding to the calibration value based on the verification result. Step 2: Compare the error percentage with the first threshold. If the error percentage is less than the first threshold, the calibration object is determined to have passed calibration.
[0111] In this embodiment of the disclosure, after determining the calibration value, it is also necessary to verify the calibration value to determine whether calibration using the calibration value can meet the accuracy requirements.
[0112] The first threshold can be set to 100%, and the deviation after calibration can meet the corresponding accuracy requirements. The value of the first threshold can be adjusted according to actual needs to adapt to different calibration accuracy requirements.
[0113] In another embodiment provided in this disclosure, step 1 above, "establishing a verification equation based on the calibration value, verifying the calibrated object, and determining the error percentage corresponding to the calibration value based on the verification result," can be implemented as follows: Step 1: Establish a two-variable linear equation with the output electrical signal of the correction ADC as the independent variable, the calculated electrical signal value as the dependent variable, and the calibration value as the coefficient. Step 2: Input the output electrical signal value obtained by the correction ADC into the two-variable linear equation to determine the corresponding calculated electrical signal value; Step 3: Based on the electrical signal deviation between the calculated electrical signal value and the target electrical signal value, determine the ratio of the electrical signal deviation value to the preset maximum permissible error, and define the ratio as the error percentage corresponding to the calibration value.
[0114] In this embodiment, it is assumed that the above-described DA circuit outputs a test electrical signal, and the calibration ADC and source meter respectively acquire the values of the test electrical signal for calibration. Then, during the calibration process of the calibration ADC, it is assumed that the voltage values (first sample values) acquired by the main control chip 1 from the calibration ADC are respectively... , , and The voltage values (second sample values) collected by the source meter are respectively , , and .
[0115] Using the first sampled value as the x-axis and the second sampled value as the y-axis, four points can be obtained from these voltage values, namely... , , and By performing a linear fit on these four points using the least squares method, we can obtain the k and b values, which are the slope and intercept of the two linear equations in two variables. These k and b values are shown in Table 1 below.
[0116]
[0117] Table 1. Schematic diagram of ADC calibration data. This data can be stored in the corresponding storage space through the main control chip 1. After each calibration ADC of the test circuit has determined a calibration value (i.e., k value and b value), the calibration value can be verified.
[0118] First, the calibration value of the ADC to be calibrated is extracted from the storage space, and the calibration equation is established. .in, This represents the number of the ADC to be verified and corrected. and This is the calibration value for the corrected ADC; This is the calculated value of the voltage. The voltage value is the one acquired by the voltage correction ADC. This represents the number of times the verification was performed.
[0119] Furthermore, the main control chip controls the output electrical signal of the DA circuit, which is acquired by the correction ADC and the source meter, respectively. Assume the set value of the DA circuit output is 8V; the source meter acquires... The value is 7.9864V, which is used as the target value for the electrical signal; this is used to correct the value acquired by the ADC. The voltage is 7.98587V. The calculated voltage value can be obtained from the verification equation. The value is 7.98886V. Assuming the required accuracy of this corrected ADC is 0.1% ± 1mV, the maximum permissible error is... The calculated value is 8.9864mV.
[0120] Furthermore, the deviation between the calculated electrical signal value and the target value can be obtained. The value is 0.00246V, and the ratio of this value to the maximum permissible error (i.e., the percentage of error) is 27.37%. This indicates that after calibration with this value, the measurement deviation of the ADC is corrected to 27.37% of the maximum permissible error, which meets the accuracy requirements.
[0121] If the error percentage is greater than 100%, it indicates that the measurement deviation of the calibrated ADC exceeds the maximum permissible error, meaning the calibration has failed and the calibrated ADC needs to be recalibrated. If the calibration still fails after multiple attempts, the actual circuit condition needs to be checked, and the circuit adjusted or components replaced.
[0122] Similarly, during the calibration process of the second measurement link, assuming that the current value (third sample value) acquired by the main control chip 1 from the correction ADC is respectively , , and The actual output values of the source meter output current are respectively , , and The calibration value of each second measurement circuit can be obtained by fitting using the least squares method.
[0123] This allows for verification of the calibration values of each second measurement link. For example, if the source meter's output current is set to 30mA, the current measured by the calibration ADC is 29.9996mA, and the actual output current of the source meter is 30.0005mA, the required range accuracy for this current value is... The maximum permissible error is The deviation value of the electrical signal is The error percentage is The calibration value of the second measurement link has been verified.
[0124] This disclosure also provides a test device, including: a test circuit as described in any of the above embodiments, and / or a calibration method for performing the test circuit as described in any of the above embodiments.
[0125] Through the above description of the embodiments, those skilled in the art can clearly understand that the embodiments of this disclosure can be implemented in hardware or by means of software plus necessary general-purpose hardware platforms. Based on this understanding, the technical solutions of the embodiments of this disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, mobile hard drive, etc.) and includes several instructions to cause a computer device (such as a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments of this disclosure.
[0126] Those skilled in the art will understand that the accompanying drawings are merely schematic diagrams of a preferred embodiment, and the modules or processes in the drawings are not necessarily essential for implementing this disclosure.
[0127] Those skilled in the art will understand that the modules in the apparatus of the embodiments can be distributed in the apparatus of the embodiments as described in the embodiments, or they can be located in one or more devices different from this embodiment with corresponding changes. The modules of the above embodiments can be combined into one module, or they can be further divided into multiple sub-modules.
[0128] The sequence numbers of the embodiments disclosed above are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.
[0129] Obviously, those skilled in the art can make various modifications and variations to this disclosure without departing from its spirit and scope. Therefore, if such modifications and variations fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include such modifications and variations.
Claims
1. A test circuit, characterized in that, include: Main control chip and internal calibration circuit; The internal calibration circuit includes: a resistor with a preset resistance value, a relay array, and a correction ADC; The main control chip is used to control the relay array according to the received control signal to activate the measurement link in the internal calibration circuit corresponding to the control signal; The internal calibration circuit is used to receive the test electrical signal, output it to the corresponding correction ADC through the measurement link, and acquire the value of the output electrical signal through the correction ADC.
2. The circuit as described in claim 1, characterized in that, The internal calibration circuit is also provided with a test signal interface for connecting to an external signal channel, and / or a source meter interface for connecting to a source meter; The relays in the relay array are respectively set at the preset connection nodes between the resistor, the test signal interface, the source meter interface and the correction ADC, and are used to switch the conduction relationship according to the control command of the main control chip to establish a measurement link between the preset nodes in the test signal interface, the resistor, the source meter and the correction ADC. The source meter interface is used to receive the test electrical signal output by the source meter and input it into the measurement link; and to receive the feedback electrical signal output by the measured measurement link. The test signal interface is used to receive the test electrical signal transmitted by the external signal channel and input the measurement link being measured. The correction ADC is used to acquire the output electrical signal at the end of the measurement link measured by the test signal interface, and transmit the output electrical signal to the main control chip.
3. The circuit as described in claim 2, characterized in that, The resistors with preset resistance values are divided into a preset number of groups, and the resistance value in each group is determined according to the range of the test electrical signal. One end of the resistor is connected to a first common connection point and a second common connection point. The first common connection point is connected to the test signal interface side and the source meter interface side, respectively. The second common connection point is connected to the source meter interface side and the correction ADC side, respectively. The other end of the resistor is connected to the third common connection point and the ground point, respectively, and the third common connection point is connected to the source meter interface side.
4. A calibration method for a test circuit, characterized in that, Based on the internal calibration circuit described in any one of claims 1-3, a measurement link is established between the test signal input terminal and the test feedback signal output terminal by switching the conduction state of the relay array; The method includes: For each measurement link, the measurement link is turned on, a test signal is input through the test signal input terminal, the test signal passes through the measurement link, and a test feedback signal is output through the test feedback signal output terminal. Based on the test feedback signal, the device under test in the measurement link is calibrated.
5. The method as described in claim 4, characterized in that, The test signal input terminal includes a source meter interface; the test feedback signal output terminal includes a correction ADC; the measurement link includes a first measurement link; by switching the conduction state of the relay array, corresponding first measurement links are established between the correction ADC and the source meter interface respectively; and the output terminals of the first measurement links are all connected to the source meter interface. For each measurement link, the measurement link is turned on, a test signal is input through the test signal input terminal, the test signal passes through the measurement link, and a test feedback signal is output through the test feedback signal output terminal, including: For each first measurement link, the first measurement link is turned on so that the first test signal generated by the source meter is transmitted through the first measurement link to the correction ADC connected to the first measurement link; Based on the test feedback signal, the device under test in the measurement link is calibrated, including: Based on the output electrical signal value obtained by the correction ADC and the corresponding electrical signal value actually output by the source meter, the calibration value corresponding to the correction ADC is determined by a preset calibration algorithm.
6. The method as described in claim 5, characterized in that, The step of determining the calibration value corresponding to the ADC based on the output electrical signal value obtained by the ADC and the corresponding electrical signal value actually output by the source meter, through a preset calibration algorithm, includes: The output electrical signal value corresponding to the first test signal acquired by the correction ADC is sampled multiple times to obtain the first sampled value, and the corresponding electrical signal value actually output by the source meter is sampled to obtain the second sampled value. Using the first sampled value as the abscissa and the second sampled value as the ordinate, multiple first calibration points are determined in the coordinate system; The first calibration equation is obtained by fitting the first calibration point; wherein the first calibration equation is a linear equation in two variables with the first sample value as the independent variable and the second sample value as the dependent variable. The correction coefficient in the first calibration equation is determined as the calibration value for the ADC.
7. The method as described in claim 4, characterized in that, The test signal input terminal includes a test signal interface; the test feedback signal output terminal includes a correction ADC; the measurement link includes a second measurement link; by switching the conduction state of the relay array, a second measurement link is established for each corresponding resistor between the correction ADC and the test signal interface, passing through that resistor; and the test signal interface is connected to the source meter through an external signal channel. For each measurement link, the measurement link is turned on, a test signal is input through the test signal input terminal, the test signal passes through the measurement link, and a test feedback signal is output through the test feedback signal output terminal, including: For each second measurement link, the second measurement link is turned on, so that the second test signal generated by the source table passes through the second measurement link and is transmitted to the correction ADC connected to the second measurement link respectively; Based on the test feedback signal, the device under test in the measurement link is calibrated, including: Based on the output electrical signal value obtained by the correction ADC and the corresponding second test signal value generated by the source meter, the calibration value of the second measurement link where each resistor is located is determined by a preset calibration algorithm.
8. The method as described in claim 7, characterized in that, The step of determining the calibration value of each resistor in the second measurement link based on the output electrical signal value obtained by each correction ADC and the corresponding second test signal value generated by the source meter, using a preset calibration algorithm, includes: For each resistor, the output electrical signal value acquired by the correction ADC in the second measurement link of that resistor is sampled multiple times to obtain the third sampled value, and the actual output value of the corresponding second test signal acquired by the source meter is obtained. Using the third sampled value as the abscissa and the actual output value as the ordinate, multiple second calibration points are determined in the coordinate system. The second calibration equation is obtained by fitting the second calibration point; wherein, the second calibration equation is a linear equation in two variables with the third sampled value as the independent variable and the actual output value as the dependent variable. The correction factor in the second calibration equation is determined as the calibration value of the resistor in the second measurement link.
9. The method as described in claim 4, characterized in that, The test signal input terminal includes the input terminal of the source meter; the test feedback signal output terminal includes the output terminal of the source meter; the measurement link includes a third measurement link; by switching the conduction state of the relay array, corresponding third measurement links are established between the output terminal of the source meter, the resistor under test, and the input terminal of the source meter respectively; For each measurement link, the measurement link is turned on, a test signal is input through the test signal input terminal, the test signal passes through the measurement link, and a test feedback signal is output through the test feedback signal output terminal, including: For each third measurement link, the third measurement link is turned on so that the third test signal generated by the source meter for the resistor under test in the third measurement link passes through the third measurement link, and the electrical signal fed back by the third measurement link is received through the input terminal of the source meter. Based on the test feedback signal, the device under test in the measurement link is calibrated, including: Based on the third test signal corresponding to the third measurement link and the feedback electrical signal, determine the measured resistance value of the resistor to be measured in the third measurement link; The deviation of the resistance value of the resistor under test is determined based on the deviation between the measured resistance value and the corresponding ideal resistance value.
10. The method according to any one of claims 5-8, characterized in that, Also includes: A verification equation is established based on the calibration value, the calibrated object is verified, and the percentage of error corresponding to the calibration value is determined based on the verification result. The error percentage is compared with a first threshold. If the error percentage is less than the first threshold, the calibration object is determined to have passed calibration.
11. The method as described in claim 10, characterized in that, A verification equation is established based on the calibration value. The calibrated object is then verified, and the percentage of error corresponding to the calibration value is determined based on the verification result, including: A two-variable linear equation is established with the output electrical signal of the correction ADC as the independent variable, the calculated electrical signal value as the dependent variable, and the calibration value as the coefficient. The output electrical signal value obtained by the correction ADC is input into the binary linear equation to determine the corresponding calculated electrical signal value. Based on the electrical signal deviation between the calculated electrical signal value and the target electrical signal value, the ratio of the electrical signal deviation value to the preset maximum permissible error is determined, and the ratio is determined as the error percentage corresponding to the calibration value.
12. A testing device, characterized in that, include: The test circuit as described in any one of claims 1-3, and / or the calibration method of the test circuit as described in any one of claims 4-11.