3390results about "Faulty hardware testing methods" patented technology

A method and system for providing diagnostic services for a computer system is provided. The diagnostic application presents to the user of the computer system a graphical representation of a computer system (202). The user is able to click on graphical components of the graphical representation. The diagnostic application performs diagnostic services on the particular component clicked on by the user. The diagnostic application may determine if the most recent version of the appropriate software driver is installed in the computer system. The diagnostic application may perform diagnostic tests on the clicked component. The diagnostic application may also permit the user to access online diagnostic services to permit the user to access the most recent version of the applicable software driver, communicate with a diagnostic support specialist, or receive additional diagnostic tools from a location remote from the computer system.

Test data model and test data structure creation improvements are disclosed for enterprise test data management systems in the test, measurement and automation environment. A hierarchical test data model for a plurality of test systems includes hierarchical data objects configured to store test data related information. In addition, one or more data objects within the test data model are linked such that data entered into one object can be used by another object or can be automatically propagated to linked objects. And default data object properties are defined such that each new data object includes the default properties. Still further, a graphical user interface (GUI) can be provided through which information can be input to the database where the GUI includes a first frame showing a structure for the hierarchical test data model and a second frame automatically showing one or more data input fields related to an object selected within the first frame. Related systems and methods are also disclosed.

A system and method for providing an extensibility model to create device simulators. The system and method provide a generalized framework for the simulation of hardware devices controlled by software drivers with user and kernel mode programmability. The present invention also provides a framework that facilitates communication between applications operating user address space of an operating system and device drivers and device simulators operating in kernel mode address space of the operating system. In one embodiment, a framework provides a bi-directional communication channel that allows a test application in user address space of an operating system to communicate with a computer component operating in kernel address space of the operating system.

System and method for specifying a signal analysis function. First user input is received, e.g., to a graphical user interface (GUI), indicating a parameter for a first operation implementing at least a portion of the function. The first operation is programmatically included in a sweep loop. Second user input is received specifying a sweep configuration for a sweep on the parameter. The signal includes signal data, e.g., signal plot data or tabular data. The sweep configuration includes: a range of values for the indicated parameter, a number of iterations for the sweep, an interpolation type, step size for the sweep on the indicated parameter, specific values in the range of values for the parameter, source for at least some of the sweep configuration, and / or resultant data. The sweep is performed on the parameter per the sweep configuration, generating resultant data which is stored, and optionally displayed, e.g., in the GUI.

System and method for displaying signals. First user input requesting display of a first signal is received, e.g., to a graphical user interface (GUI) comprised in a signal analysis function development environment, and the first signal programmatically analyzed in response to the first user input. A display tool operable to display the first signal is programmatically determined based on said analyzing, and the first signal displayed in the display tool, e.g., a data type of the first signal is determined, e.g., integer, floating point, Boolean, or user-defined data in a time-domain, frequency-domain, or spatial-domain, and the display tool programmatically determined based on the determined data type, e.g., via a loop-up table, where the display tool comprises an indicator operable to display the signal data. The signal comprises signal data, e.g., signal plot data, where the display tool comprises a graph, or tabular data, where the display tool comprises a table.

System and method implementing function blocks for specifying and performing a signal analysis function utilizing multiple instruments, including two or more virtual instruments (VIs). Each function block includes: a function block icon for display in a graphical user interface (GUI) of a signal analysis function development environment, that visually indicates a respective signal operation; and associated program instructions executable to perform the respective operation. Each function block is selectable from the function blocks by a user for inclusion in a set of function blocks, each operable to perform their respective signal operation continuously upon selection, and to provide a respective output, operable to be displayed in the GUI, provided as input to other function blocks, and / or exported to an external device. The set of function blocks is executable to perform the signal analysis function under the signal analysis function development environment using one or more of the multiple instruments.

A system and method for providing an extensibility model to create device simulators. The system and method provide a generalized framework for the simulation of hardware devices controlled by software drivers with user and kernel mode programmability. The present invention also provides a framework that facilitates communication between applications operating user address space of an operating system and device drivers and device simulators operating in kernel mode address space of the operating system. In one embodiment, a framework provides a bi-directional communication channel that allows a test application in user address space of an operating system to communicate with a computer component operating in kernel address space of the operating system.

An apparatus and method is provided for efficiently determining the source of problems in a complex system based on observable events. By splitting the problem identification process into two separate activities of (1) generating efficient codes for problem identification and (2) decoding the problems at runtime, the efficiency of the problem identification process is significantly increased. Various embodiments of the invention contemplate creating a causality matrix which relates observable symptoms to likely problems in the system, reducing the causality matrix into a minimal codebook by eliminating redundant or unnecessary information, monitoring the observable symptoms, and decoding problems by comparing the observable symptoms against the minimal codebook using various best-fit approaches. The minimal codebook also identifies those observable symptoms for which the greatest benefit will be gained if they were monitored as compared to others.By defining a distance measure between symptoms and codes in the codebook, the invention can tolerate a loss of symptoms or spurious symptoms without failure. Changing the radius of the codebook allows the ambiguity of problem identification to be adjusted easily. The invention also allows probabilistic and temporal correlations to be monitored. Due to the degree of data reduction prior to runtime, extremely large and complex systems involving many observable events can be efficiently monitored with much smaller computing resources than would otherwise be possible.

Diagnostic methods and systems for electronic devices are disclosed. Separate dedicated diagnostic software code and operating code are respectively executed in a diagnostic mode and an operating mode of an electronic device. A determination may be made as to whether the electronic device is to be operated in the diagnostic mode or the operating mode when the electronic device is started, for example. A transition to the diagnostic mode from the operating mode may also be made in response to errors detected by online diagnostic tests performed in the operating mode. Results of diagnostic tests are preferably stored in a non-volatile memory for subsequent access, independent of the operating software code.

System and method for specifying a signal analysis function. User input is received specifying a first operation implementing at least a portion of a signal analysis function. Prior operations input by the user are programmatically analyzed to determine and assign an input source for the first operation that provides a first input signal, e.g., based on inputs and their signal or data types required for the first operation, one or more prior operations are determined that provide respective output signals of the respective signal or data types, where the one or more prior operations comprise the input source, and where the respective output signals comprise the first input signal. The first operation is performed on the first input signal, producing an output signal which is then displayed on a display. The programmatically analyzing, performing, and displaying are performed for each of a plurality of first operations input by the user.

The invention discloses a chip software and hardware simulation environment based on the UVM and the FPGA. The simulation environment comprises an FPGA verification platform, a UVM verification platform and an IP standard model. The IP standard model is connected with the FPGA verification platform, and the FPGA is driven to perform simulation verification and sends the FPGA verification result as scene environment configuration to the UVM verification platform. The UVM verification platform is connected with the IP standard model and calls an algorithm in the IP standard model to perform UVM simulation verification to the FPGA verification result. According to the chip software and hardware simulation environment based on the UVM and the FPGA, the IP standard model is connected with the FPGA verification platform and the UVM verification platform, and the software and hardware simulation environment which performs FPGA verification and UVM verification simultaneously is prepared. The FPGA verification focuses on the chip application layer and completes verification of a chip code to a lot of random excitation scenes; the UVM verification focuses on the chip bottom layer and performs further verification to the FPGA verification result by directly calling the algorithm in the IP standard model; the two kinds of verification are mutually matched, the verification period of the chip is accelerated, and the chip verification quality is improved.

The embodiment of the invention provides a jam measuring method comprising the following steps of acquiring data of all pixel points on a terminal screen of an operation application program in real time, recording a current time stamp when data of any pixel point on the acquired terminal screen changes compared with data of the previous time, so a time stamp sequence can be acquired; converting the time stamp sequence into a jam delayed sequence, calculating a jam point number according to the jam delayed sequence and acquiring refreshing time of the terminal screen data based on the time stamp sequence. Each jam delayed time of the jam delayed sequence is a differential value of two adjacent time stamps in the time stamp sequence; and the jam point number is a number that the jam delayed data is larger than a threshold value in the jam delayed sequence. The invention further provides a jam measuring device, a terminal, a game jam measuring method and an apparatus.

A method, apparatus, article of manufacture, and system are provided for detecting hardware faults on a multi-core integrated circuit device by executing runtime software-based self-test code concurrently on multiple processor cores to generate a first set of self-test results from a first processor core and a second set of self-test results from a second processor core; performing mutual inter-core checking of the self-test results by using the first processor core to check the second set of self-test results from the second processor core while simultaneously using the second processor core to check the first set of self-test results from the first processor core; and then using the second processor core to immediately execute a recovery mechanism for the first processor core if comparison of the first set of self-test results against reference test results indicates there is a hardware failure at the first processor core.

A method for regression and verification of hardware, network, and / or software technology platforms to deliver acceptance status details. This method variously prepares instructions and components to support unique business customer environments and manages the regression verification of these environments. Errors, deviations, and recommendations for improvement, with full regression capabilities, are reported to the business user customer in a non-technical business format they can select and customize to receive acceptance status management reporting information.

A high level interface between a remote computer and local computer operator permits the remote computer to be controlled via a sequence of interactions. The remote computer may be monitored for display information which is expected, and also controlled in the event the expected information either is or is not obtained. Command language extensions are provided which extend and complement a basic scripting language. Scripts with embedded command language extensions may be executed through a remote interface, permitting remote testing, operation and evaluation. The development of the scripts, including embedded command language extensions, may be prepared through execution of commands at the local computer on a depiction of the GUI received from the remote computer, and subsequently saved as a script.

The invention relates to an interface test method and device, computer equipment and a storage medium. The method comprises the steps of obtaining test case configuration information; searching a testcase library for test case generation information, test case templates and interface communication parameters according to test case identifications in the test case configuration information; generating test cases corresponding to the test case identifications according to the test case generation information and the test case templates; testing to-be-tested interfaces corresponding to to-be-tested interface addresses in the test cases according to the test cases and the interface communication parameters. In the whole test process, the test cases used for testing the to-be-tested interfacesare automatically generated according to the test case generation information and the test case templates, the time consumed for compiling the test cases is saved, the normal communication with the to-be-tested interfaces can be ensured according to the interface communication parameters, the success rate of testing the to-be-tested interfaces is ensured, and the efficiency of testing the interfaces is further improved.

The invention provides a product test method and a terminal thereof. The product test method and the terminal thereof are applicable to the technical field of product management. The method comprisesthe steps of receiving a test instruction for a product and extracting a product identifier of the product from the test instruction; on the basis of a test case template in a test case database, obtaining test case instances matched with the product identifier; determining a test project according to the product type of the product; calculating a matching coefficient of each test case instance and the test project separately according to test parameters of each test case instance; if the matching coefficient of each test case instance is greater than a preset matching threshold value, identifying the test case instance as an associated use case of the test project; generating a test script based on all the associated use cases of the test project. According to the product test method andthe terminal thereof, the problem that test projects can be automatically associated with test case instances in existing product test methods is solved, the accuracy of product tests is improved correspondingly, and the occurrence of missed selection of the test cases is avoided.

The present invention discloses an automation testing method and system. The method comprises: a primary test server aquires a test version and a test script from a control storage server, and acquires a test plan from a test case management system; the primary test server, according to the test version, determines a to-be-tested terminal and a to-be-tested program, and according to the test plan, executes the corresponding test script to the to-be-tested terminal, and acquires a test result; the primary test server performs processing to the test result so as to obtain a final test result, and send the final test result to the test case management system; and the test case management system receives the final test result and outputs the final test result or according to the final test result, adjusts the test plan. By adopting the scheme, a test function can be automatically executed by a terminal, so that the consumed time of a developer to manually execute a test is shortened, a large amount of manpower is saved, and the test efficiency is improved.

A data storing system performs a test operation on a memory block on which a read operation is determined to be failed, and determines whether the memory block is or is not a bad block based on a result of the test operation. The data storing system may improve reliability and yield of a device.

The invention discloses a method and device for fault prediction of a disk. The method comprises the steps that disk monitoring technologies are used to acquire sample disk data of the disk, wherein the sample disk data contains sample data of multiple dimensions; a GBDT algorithm is used for sample training of the sample disk data, so a disk prediction model composed of multiple decision-making trees can be obtained; and after receiving of disk data of a to-be-predicted disk, the disk prediction model composed of the multiple decision-making trees can be used to process disk data of a to-be-detected disk, and whether the to-be-detected disk is a disk with faults can be determined. According to the invention, the technical problem in the prior art that prediction results are inaccurate because some factors which can easily lead to hard disk faults in a hard disk fault prediction system could not be collected or quantified, can be solved.

The invention provides a method and a device for detecting a failure after dropping. The method comprises the following steps of: acquiring dropping state information of a terminal; acquiring a set of hardware which possibly has a breakdown according to the dropping state information; detecting each piece of hardware in the set to screen out broken-down hardware; and generating prompt information according to the broken-down hardware and corresponding breakdown information. The method provided by the invention has an effect that real-time repair of the broken-down hardware is facilitated, and meanwhile, the hardware which possibly has a breakdown is found through the dropping state information, so that a hardware detection range can be narrowed, the detection efficiency can be improved, and the power consumption can be reduced.

The invention provides a fault location method and a server, relates to the technical field of computers, and used for quickly and accurately locating faults when CATERR (Catastrophic Error) or IERR (Internal Error) type faults occur. The fault location method comprises the following steps: detecting a fault notification message; indicating that deadly hanging type faults have occurred by the fault notification message; acquiring wrong data, and determining timeout errors corresponding to the deadly hanging type faults in the wrong data; reading wrong addresses in address registers of the timeout errors; matching the wrong addresses with an address space pre-stored in a PCIe (Peripheral Component Interface Express) equipment address space table; and if the address space matched with the wrong address exists in the PCIe equipment address space table, then determining PCIe equipment corresponding to the address space is a fault source which causes the deadly hanging type faults.

The invention discloses a pressure testing method and device and a readable medium, and relates to the technical field of communication. The method comprises the following steps: determining a pressure measurement server; guiding first flow to the pressure measurement server; acquiring performance data of the pressure measurement server from a unified monitoring platform, wherein the unified monitoring platform is used for collecting performance data of at least one application server, and the at least one application server comprises the pressure measurement server; and when the performance data reaches a bottleneck value, acquiring a pressure testing result according to the performance data. By arrangement of the unified monitoring platform, the performance data of the application servers are acquired in real time, the testing server can directly acquire the performance data of the application servers from the unified monitoring platform, complicated steps of needing to receive the performance data from the different application servers after a performance data acquiring request is transmitted to the different application servers when the testing server tests the different application servers are avoided, and only the corresponding performance data need to be acquired in a unified manner from the unified monitoring platform.

The invention discloses a method and device for fault prediction of a disk. The method comprises the steps that sample disk data of the disk is acquired by a disk monitoring technology, wherein the sample disk data contains sample data of multiple dimensions; the Bucketing technology is used for binning processing of the sample disk data and is used to classify the sample disk data; an Owlqn model is used for sample training of the classified sample disk data, so a disk prediction model is obtained; and after receiving of disk data of a to-be-detected disk, the disk prediction model can be used to process the disk data of the to-be-detected disk, and whether the to-be-detected disk is disk with faults can be determined. According to the invention, the technical problem in the prior art that prediction results are inaccurate because some factors which can easily lead to hard disk faults in a hard disk fault prediction system could not be collected or quantified, can be solved.

The embodiment of the invention discloses a pressure testing method, device and system. A pressure measuring task can be obtained, an object needing pressure testing currently is determined according to the pressure measuring task to obtain a target object, present network flow is guided to the target object in a preset time period, various property indexes of the target object are collected, a pressure measuring result is calculated when the property indexes reach a preset bottleneck value, and then the operation of obtaining the pressure measuring task is repeated till testing of the pressure measuring task is completed. The method is easy to implement and high in adaptability, and the comprehensiveness and accuracy of testing can be greatly improved.

An apparatus having a proactive systemic scheduler connected with a network testing system. The scheduler receives a list of tests to be run on the network test system during a testing interval, as well as available test baseline information for the tests to be run. Using a predetermined algorithm, the list of the tests, and the available test baseline information, the scheduler automatically creates a plurality of testing schedules, such that a given test object cannot be simultaneously allocated to more than one test. Each of the plurality of schedules indicates test object allocation for the testing interval. Next, the scheduler selects one of the plurality of testing schedules based on reducing an overlap of test object allocation for the testing interval. The scheduler then communicates the selected testing schedule to be implemented by the network test system.

The invention discloses a distributed automated testing method and system. The method comprises the steps that a server detects whether a test task which is created and sent at the Web front end and comprises at least one test case exists in a database or not according to an assignment period, and if yes, the test task and test task information corresponding to the test task are obtained; whether a client of which the environmental state is idle exists in clients connected with the server or not is detected, and if yes, the specified number of the test cases are sent to each client of which the environmental state is idle; the test cases are received by the clients, after the environmental states of the clients are set to be non-idle, a pre-installed test program is started to conduct testing on the test cases, after testing is completed, the environmental states are set to be idle, and the test results are fed back to the database. According to the distributed automated testing method and system, the test cases are assigned to multiple clients, automated testing is conducted simultaneously, the time for testing multiple test cases is shortened, and the testing efficiency is improved.

A testbench for testing a device under test (DUT), wherein the testbench has a verification environment including a reference model, a scoreboard and a customized agent for each interface that the DUT needs to receive input from and / or transmit output on. The testbench system is able to be generated by a testbench builder that automatically creates a scoreboard, a reference model, a dispatcher and generic agents including generic drivers, loopback ports, sequencers and / or generic monitors for each interface and then automatically customize the generic agents based on their corresponding interface such that the agents meet the requirements of the interface for the DUT.

The invention discloses a server pressure test method and system and a terminal. The method comprises the following steps: receiving a test instruction triggered by a user on a test page, the test instruction comprising distribution information of a pressure test node, test configuration information and an access address; determining a pressure measuring node corresponding to the distribution information from a pressure measuring node queue, the pressure measuring node queue comprising servers registered locally in a cluster of partitioned servers; sending the pressure test node a test instruction including the test configuration information and the access address to the corresponding pressure test node, so that the pressure test node sends a test request to a server under test corresponding to the access address according to the test configuration information. The technical scheme provided by the invention can provide the partition pressure measurement node resources, simulate the real user distribution situation, and meet the high concurrent pressure measurement requirements.