54 results about "Loopback" patented technology

A loopback test system and method of using the system to test optical connectivity of an equipment rack including an optical shuffle device and at least one server, with each server having server ports. The loopback test system includes a plurality of loopback optical interfaces that are each coupled to a respective network-side optical interface or a respective spare optical interface of the optical shuffle device. Shuffle optical waveguides of the optical shuffle device and loopback optical waveguides of the loopback test system cross-connect each server port in a first subset of the server ports to a respective server port in a second subset of the server ports, with at least one of the cross-connections passing through a spare optical interface and two of the network-side optical interfaces.

This invention discloses a data loopback error analysis method, apparatus, device, and readable storage medium, applied in the field of data communication technology. The method includes: acquiring a count value in a setting register determined based on a preset number of target identifiers; wherein the setting register records the number of consecutive loopbacks of the preset number of target identifiers; the target identifiers are predetermined values ​​that are not scrambled during transmission at a set rate; and analyzing errors in the data loopback process based on the count value. Compared to current methods where valid information cannot be directly obtained from the device side when an error occurs in the data loopback function, this invention records the number of consecutive loopbacks of the preset number of target identifiers in a register. Therefore, based on the count value in the register, problems when errors occur in the loopback state can be quickly analyzed, errors can be quickly located, and error analysis and location efficiency can be improved.

The application provides a loopback test method and device of a laser radar, and belongs to the technical field of radar positioning. The method comprises the following steps: preprocessing laser radar point clouds corresponding to key frames of the acquired laser radar to obtain environment feature point clouds; converting the environment feature point clouds to a polar coordinate system with the laser radar as the center, and dividing the polar coordinate system into a plurality of two-dimensional grids according to radial distances and azimuth angles; determining geometric feature values of the two-dimensional grids according to geometric information of the environment feature point clouds falling into the two-dimensional grids, and determining intensity feature values of the two-dimensional grids according to reflection intensity information of the environment feature point clouds falling into the two-dimensional grids; constructing a multi-modal descriptor matrix according to the geometric feature values and the intensity feature values of the plurality of two-dimensional grids; and performing matching calculation on a current key frame of the laser radar and a historical key frame database according to the multi-modal descriptor matrix, and obtaining a loopback test result according to a matching calculation result. The application improves the loopback test precision and robustness.

A short-distance distributed high-precision optical fiber time synchronization system and method are disclosed. The system consists of a master time unit, several slave time units, and several optical fiber links. In this method, the time signal of the master time unit is looped back and transmitted between the master and slave time synchronization units using an optical carrier of the same wavelength. The master time synchronization unit uses the loopback method to measure the transmission delay of the optical fiber links and adjusts the delay of the transmitted time signal, so that each slave time synchronization unit receives a time signal synchronized with the master time synchronization unit, thereby realizing the distributed transmission of the time signal.

This application discloses a vulnerability remediation method for IoT terminals based on intrinsic security technology. First, the original message is decrypted and normalized to eliminate bit offsets before heterogeneous execution. This is then executed in parallel within an isolated heterogeneous environment to obtain a response set. Next, a multi-mode adjudication mechanism is used to accurately locate the damaged node. By decoupling trusted responses and cleansing feedback, the consensus result is echoed back to the terminal, simultaneously triggering isolation and cleansing instructions for dynamic node reconstruction and route loopback updates, forming a self-healing feedback control chain. This approach effectively eliminates bitstream misalignment interference during the adjudication process, significantly reduces the false interception rate, and achieves online isolation and reconstruction of damaged nodes without interrupting services. This greatly enhances the intrinsic security and service continuity of IoT terminals in complex network environments.

This application provides a method and system for detecting the coupling effect of a Fiber Optic Actuator (FAU). In one example, the FAU coupling effect detection system includes: a C-band laser for outputting a C-band laser signal; a C-band circulator for inputting the C-band laser signal into a designated optical fiber of the FAU when the FAU is coupled to a silicon photonic chip, and inputting the reflected light signal of the C-band laser signal into an optical power meter; wherein a C-band grating is disposed in a single-mode waveguide corresponding to the designated optical fiber in the silicon photonic chip; the reflected light signal of the C-band laser signal is obtained by reflecting the input C-band laser signal through the C-band grating; and the optical power meter is used to measure the optical power of the reflected light signal of the C-band laser signal. Applying this embodiment allows for the detection of the coupling effect between the FAU and the silicon photonic chip without adding an additional loopback optical path.

A system for insitu AESA calibration includes a radar receiver / excitor (XR). The calibrated XR functions as a precision multi-channel relative amplitude and phase microwave frequency measurement device that executes a known AESA calibration methodology. An integrated RF sensor system-level built in test (BIT) is utilized for prognostic health monitoring and self-healing calibration. During calibration, quadrants of the AESA are iteratively calibrated via measurements by the XR. I / Q values are balanced for each quadrant relative to each other without the need for a separately calibrated measurement device for absolute calibration. A near field probe may be disposed for radiative loopback measurements. A T / R calibration circuit receives the loopback measurements and data from a Tx channel.

An electronic device includes a feedback oscillator configured to output a first oscillation signal and a second oscillation signal, the second oscillation signal having a defined phase difference from the first oscillation signal, the feedback oscillator including a phase shifter configured to receive the first oscillation signal and output the second oscillation signal, an up-conversion mixer configured to output a first loopback signal obtained by mixing the first oscillation signal with a reference tone signal, and output a second loopback signal obtained by mixing the second oscillation signal with the reference tone signal, and a receiver configured to generate a first reference IQ signal from the first loopback signal, generate a second reference IQ signal from the second loopback signal, and compare an actual phase difference between the first reference IQ signal and the second reference IQ signal with the defined phase difference.

A network device can be configured to receive a packet to be replicated in accordance with a virtual local area network (VLAN) replication set having a number of members. The network device can further be configured to identify a first sub-broadcast or layer 2 (L2) domain for the packet and to identify a first sub-broadcast domain replication set corresponding to the first sub-broadcast domain. The first sub-broadcast domain replication set can have a number of members less than the number of members in the VLAN replication set. The network device can further be configured to identify a second sub-broadcast domain replication set for the packet, to replicate the packet a number of times for at least a portion of the members of the first sub-broadcast domain replication set, and to replicate a loopback packet a number of times for members of the second sub-broadcast domain replication set.

The invention discloses a hemispherical gyroscope circuit real-time self-calibration method and a hemispherical gyroscope, and the method comprises the following steps: a CPU alternately transmits a driving signal to a gyroscope and transmits a self-calibration signal to a loopback circuit, the CPU controls an ADC to alternately collect a gyroscope detection signal and a self-calibration loopback signal, every three alternating periods are used as a compensation period, and the self-calibration loopback circuit is used for compensating the gyroscope detection signal and the self-calibration loopback signal; self-calibration signals of the first period and the second period of each compensation period are transmitted to the loopback circuit through the DAC circuit, self-calibration signals of the third period are directly transmitted to the loopback circuit, demodulation and operation are carried out on circuit loopback signals of each compensation period, and gain coefficients and phase deviations of the detection circuit and the driving circuit are obtained. And calibrating the detection signal and the driving signal. Gain errors and phase errors of the circuit can be completely eliminated, long-term random drifting or error drifting changing along with temperature is avoided, the calibration process is automatically achieved through a program, and a large amount of prior calibration work is avoided.

This application discloses a method, device, system, and medium for implementing overspeed alarms for specific packets, to solve the following technical problem: how to achieve timely detection of specific packet traffic without wasting CPU computing resources. The method includes: the CPU generating an ACL (Access Control List) issuance command based on user configuration instructions and issuing the ACL issuance command to the switching chip; upon receiving packet traffic, the switching chip, based on the Access Control List (ACL) determined by the ACL issuance command, determines whether the packet traffic is overspeeding, and redirects the overspeeding packet traffic to a preset internal loopback interface; the internal loopback interface triggers an interrupt based on the overspeeding packet traffic and uploads the generated interrupt information to the CPU, enabling the CPU to issue an overspeed alarm based on the interrupt information. This application achieves timely detection of overspeeding of specific packet traffic without wasting CPU computing resources through the above method.

In an optical fiber storage component according to one embodiment of the present invention, a spatial cross section of an internal space cut along a plane orthogonal to a first direction extends in a second direction orthogonal to the first direction and in a third direction orthogonal to both the first direction and the second direction. The length of the spatial cross section of the internal space in the second direction is longer than the length of the spatial cross section of the internal space in the third direction. In the spatial cross section of the internal space, a first portion, which is the most protruding portion in the internal space in the second direction, is positioned in the third direction relative to a reference line passing through the center of the spatial cross section of the internal space and extending along the second direction, and a second portion, which is the most protruding portion in the internal space in a direction opposite to the second direction, is positioned in a direction opposite to the third direction relative to the reference line.

A system may include a first DAS station, comprising a first plurality of interrogator units to launch a first plurality of DAS signals in a first direction, wherein a first interrogator unit is configured to launch a first DAS signal at a first interrogation rate and first wavelength, wherein a second interrogator unit is configured to launch a second DAS signal at a second wavelength and second interrogation rate, less than the first interrogation rate. The system may include a loopback array, comprising a plurality of loopbacks, arranged over a plurality of spans, wherein a first set of proximate loopbacks nearest to the first DAS station are configured to route back the first DAS signal to the first DAS station, and wherein a first set of intermediate loopbacks, located further from the first DAS station, are configured to route back the second DAS signal to the first DAS station.

The application discloses a low-delay optical fiber time-frequency synchronization method and device and a storage medium, which are used for reducing errors in a transmission process of a long-distance optical fiber. A PPS reference data packet and an optical fiber delay data packet are generated; the PPS reference data packet and the initial optical fiber delay data packet are input into a first slave station; the PPS reference data packet and the initial optical fiber delay data are site-encoded by the first slave station; after a response delay, the site-encoded PPS reference data packet and the initial optical fiber delay data are transmitted to a master station; the optical fiber delay data packet is subjected to first optical port optical fiber segment delay encoding according to a loopback total delay and the response delay; the PPS reference data packet and the optical fiber delay data packet subjected to the optical fiber segment delay encoding are transmitted to the first slave station through the first optical port; the first slave station is subjected to master station original PPS recovery by using the PPS reference data packet, and the first slave station is subjected to phase shift processing by using the optical fiber delay data packet subjected to the optical fiber segment delay encoding.

This invention relates to a three-stage pipelined hardware architecture for zero-IF I / Q calibration, belonging to the field of RF receiver image rejection technology. The core architecture includes a three-stage pipelined module: a DC cancellation module uses shift registers and RAM to implement a 1024-point sliding window, eliminating DC offset in real time through addition / subtraction operations and a 10-bit right shift; a parameter calculation module uses a simplified CORDIC core to avoid trigonometric function operations; and an iterative correction module outputs a correction signal in real time through multipliers and phase rotators. Combined with resource optimization design, the FPGA logic resource usage is significantly reduced. Technical effects: It achieves low-latency real-time streaming signal processing, breaking through the real-time bottleneck of traditional solutions; the HDL simulation image rejection ratio reaches 67.2dB, and the actual hardware measurement reaches 51.4dB, significantly improving signal quality; loopback testing using a Xilinx ZedBoard (xc7z020clg484-1) and AD9361 RF chip successfully improved the image rejection ratio from 30.0dB to 51.4dB, effectively demonstrating the practicality and reliability of this architecture.

The application discloses a loop detection method and device, equipment and storage medium, and relates to the technical field of computer vision, and comprises the following steps: determining a candidate key frame sub-set according to an original image and a loop detection key frame database; when the candidate key frame sub-set is not empty, respectively determining a target image set for constructing a key frame and an original visual image; determining a matching point cloud pair based on a dense reconstruction thread according to the target image set and the original visual image, calculating a similarity error of the matching point cloud pair; and performing loop detection according to the similarity error. In the foregoing manner, after the candidate key frame sub-set is determined, it is judged whether the candidate key frame sub-set is empty. If yes, it is indicated that there is no loop. If no, a dense reconstruction thread is opened, and an effectively matched matching point cloud pair is determined based on the dense reconstruction thread. Then, an image pair corresponding to the similarity error is used for loop detection, so that the accuracy of loop detection can be effectively improved, and the SLAM tracking precision is improved.

Methods and devices for radio frequency (RF) loopback for transceivers are described. A transceiver for communicating RF signals with a target device may transmit signals at a transmit frequency and receive signals at a (different) receive frequency. The transceiver may include a waveguide diplexer for separating and combining signals based on frequency. The transceiver may be configured to couple a loopback signal from a common port of the waveguide diplexer; the loopback signal may be based on a transmit signal. The transceiver may include a loopback translator to translate the loopback signal from the transmit frequency to the receive frequency and provide the translated loopback signal to a receiver used for receiving signals from the target device. The receiver may compare the translated loopback signal with a representation of the transmit signal to generate a compensation signal. A transmitter may use the compensation signal to adjust subsequent transmit signals.

Apparatus and methods for transceivers are provided herein. In a first aspect, an observation receiver is implemented to detect common-mode local oscillator (LO) leakage while the observation receiver performs other functions. In a second aspect, a transceiver is implemented with an LO leakage compensation circuit that compensates a transmitter for LO leakage using a digital filter, such as a Kalman filter, that combines differential LO leakage observations with common-mode LO leakage observations. In a third aspect, a transmitter includes multiple local loopback paths including a first loopback path after a variable gain amplifier (VGA) and a second loopback path before the VGA.

This application provides a chip testing apparatus, including a test board for assembling a chip under test (DUT), and at least one loopback panel for performing insertion loss testing on the DUT. The test board is provided with at least one chip connector, and the loopback panel includes several loopback boards with different trace lengths. Each loopback board is provided with a board connector that forms a closed-loop test path with the chip connector. When the number of loopback panels is configured to be one, the insertion loss value between the loopback boards on the panel is less than 1 dB, and the trace lengths between the loopback boards increase sequentially in 600 mil increments. By splicing loopback boards with different trace lengths onto the loopback panel, the insertion loss testing requirements of different chips can be accommodated.

The present application relates to the technical field of automatic control, and further relates to a kind of online self-calibration and drift compensation method of vehicle-mounted small radar, method includes the following steps: step 1: in the front-end package module of vehicle-mounted small radar, output loopback beat signal and obtain the digital sample sequence of loopback beat signal by analog-digital conversion;Step 2, the digital sample sequence of loopback beat signal is executed Hilbert transform to obtain analytic signal sequence, and adaptive segmented interval division is executed to instantaneous frequency deviation sequence and the drift feature vector of each segmented interval is extracted;Step 3, the signal link between the input from the transmitting digital baseband signal to the instantaneous frequency deviation output is defined as closed-loop equivalent nonlinear system, and after point-by-point addition with transmitting digital baseband signal, it is output to transmitting channel by digital-analog converter.The present application considers the compensation accuracy and the real-time constraint of vehicle-mounted embedded platform.

The application provides a method and system for realizing loopback test based on algorithm switching. The method does not require external equipment, and one key can complete the whole process of transmission, collection and analysis. The method can realize integrated self-loopback, reduce operation difficulty, greatly reduce test time, and improve test efficiency. The method uses FPGA dynamic reconfiguration, supports multiple test scenes through algorithm switching, improves test controllability and integration, and reduces hardware cost.

Technologies for signal skew correction in integrated circuit memory devices are described. An integrated circuit memory device includes a first interface to receive command / address (CA) signals and a clock signal, a data interface, and a mode register. During a CA bus loopback mode, the first interface receives a pattern of CA signals and the clock signal and the data interface outputs the pattern of CA signals. During the CA bus loopback mode, the mode register can be programmed with a value representative of a timing offset between the clock signal and a sampling point for the first interface.

This invention discloses a communication control method and system for electronic detonators, belonging to the field of digital information transmission technology. The method includes: a detonation controller sending a low-frequency scanning signal, analyzing the current response to determine an initial communication parameter set, and establishing an initial communication link; periodically sending probe frames and receiving loopback frames based on the link, extracting link quality indicators such as bus physical state, eye diagram opening, and timing jitter; dynamically selecting an inference strategy based on the indicators to generate a three-dimensional vector containing carrier frequency, baud rate, and sampling threshold adjustment values; synchronously updating and switching parameters, and restarting the evaluation process; if the convergence condition is met, the parameters are fixed; otherwise, iteration continues or an early warning is triggered. This scheme achieves adaptive dynamic optimization of communication parameters, improving the stability and reliability of electronic detonator communication.

A wafer-scale 3D stacked inference engine integrates stacked logic die and stacked memory die on a unitary silicon substrate with an on-silicon interconnect fabric to execute neural-network models using low-precision arithmetic. Compute chiplets and high-bandwidth memory stacks are coupled across reticle-stitched interconnect regions that form a single all-silicon domain. A redistribution-layer network provides ultra-short-reach links and express lanes for inter-region data movement while a control subsystem issues tile-level schedules that overlap compute and transfer. Wafer-integrated power delivery and microchannel cooling support high density operation, and test access structures enable loopback and boundary-scan verification of stacked connections. The architecture reduces multi-hop latency, improves energy efficiency, and allows large models to be inferenced at wafer scale without leaving the all-silicon domain.