16results about How to "Improve testability" patented technology

An intelligent decision-making method based on a rule engine and a finite-state machine adopts a QT high-performance cross-platform development framework and a safe and reliable mode of accessing rule data by a memory database. The method mainly comprises metadata management, state node and rule setting management, state space internal transfer setting, state space external transfer setting, rule data acquisition, service execution or circulation scheme acquisition, rule input data real-time acquisition, rule matching, state machine internal state transfer processing, execution action and state space external transfer processing. And calling functions such as an internal state transfer method of the state machine. According to the method, automation and intelligentization of business decision making of a complex system can be achieved, when business rules change, automatic operation of the business state machine in an application system can be achieved without modifying business logic codes, and the transportability of software, the running reliability of the software and the data safety can be improved.

The invention discloses an effective security domain-based post-power-grid-fault operation adequacy repairing method and system, belongs to the technical field of power grid fault repairing, and aims to solve the problems of conservative static limit, lack of visual representation of multi-section security situation and insufficient real-time cooperative correction capability in a traditional N-1 checking method. According to the method, the dynamic section limit is constructed by introducing the adjustable power flow transfer coefficient, and the visual depiction and the global strategy feasibility identification of the multi-section coupling safety boundary are realized based on the effective safety domain concept; and establishing a convex optimization collaborative repair model which takes the operation adequacy as a guide and takes the minimum total energy consumption of stored energy as a target. The improvement of quota formulation from static state to dynamic state, safety analysis from isolation to coupling and correction decision from experience to optimization is realized, and the observability of the operation state and the accuracy of the scheduling decision after the power grid breaks down are remarkably enhanced.

The invention belongs to the technical field of interface testing, and discloses a method for improving a testing process based on an interface testing platform, which comprises the following specific steps of: 1, firstly, generating an interface document according to requirements in a research and development stage; through unified management of interface documents, research and development processes are standardized, test interface documents are provided on the premise of testing, updating can be carried out at any time in the document process, testing is automatically notified after updating, communication cost is reduced, automatic use cases can be prepared in advance for testing, interface problems can be exposed as early as possible, testing left shifting is achieved, and testing efficiency is improved. Therefore, the software quality is improved, the cost and time are reduced, the team coordination is improved, the testability is enhanced, and the user satisfaction is improved; after the interface is online, the interface is continuously monitored, test right shift is realized, test case assets can be settled, the labor cost of regression test is saved, the execution round of the test case is improved from one time to N times, and if any bug exists in the test process, the bug can be automatically submitted.

The application provides a voltage holding device and an electronic device using the same. The voltage holding device uses a hysteresis voltage of a hysteresis comparator to update the charge of a capacitor efficiently and pursue lower power consumption. On the other hand, because the advanced voltage holding circuit pursues lower power consumption, the refresh time must be designed to be longer, which results in the inability to perform a large amount of yield tests. However, the technical solution provided by the application can cooperate with related application circuits to greatly shorten the test time, increase the testability and reliability of the voltage holding device.

The invention discloses a three-dimensional indoor positioning method based on visual sense and 5G sensing fusion, and relates to the technical field of indoor positioning and space perception. The method comprises the following steps: modeling an indoor reflecting surface to obtain a virtual anchor point; a user azimuth vector detected, identified and tracked by a camera target is projected to a scene reflection surface to construct a candidate reflection path and identify a direct incidence path, and the candidate reflection path and the direct incidence path are mapped to a beam codebook of a base station, so that a beam search range is narrowed, and a higher angle resolution is obtained; the user terminal establishes a communication link through the reference signal, and the base station acquires channel state information; in the channel parameter processing stage, angle and time delay estimation is carried out on channel parameters; an estimation result is matched with a direct or virtual anchor point path, and pseudo paths which do not conform to scene constraints are eliminated, so that a direct path and an effective reflection path are distinguished; the position of the user is jointly solved by using multi-angle constraints formed by the direct path and the reflection path, and continuous estimation of the three-dimensional position of the user is realized by combining a filter.

The invention relates to the technical field of computers, in particular to a video playing component implementation method and system, electronic equipment and a storage medium, and the method comprises the steps: constructing a development environment of a video playing component of a Vue framework; and based on the development environment, integrating a target plug-in for video sliding carousel into an original video playing component to obtain a Vue video playing component for carousel sliding. According to the invention, a cross-platform unified video playing component is constructed through a Vue framework, and a video sliding carousel plug-in is integrated, so that flexible display of video content can be realized, user experience is improved, a user can enjoy consistent operation interfaces and visual styles on different platforms, and user experience is improved. And more efficient and convenient technical support is provided for spreading of video contents on an internet platform.

The present invention relates to the technical field of parameterized simulation model design, and in particular to a parameterized simulation model design method and system based on a smart bed. The method comprises the following steps: performing internal logic relationship analysis on the functional design requirement data of the smart bed and mapping the functional test boundary parameters between different functional modules to obtain the functional test boundary parameters; performing functional scenario test data collection on the functional test boundary parameters, and then performing scene function execution abnormality identification to obtain scene function execution abnormality data; performing functional test balance point correction on the scene function execution abnormality data to obtain scene function balance point correction data; performing parameterized simulation model design on the scene function balance point correction data and performing automated firmware design to obtain the smart bed scene parameter logic firmware. The present invention makes the parameterized simulation model design technology more perfect by optimizing the parameterized simulation model design technology.

The present invention discloses a multi-user message push method and push system based on a publish-subscribe mode, which belongs to the technical field of message user push technology, and the technical problem to be solved is how to send and receive messages based on the subject of the message. The method includes the following steps: a message publisher collects the needs of message subscribers, formulates a subscription subject, and sets a personalized message notification format according to the subscription subject; message subscribers subscribe to or unsubscribe from a subject based on their interests, and generate a corresponding subject subscription status; the subscription subject, message notification format, and subject subscription status are stored through a message subscription list; a message publisher pushes the messages it produces to a message queue, which is a distributed message queue, and the message queue stores the received messages in its memory queue; each message is distributed based on the content and subject, and each message is pushed to the corresponding message subscriber in conjunction with the message subscription list.

The invention discloses a data reconstruction method and circuit based on Fourier transform. The circuit comprises a clock generator used for providing M groups of orthogonal clocks required by frequency mixing; the frequency mixer is used for mixing the input periodic signal with the M groups of orthogonal clocks to obtain M groups of intermediate frequency output signals; the low-pass filter is used for obtaining a corresponding direct-current voltage according to the frequency mixing output, and further recording the direct-current voltage as a Fourier transform coefficient; and the Fourier operation module is used for carrying out Fourier mathematical operation on the Fourier transform coefficient so as to obtain a reconstruction signal. According to the data reconstruction method based on Fourier transform, a high-bandwidth signal can be reconstructed through successive single-frequency-point frequency mixing, the problem of simultaneous detection of the bandwidth in a full-frequency range is avoided, and the signal testability in a high-bandwidth signal transmission system is greatly improved.

This invention relates to an AGV task allocation and path planning system and method, specifically a multi-AGV task collaborative time-series allocation and path planning system and method. It addresses the problems of inflexible deployment, high costs, and inability to accurately trigger tasks based on map point arrivals in complex time-series task collaboration among multiple AGVs due to reliance on a central server. The invention includes a scheduling decision module, a status management module, a task distribution module, and a path planning service module. The status management module continuously collects real-time status and location information of the AGVs. The task distribution module sends task instructions or scheduling instructions generated by the scheduling decision module to the corresponding target AGVs. Through establishing a map network and task flow timeline, path planning, status monitoring, task issuance and execution, and fault tolerance handling steps, automated operation of multiple AGVs is achieved.

The application provides a SQL statement processing method and device and electronic equipment, and relates to the technical field of databases. The method comprises the following steps: obtaining an untyped syntax tree of a SQL statement; the untyped syntax tree comprises a plurality of nodes; determining a target node to be bound in the plurality of nodes according to a pre-obtained node binding sequence diagram; determining a previous node of the target node according to a node reference relationship diagram; obtaining a virtual table of the previous node; binding the target node based on the virtual table of the previous node, and determining a next target node to be bound until the binding of all nodes, so as to convert the untyped syntax tree into a typed syntax tree. The device is used for executing the above method. The SQL binding process in the SQL compiling process is independently implemented, and during the binding, the data type assignment and semantic verification are implemented according to the virtual table of the previous node. Since the binding methods of each node are the same, the code complexity can be reduced, and the expansibility and maintainability of the code are improved.

The present invention discloses a highly integrated multi-channel tile-type T / R component and an arrangement method. The highly integrated multi-channel tile-type T / R component is square, and is surrounded by a base plate, a cover plate, a front plate, a rear plate, a left plate and a right plate as walls to form an installation cavity. The characteristics are as follows: n groups of first connectors are installed on the base plate, each group of first connectors is composed of two connectors, one for receiving and one for transmitting, and each group of first connectors is perpendicular to the base plate. A group of second connectors is installed on the cover plate, and the second connector is a combined port for receiving output and transmitting input. A through groove is provided on the cover plate, and three layers are provided in the installation cavity. The present invention integrates multiple radio frequency channels to achieve miniaturization, can effectively reduce the cross-sectional height of the active phased array antenna, and the heating device inside the T / R component is close to the heat sink to achieve the purpose of rapid heat conduction.

The invention belongs to the technical field of electromagnetic environment effects. The invention provides a strong electromagnetic pulse cumulative effect research method for a communication interface chip. According to the embodiment of the invention, on the basis of ensuring the normal receiving and transmitting work of the communication interface circuit, a communication interface circuit which is suitable for various ports, high in repeatability, high in testability and convenient for observing the strong electromagnetic pulse effect phenomenon of the interface circuit and acquiring corresponding threshold data is designed and established; and moreover, sensitive weak links of the test platform can be further checked and positioned, and a test scheme of cumulative effects is provided, so that a foundation is laid for interface reinforcement protection of an interface circuit of communication equipment.

The invention discloses a method for efficiently testing a sealed chip by using an ATE machine, and belongs to the field of chip testing. The method is based on a test PCB integrating a manual test evaluation board and an ATE test board, and comprises the following steps: optimizing original test software; the ATE machine re-powers on the main test chip and the tested chip, and enters a functional module test stage of the tested chip; the main test chip receives a test command sent by the ATE machine table, analyzes a to-be-tested function module, sends information and test parameters of the to-be-tested function module to the tested chip, and outputs test excitation; after the tested chip receives the information and the parameters of the module to be tested, bottom layer driving operation of the function module is carried out, and a test result and a response after operation are returned to the main test chip; and the main test chip judges whether the to-be-tested functional module of the tested chip is normal or not according to the returned test data and response, and informs the ATE machine of a judgment result. According to the invention, the original factory dependence on each bare chip of the sealed chip is solved, and the testability of the sealed chip is improved.

This application provides a logic synthesis test point insertion method and related equipment based on intermediate representation, relating to the field of testability chip technology. By performing test point analysis and insertion during the intermediate representation stage of the circuit, and employing a process-independent and logically complete intermediate representation form, this method can flexibly determine the test point location without relying on specific process library features. Furthermore, it leverages the convenience of logic transformation in the intermediate representation form, providing ample space for subsequent structural optimization. This application treats the intermediate representation circuit containing test points as a unified whole for timing and area-driven process mapping, enabling the search for the optimal cell matching scheme globally. This naturally optimizes the test point structure while generating the gate-level netlist, ultimately achieving significant improvement in circuit testability while effectively controlling area overhead and ensuring the stability of timing performance.

Embodiments of the present application provide a display module, a test method thereof and a display device. The display module comprises a control circuit, a driving circuit and a display panel; the display panel comprises a test component, a test control circuit and a gate driving circuit; the driving circuit, the test component, the test control circuit and the gate driving circuit are connected in sequence; the control circuit is connected with the test control circuit, and is configured to control the test control circuit to be turned on based on a received first selection signal, so as to enable communication between the test component and the gate driving circuit; or control the test control circuit to be turned off based on a received second selection signal, so as to disable communication between the test component and the gate driving circuit. According to the embodiments of the present application, only by adding the auxiliary test circuit of the control circuit and the test control circuit, it can be determined whether the driving circuit is abnormal or the display panel itself is abnormal, the test time can be shortened, and the labor cost can be reduced.