Test system for intelligently diagnosing faults of high-integration digital signal processing system

A technology for digital signal processing and system faults, applied in the direction of measuring electricity, measuring devices, measuring electrical variables, etc., can solve problems such as low reliability, low intelligence, low fault diagnosis ability, etc., to reduce test time and test time Effect

Inactive Publication Date: 2020-09-04
10TH RES INST OF CETC
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  • Abstract
  • Description
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Problems solved by technology

[0006] In order to solve the problems that the large-scale digital integrated circuit pins are huge, the interconnection is complicated, the platform under test cannot be approached at any time, and the traditional test method cannot solve the problem of test efficiency and test accuracy, the present invention provides a test with less test time and true and accurate signals. , can improve the automation and intelligence of the test, and ensure the comprehensive, sufficient and extensible test system of the intelligent diagnosis of the fault of the highly integrated digital signal processing system to solve the problem of low reliability and low fault diagnosis ability of the existing boundary scan test system The problem of low intelligence

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  • Test system for intelligently diagnosing faults of high-integration digital signal processing system

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Embodiment Construction

[0022] see figure 1 . In the embodiment described below, a test system for intelligently diagnosing a fault in a highly integrated digital signal processing system includes: an intelligent test platform management unit 1 connected to the system under test 8 through a test bus 7, connected in series to the intelligent test platform management unit 1 Host communication interface unit 2 , partition loading controller 4 , fault injection controller 5 and interface unit 6 between the system under test 8 . The intelligent test platform management unit 1 runs the control software, collects data of multi-channel signals, and connects the JTAG scan chain in parallel through the test bus 7 on the backplane of the system under test 8. Each module is interconnected through the backplane bus, and the boundary scan link of each module Parallel to the boundary scan test bus on the backplane, based on the system testability DFT technology and boundary scan JTAG technology, generate test sequ...

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Abstract

The invention discloses a test system for intelligently diagnosing faults of a high-integration digital signal processing system, and aims to solve the problem of low fault diagnosis capability of anexisting boundary scanning test system. According to the technical scheme, an intelligent test platform management unit operates control software, collects data of multichannel signals, generates a test sequence, allocates physical addresses to all modules, lists all the modules connected to a system backboard on a software interface, processes the multichannel data and diagnoses faults; the control software calls boundary scanning test software to generate a test vector for the tested module, applies the test vector to the chip core logic input end to form a circuit fault criterion, and sendsthe circuit fault criterion to the boundary scanning controller; the test vectors of different regions are loaded to a tested module to generate a fault injection vector, and the fault injection vector is transmitted to a fault injection controller; and the fault injection vector is loaded to the tested module to complete the fault diagnosis of the multichannel signal processing subrack platformmodule-level digital chip.

Description

technical field [0001] The invention belongs to the fields of aircraft measurement and control communication, phased array radar, and automatic testing, and specifically relates to an intelligent testing platform for a highly integrated digital signal processing system in the field of intelligent fault diagnosis. testing object [0002] technical background [0003] The highly-integrated multi-channel signal processing module utilizes system design for testability (DesignForTestability) technology and boundary scan (JTAG) technology, runs through the entire stage of system design, is an important means to improve the practical level of equipment, and plays a key role in supporting and guaranteeing. With the development of system integration and software radio theory, the requirements for high-speed sampling, signal processing, software reconfiguration ability and miniaturization are getting higher and higher. It is necessary to design a new general-purpose signal processing ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/3185
CPCG01R31/318566G01R31/318533G01R31/318502
Inventor 范进
Owner 10TH RES INST OF CETC
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