6results about How to "Reduce the amount of code" patented technology

This application provides a data caching method, apparatus, computer device, and storage medium, belonging to the field of artificial intelligence technology. The method includes: obtaining cache annotation information of a target program; wherein the cache annotation information is a cache description of the target program; identifying the cached return data of the target program based on the cache annotation information to obtain cache identification information; wherein the cache identification information indicates whether the return data of the target program is cached or not; if the cache identification information indicates that the return data of the target program is not cached, executing the target program to obtain the original return data; generating cache configuration information for the original return data based on the cache annotation information; and caching the original return data to a cache database according to the cache configuration information. This application can be applied to business systems requiring large amounts of data, such as fintech and healthcare, and can save labor costs in data caching.

This invention discloses a method and system for verifying the functionality of a vector processor. The method unifies matrix, vector, and scalar data formats into a matrix type using a reference model. Multi-input interface data is stored in corresponding data queues in the form of address plus data. The required computational data is extracted according to the current instruction, and unused data is stored back to the original queue. Expected output data at the clock cycle level is generated and compared with the actual output data of the vector processor to determine functional correctness. The system includes an instruction generator module, a controller module, a data generation module, a reference model module, a data collection module, and a data comparator module. This invention can improve the accuracy of vector processor fault location, simplify verification logic, and improve overall verification efficiency.

The image decoding apparatus (31) includes a transform coefficient decoding section (311) that decodes transform coefficients on a per transform tree basis included in a coding unit, the transform coefficient decoding section decoding transform coefficients related to luminance without splitting a transform unit corresponding to luminance in the transform tree, and decoding transform coefficients related to color difference without splitting a transform unit corresponding to color difference.

The application provides a method and system for testing the inference ability of an artificial intelligence system. The method comprises: constructing a multi-dimensional space probability distribution model based on a structured configuration file of a plurality of dimensional parameter atomic items and at least one variation strategy rule defined for an inference ability scenario of an AI model deployed on an AI system; generating a dynamic test case set based on the multi-dimensional space probability distribution model; and executing a test on the AI model deployed on the AI system using the dynamic test case set.

A kind of manchester decoding method based on timing offset algorithm, including filtering module, signal waveform conversion module and manchester decoding module, the timing offset algorithm is implemented in manchester decoding module;After input signal passes through filtering module and removes interference signal, signal waveform is converted into baseband signal waveform by signal waveform conversion module, then is sent into manchester decoding module, microprocessor in manchester decoding module starts reading signal by external interrupt, while reading signal, real-time baseband signal pulse width is calculated using timing offset algorithm, according to the calculation result, the timer initial value of the collected baseband signal is revalued, the dynamic adjustment of microprocessor to baseband signal acquisition frequency is realized, finally, according to manchester encoding format, the collected baseband signal is decoded to obtain the final decoding data.The present application improves decoding speed, accuracy and environmental adaptability.

The clock interval-based real-time trajectory planner for a solar telescope scanning mechanism relates to the technical field of space telescope sun-scan imaging technology, and solves the problems that the existing trajectory planning methods all have large calculation amount and large code amount, and comprises: a speed planner, which is used for calculating the clock interval between adjacent position instructions according to the scanning speed of the scanning mechanism, the processor clock frequency, the acceleration of the scanning mechanism and the speed update frequency of the scanning mechanism; a target position selector, which is used for determining the target position of the solar telescope, and switching the target position between the scanning start point and the scanning end point according to the time period of the scanning of the solar telescope; and a position instruction generator, which is used for updating the position instruction according to the current position, the target position and the clock interval, and sending the updated position instruction to the position controller of the scanning mechanism. The present application is convenient for the program to be realized in a fixed-point operation mode, involves less operation units, is easy to realize, and has less code amount.