37results about How to "Guaranteed correctness" patented technology

This application provides a software stack compatibility method, device, storage medium, and program product, applicable to the field of artificial intelligence chip technology. In this method, during the compilation of the original program code, a first header file defined in the target software stack is called. This first header file has the same name as the second header file in the native software stack. The first header file is used to import the target header file in the target software stack. Since the target header file in the target software stack is not restricted by the private permissions of the native software stack, each native interface in the target header file can be directly converted into a target interface defined by the target software stack. The native interface is defined by the native software stack, thus ensuring the accuracy of compilation. Furthermore, the compilation process no longer calls the second header file in the native software stack, i.e., it no longer imports the native software stack, effectively avoiding conflicts between API definitions in the target software stack and API definitions in the native software stack.

The application provides an RGB-based self-adaptive translation flat display picture method and system. By writing the horizontal and pitching deviation into a memory, combining the layout characteristics of the flat display picture, and adjusting the position of the starting point of the distortion correction based on the FPGA, the self-adaptive compensation of the flat display part machining and assembly error is realized without increasing the operation amount and the delay, and the translation process correctness monitoring is performed. The application can be applied to the compensation of the machining and assembly error of the large field of view digital flat display, increases the margin of the flat display part machining and assembly, and further reduces the cost.

The application relates to a transaction submission control method and system. The method comprises the following steps: based on a transaction request sent by a client being received, freezing a write set of a transaction corresponding to the transaction request; writing a transaction log record of the transaction request into a prewrite log, including all modification records in the transaction corresponding to the transaction request and a submission mark record; performing a persistence operation on the prewrite log by a persistence module, and returning a persistence completion information and a corresponding log location LSN to a submission point control module after a preset persistence condition is met, the persistence module and the submission point control module being isolated from each other; marking the transaction corresponding to the transaction request as reaching a persistent submission point by the submission point control module, and writing the mark into the prewrite log to form a recoverable submission point record; and returning a transaction submission success response to the client only after the mark representing the persistent submission point is written into the prewrite log. The normalization of transaction submission semantics is realized.

The disclosure provides a configurable data migration method, device, equipment and medium, relating to the technical field of computer and the technical field of data processing. The method comprises: obtaining configuration information of to-be-migrated data by calling an interface of a rule configuration device, wherein the configuration information comprises data storage location information, data verification information and data loading information; generating a data migration workflow based on the configuration information of the to-be-migrated data by using a control scheduling device, wherein the data migration workflow at least comprises definitions of a plurality of migration steps and scheduling sequences between the plurality of migration steps; and migrating the to-be-migrated data from a source system to a target system according to the data migration workflow.

This invention provides an automated evaluation system for vibration monitoring signals of aerospace products, comprising: a raw signal parsing module, a data preprocessing module, a signal parameter configuration module, a signal interpretation and evaluation module, and an evaluation conclusion output module. The raw signal parsing module parses unreadable raw data packets into a program-readable data format; the data preprocessing module eliminates signal start-time errors and performs filtering; the signal parameter configuration module configures parameters for single and related signals, forming a parameter configuration library; the signal interpretation and evaluation module evaluates the waveform similarity of single signals based on a cross-correlation normalization algorithm and interprets the time sequence relationship of related signals; the evaluation conclusion output module displays the evaluation results on a software interface. This invention achieves automated evaluation of vibration monitoring signals of aerospace products, replacing manual interpretation, improving evaluation efficiency and reliability, and possessing good versatility and scalability.

This invention relates to the field of circuit hardening technology, and provides a voltage-controlled oscillator (VCO) circuit and phase-locked loop (PLL) circuit that are resistant to single-event transients. Addressing the issue that traditional three-mode relaxation oscillator (VCO) circuits are unsuitable for low-voltage conditions, especially when the power supply voltage drops to around 0.8V, this invention employs six oscillation branches coupled into three large oscillation loop circuits to improve loop gain. Furthermore, by combining bias circuits, comparators, and voting circuits for each path, the problem of increasing nonlinearity is avoided. This achieves a combination of large oscillation loops, bias circuits, and a three-mode VCO architecture, resulting in a VCO circuit that maintains high-frequency stable operation under ultra-low voltage conditions such as 0.8V, thus achieving a single-event transient resistance effect, especially at low voltages of 0.8V.

The application discloses an AGV task compiling and script executing method based on an RDS scheduling system, and relates to the technical field of AGV scheduling. The method comprises the following steps: a task compiling unit and a script configuration unit are built in the RDS scheduling system, and a visual interface and a script language are provided as two operation modes; a running script containing a task allocation sub-script, a driving control sub-script and an exception handling sub-script is compiled through the script configuration unit; the compiled task and the running script are subjected to syntax checking and parameter matching checking, and are stored in a task database after the checking; the RDS scheduling system calls the task and the corresponding running script in the task database, generates executable instructions and sends the executable instructions to a target AGV, the AGV analyzes the task logic according to the running script, completes the task execution and feeds back the execution state. The application can realize flexible configuration of AGV tasks, high adaptation of scripts and tasks and efficient execution of complex tasks, and improves the adaptability, execution efficiency and reliability of the scheduling system.

This invention discloses an asynchronous sparse matrix outer product multiplier based on an event-driven circuit design. The multiplier employs a merging strategy that explicitly associates data with storage unit addresses, mapping matrix data address indices to corresponding addresses in the storage modules. Identical indices indicate identical storage locations, necessitating a merging operation. This strategy ensures the determinism of the data merging process and avoids complex sorting operations. Furthermore, the event-driven, clockless circuit used in this multiplier effectively mitigates some problems associated with synchronous circuits due to the absence of a clock and the use of an asynchronous controller to control data transmission. It also features low power consumption, high adaptability, and a certain degree of electromagnetic interference resistance, making it suitable for processing scenarios requiring ultra-low power consumption.

The application provides a cross-clock domain time information correction method and a distributed system thereof. The method comprises the following steps: a sub-node sends a digital signal carrying its own clock and data information to a master node, and then the master node recovers the sub-node clock and data; the master node is configured with a sub-node clock counter and a master node clock counter; the master node samples one clock by using the other clock, and when the lag time between the two clocks reaches a single period of the clock with a higher frequency, the sub-node clock counter is adjusted to keep the two clock counters consistent; and the time stamp of the data of the sub-node in the master node clock domain is obtained through the sub-node clock counter and the master node clock. The application has a simple structure, saves the calculation cost, and has high time measurement precision.

This utility model relates to the technical field of fan blade core feeding equipment, and discloses an automatic feeding machine for injection-molded fan blade cores: a frame; a vibratory feeder for placing the cores; a first screening component installed on a feeding channel; a first port of a feeding pipe connected to the outlet of the feeding channel; a material distribution device including a base block, a first telescopic component, a moving block, and a support; a second port of the feeding pipe installed on the support; a first outlet on the base block; a second outlet on the moving block; an air outlet pipe connected to the moving block; an outlet pipe on the base block; a first end of the outlet pipe connected to the first outlet; a fixed block on the discharge rack for connecting the second end of the air outlet pipe; a transfer fixture configured to receive the cores on the fixed block; and a control system for receiving and sending signals. This utility model realizes core sorting, forward and reverse identification, multi-track switching, and arbitrary layout adjustment to adapt to mold cavities, and automatically embeds the cores.

A method for obtaining micro-vibration test conditions for aerospace vehicles involves: searching for micro-vibration disturbance sources during the vehicle's on-orbit operation; classifying the micro-vibration disturbance sources and identifying those that cannot be avoided; conducting micro-vibration environment measurement tests on the unavoidable disturbance sources to obtain the time-domain curve of the maximum vibration environment of the disturbance sources; establishing a finite element model for micro-vibration response analysis; conducting transient response analysis to determine the micro-vibration response of precision instruments; converting the time-domain curve of the micro-vibration response of the precision instruments into a frequency-domain curve and performing envelope design to obtain the micro-vibration test conditions of the precision instruments for subsequent experimental verification.

The application provides a power system frequency measurement method and system based on the squeeze theorem, which comprises the following steps: sampling the system voltage signal in real time at a fixed sampling frequency fs; determining whether there is a zero-crossing interval according to the positive and negative signs of the sampling value; when the zero-crossing interval exists, calculating the difference value of adjacent points and judging whether the difference value of adjacent points meets a preset similarity condition; when the preset similarity condition is met, determining that the zero-crossing interval is valid based on the squeeze theorem, and calculating the accurate zero-crossing time Tn by linear interpolation; and calculating the system frequency according to the current zero-crossing time Tn and the previous zero-crossing time T0. The sine wave signal of the zero-crossing point is replaced by a linear signal by using the squeeze theorem, so that the influence of the following situations on the frequency calculation can be avoided, and abnormal situations such as burrs, jumps, communication errors, missing points and repeated points caused by electromagnetic interference can be avoided.

Chemical sampling equipment comprises an operation table, a glove box, a supply unit, a cleaning unit and a cleaning unit, the operating table is provided with an operating side and a sampling side, an operating space and a sampling space are arranged in the operating table, the operating space is adjacent to and communicated with the sampling space, the operating space corresponds to the operating side, the sampling space corresponds to the sampling side, and a normally closed valve is arranged at the communicated part of the operating space and the sampling space; the glove box is arranged in the operation space; the supply unit is arranged in the operation space and is used for supplying chemicals; the cleaning unit is arranged in the operation space and is used for supplying cleaning liquid; the cleaning unit is arranged in the operation space and used for providing protective gas. In this way, it can be guaranteed that personnel cannot make contact with the chemicals, meanwhile, the chemicals can not be polluted in the drawing process, and the test quality of the chemicals is guaranteed.

This application provides a firmware boot method applicable to the field of computer firmware technology. It includes: in response to a firmware boot command, executing a first coroutine task in a coroutine task queue; upon detecting that the execution of the first coroutine task has been paused by calling a blocking interface, saving context data determined during the execution of the first coroutine task to a first stack space corresponding to the first coroutine task; determining a second coroutine task in a paused execution state from the coroutine task queue; resuming the execution of the second coroutine task based on the context data stored in a second stack space corresponding to the second coroutine task; and determining the firmware state as booted based on the execution results of multiple completed coroutine tasks. This method utilizes cooperative coroutines to concurrently execute multiple hardware initialization tasks within a single thread, and achieves non-intrusive yielding by intercepting blocking interfaces, significantly shortening firmware boot time.

The application discloses a homologous-based traceable ring signature method and system, wherein the method comprises a key generation step, a signature generation step, a signature verification step and a signature tracing step, and the OR protocol and the FS conversion are introduced to construct a signature algorithm, while the correctness and linkability of the traceable ring signature are ensured, the function characteristic of traceability is met, and the system can be effectively instantiated by using different security level parameters of CSIDH. The application has the advantages of high security and small signature size, provides the tracing function on the basis of the linkable ring signature, can be widely applied to multiple application fields such as block chain anonymous voting and electronic cash systems, and can resist quantum attacks.

This invention discloses a method, apparatus, and storage medium for managing electronic project documentation in investment banking. First, it manages the project documentation directory template based on configurable and version management; then, it binds each stage of the project documentation directory; next, it maintains or rebuilds the project documentation directory; it stores project documentation files; it locks the project documentation directory; and finally, it submits the project documentation for verification. This invention not only enables standardized and customized flexible changes to the project documentation directory but also effectively assists in controlling the correctness and integrity of the project execution process. The coordinated operation of directory locking, documentation storage, and documentation submission effectively controls the execution process, ensuring its correctness and integrity. This invention guarantees the flexibility of investment banking project documentation to adapt to internal and external changes and the standardization of documentation file maintenance, thereby improving the efficiency of investment banking operations and the ability to control risks.

This application relates to a segmented transmission method for low-power industrial audio acquisition terminals. The method includes: the terminal device sending a start identifier message to a server; segmenting the acquired audio data according to preset segmentation conditions to generate multiple data segments and attaching segmentation identifier information; transmitting the data segments to the server via a cellular communication network; the server establishing a data transmission session and allocating buffer space; storing the data segments in the buffer space according to the segment sequence identifier; the terminal device sending an end identifier message; and the server performing integrity checks and merging the data segments after the checks pass to generate a complete audio data sequence. This application reduces the instantaneous power consumption on the terminal side and improves the reliability of audio data transmission through the segmented transmission mechanism.

This application discloses a self-organizing network communication method, apparatus, system, and medium. The method includes: for each node in the self-organizing network, updating the communication status with neighboring nodes; updating the optional transmission paths with other nodes in the self-organizing network based on the communication status; sending the optional transmission paths to neighboring nodes so that each node in the self-organizing network can update its own routing information; determining the data transmission mode based on the geographical location of the node; determining the optimal transmission path with the target node in the data transmission mode from the optional transmission paths; and sending the collected target data to the target node according to the optimal transmission path so that the target node can upload the target data through the external network. This method enables reliable networking in areas with poor wireless signal coverage and transmits the data collected by each monitoring device to the external network through the network, which is low-cost and easy to implement.

The application provides an AI conversation-driven asset due diligence process arrangement method and system, relates to the technical field of artificial intelligence, and comprises the following steps: analyzing user conversation, constructing an asset knowledge graph and demand constraints, screening and arranging atomized due diligence components to form an execution graph according to the knowledge graph and the demand constraints, and performing information collection and analysis on the components in sequence; when data is missing, the method automatically backtracks the conversation nodes and generates follow-up questions to supplement the information; and finally, the aggregated results are used to generate a due diligence report. The method realizes the automation and self-adaptation of the due diligence process, and improves the efficiency and integrity.

This invention discloses a smart lock intelligent reliability testing system and method. The system includes a control module, a reliability testing module, a data acquisition module, and a data analysis module. The control module is configured to send test commands to the reliability testing module; the reliability testing module is configured to respond to the test commands and drive the target smart lock to complete the test; the data acquisition module is configured to detect the operating status information of the target smart lock during the test and feed it back to the data analysis module; the data analysis module is configured to obtain test results based on the operating status information and feed them back to the control module for decision-making on subsequent test commands. This invention designs a safe, accurate, and intelligent reliability testing system, significantly saving testing manpower and time, and can simulate the actual application scenarios of smart locks, providing feedback on whether the smart lock truly opens and closes, thus ensuring the security and reliability of the smart lock.

The application discloses a method for quickly generating motor train unit train number information and related products, and belongs to the technical field of motor train unit train number information generation. The method for quickly generating motor train unit train number information provided by the application generates basic data by acquiring a motor train unit passenger train operation diagram, a motor train unit train number list and old version motor train unit train number information, then detects whether the basic data meets preset standards, automatically calculates and solves new version motor train unit train number information for the basic data meeting the preset standards, and outputs abnormal conditions and modifies the basic data not meeting the preset standards, so that the correctness of input data is ensured. The method can automatically generate a new version motor train unit train number information file according to the basic data, and greatly improves the efficiency and accuracy of train number information file production.

This application relates to the field of compilers, and in particular to a method for dynamically allocating caller-saved register storage space. Applied to the register allocation stage, it includes the following steps: obtaining the set of caller-saved registers that need to be saved at the current call point; obtaining the required storage space size N for the current call point based on the set of caller-saved registers; allocating a contiguous storage space of size N for this call by adjusting the stack pointer before generating the save instruction; writing the values ​​of the caller-saved registers that need to be saved at the current call point into the contiguous storage space of size N; executing the function call instruction; after the function call returns, restoring the values ​​of each caller-saved register written in the contiguous storage space of size N to the corresponding caller-saved register; and restoring the stack pointer to release the contiguous storage space of size N. This invention can solve the problems of stack space waste, high complexity, and susceptibility to errors.

The application provides a Cache write cache device and a control method thereof, and relates to the technical field of artificial intelligence chips. The device comprises: a write cache table for storing a plurality of write cache entries, each write cache entry corresponding to attribute information of a Cache line; a memory for storing data of the Cache line corresponding to each write cache entry; a write cache control unit for processing storage requests and loading requests based on the write cache table, and for writing the data of the Cache line corresponding to the write cache entry from the memory to a data storage unit when a preset write-back condition is met; a loading request queue for buffering loading request information from a previous execution unit or a previous Cache; and an effective address generation module for generating a corresponding effective write-back address according to a write data effective flag signal recorded in the write cache entry when performing a write-back operation. The application effectively reduces the write-back pressure on the lower-level storage, eliminates the structural blockage of the storage backend to the computing frontend, and significantly improves the overall memory access efficiency and computing throughput.

The application discloses a kind of four-legged wheeled robot inverse kinematics calculation methods based on four degrees of freedom, belong to the field of robot control.The application first designs the desired input body pose, foot end position and wheel yaw angle, then, using the screw theory to solve the forward kinematics equation of single leg end, the motion relative relationship of absolute space is mapped to single leg inverse kinematics equivalent numerical equation, the initial value of design solving method is designed, finally, Levenberg-Marquardt numerical method is used to solve four nonlinear equations.The application realizes the precise inverse kinematics calculation of four-legged wheeled robot fast and accurately, both accuracy and real-time performance of calculation are guaranteed.The application can be used for the inverse kinematics calculation of four degrees of freedom four-legged wheeled robot.

This application provides a data transmission method, apparatus, chip, medium, and product, relating to the field of data transmission technology. The method includes: acquiring a target protocol data unit; acquiring the superframe number corresponding to the target protocol data unit and determining the superframe number corresponding to the target protocol data unit as a first target superframe number; acquiring a second target superframe number corresponding to a protocol data unit to be transmitted; calculating the absolute value of the difference between the first target superframe number and the second target superframe number; and controlling the transmitting end to stop transmitting the protocol data unit to be transmitted to any of the multiple transmission paths when the absolute value of the difference between the first target superframe number and the second target superframe number is detected to be greater than a first preset value. By limiting the absolute value of the difference between the first target superframe number and the second target superframe number, the HFN out-of-sync problem between the transmitting and receiving ends can be actively avoided, ensuring the smoothness and correctness of data transmission and reception, and has advantages such as low cost, high efficiency, and simple implementation.

This application discloses a data repair method and related apparatus, applicable to high-performance computing and other scenarios, to promptly repair faulty bits and ensure the correctness of subsequent HBM data reading and writing. The method includes: obtaining first information including a first field, the first information indicating the repair operation identified by the first field to be performed on the faulty byte in the faulty Dword that needs to be repaired; after determining that the repair operation identified by the first field needs to be performed on the faulty byte in the faulty Dword according to the first information, obtaining the first bit of the faulty byte, the first bit being the faulty bit in the Dword; obtaining the bit width value of the second bit of the target byte, the target byte being either the faulty byte or a redundant byte in the HBM; updating the bit width value of the first bit of the faulty byte based on the bit width value of the second bit of the target byte to repair the first bit.

This invention discloses a method and apparatus for scheduling stream processing tasks. The method includes: receiving a task migration request initiated by a user; determining the task migration trigger time and task migration strategy based on the task migration request; acquiring each computing resource node involved in the task migration and controlling the coordinator responsible for task migration to schedule each computing resource node according to the task migration time and task migration strategy to execute the task migration; injecting a special delimiter event into the data stream of the stream processing job during the task migration process; using the special delimiter event to disconnect the task to be migrated from all its upstream and downstream tasks; and simultaneously deploying the task to be migrated to the computing resource node where the task needs to be migrated. This method can achieve the scheduling of stream processing tasks, solving the problems of long-term pauses in data stream processing caused by restarting jobs in existing technologies, resulting in significant performance fluctuations and instability.

The application discloses a data query method and device, computer equipment and a readable storage medium. The method comprises the following steps: in response to a login request of a user, sending a plurality of preset labels to a user terminal for display, wherein the plurality of preset labels comprise a plurality of device labels and a plurality of attribute labels; receiving a label selection result sent by the user terminal, and obtaining at least one target label included in the label selection result; determining at least one target storage path according to the at least one target label and a preset mapping relationship; and calling at least one item of device data according to the at least one target storage path. Through the electronic storage mode of the data label, the efficiency and accuracy of device data searching are improved, thereby improving the device maintenance efficiency. Meanwhile, the loss and damage of device drawings are avoided, the errors or abnormalities caused by low data clarity are reduced, the correctness of device data is ensured, and the accuracy of maintenance and troubleshooting of operation and maintenance personnel is ensured.