5 results about "Error processing" patented technology

A control method for error handling in a controller, a storage medium thereof, the controller, and a storage device. The controller is used in a first device capable of linking a second device in accordance with an interconnection protocol. The control method includes the steps of: processing, by the controller, first error information by sending a negative acknowledgement control message to the second device in accordance with the interconnection protocol, wherein the first error information indicates a first error that occurred when the controller performs data reception at a protocol layer in accordance with the interconnection protocol; and setting error handling state data to indicate that error handling is declared for the first error information, so that the controller does not handle a sequence number error that occurs after the first error until the error handling state data is set to indicate that the error handling is undecleared.

The application provides an input / output instruction management method and device, electronic equipment and a storage medium, which are applied to a storage hardware device. The method comprises the following steps: in response to receiving an input / output instruction issued by a host, sending the input / output instruction to a back-end storage device, and returning response information of the back-end storage device to the host; in response to receiving an error code of the input / output instruction returned by the back-end storage device, mapping the error code into an error processing code and recording the error processing code in a history record table corresponding to the input / output instruction; in response to receiving the error processing code, performing error processing on the input / output instruction according to the error processing code; in response to completing the error processing, obtaining a device path corresponding to the history record table and the back-end storage device; and determining a retry path according to the history record table and the device path and resending the input / output instruction to the back-end storage device according to the retry path. A new retry path is selected through historical error records and influence factors.

This invention relates to the field of storage, and more particularly to a firmware testing method, apparatus, device, and medium for solid-state drives (SSDs). The method includes: writing test data to the SSD using a testing tool FIO; generating and injecting at least one error while the FIO tool is reading the test data; determining whether a data recovery process corresponding to the at least one error exists in serial port printing; confirming that the error handling process code in the firmware is normal if a data recovery process corresponding to the at least one error exists; and confirming that the error handling process code in the firmware is abnormal if no data recovery process corresponding to the at least one error exists. The solution of this invention effectively verifies the functionality of the SSD error handling process code, effectively eliminates unknown errors in the firmware code, improves product pass rate, and enriches the firmware testing methods for SSDs.

This application provides a bus communication code error processing device, method, and ultrasonic radar driving device. The device includes: a decoding module connected to the bus, used to receive first information from the bus and decode it to obtain second information; wherein the first information includes command information and data code information; an error symbol detection module connected to the bus and the decoding module, used to receive the first information and the second information, detect and judge error symbols in the bus communication code, and generate error flags; an error processing module connected to the error symbol detection module and the decoding module, used to receive the error flags, classify the error flags to generate error flag classification results, and control the decoding module to enter different decoding states according to the classification results; and a circuit system control module connected to the error processing module and the decoding module, used to receive the error flag classification results and control the circuit system according to the error flag classification results. The technical solution of this application detects error communication codes in real time through hardware circuitry, which can greatly improve the system's automation capability and increase detection efficiency and stability.

The application provides an error processing method of a NAND FLASH controller, and belongs to the technical field of data storage. The method comprises the following steps: determining an operation stage to which an error of a NAND FLASH controller belongs in the process of managing the NAND FLASH, wherein the operation stage at least comprises one of the following: a writing stage, a reading stage and an erasing stage; determining an error type according to the operation stage to which the error belongs and a cause of the error; if the error type belongs to an unrecoverable error, controlling an operating system to enter a kernel panic state; and if the error type belongs to a recoverable error, performing error processing according to the error type. The application can identify various NAND FLASH operation errors and perform accurate and efficient processing according to different error types.