43results about How to "Error recovery" patented technology

Improved data transport and management within a network communication system may be achieved by utilizing a transmit timer incorporated within the sender device and exploiting host-level statistics for a plurality of connections between a sender and receiver. The period of the transmit timer may be periodically adjusted based on a ratio of the smoothed round-trip time and the smoothed congestion window, thereby reducing or eliminating bursty data transmission commonly associated with conventional TCP architectures. For applications having a plurality of connections between a sender and a receiver that share a common channel, such as web applications, the congestion window and smoothed round trip time estimates for all active connections may be used to initialize new connections and allocate bandwidth among existing connections. This aspect of the present invention may reduce the destructive interference that may occur as different connections compete with one another to maximize the bandwidth of each connection without regard to other connections serving the same application. Error recovery may also be improved by incorporating a short timer and a long timer that are configured to reduce the size of the congestion window and the corresponding transmission rate in response to a second packet loss with a predefined time period in order to increase resilience to random packet loss.

An error-handling framework is provided for business process transactions. The error-handling framework facilitates coordination of the invocation of exception and compensation handlers in response to errors. The error-handling framework includes support for custom ordering of compensation actions, data flow into and out of compensation actions, and management of the process state visible to compensation actions.

Embodiments of the present invention disclose a technique for providing an indication whether data stored on a disk drive are invalid. As used herein, invalid data are data written prior to the disk drive being added to an array of the disk drives or data in a block that has become free and which has been removed from the corresponding parity block of the stripe. Knowing that the disk drive was written prior to the drive being added to the existing array or having data which has become invalid allows a storage server to ignore the invalid data and not to use it when computing parity (i.e., a data protection value computed as a result of a logical operation on data blocks in a stripe in the array of disk drives). This, in turn, eliminates the need to zero disk drives or to perform parity re-computation prior to using the disk drives.

A robust fine granularity scalability video encoding includes a base layer encoder and an enhancement layer encoder in which motion compensated difference images are generated by comparing an original image to predicted images at base layer and enhancement layer with motion compensation. Based on leaky and partial predictions, a high quality reference image is constructed at the enhancement layer to improve temporal prediction. In the construction of the high quality reference image, one parameter β controls the number of bitplanes of the enhancement layer difference coefficients used and another parameter α controls the amount of predictive leak. A spatial scalability module allows the processed pictures at the base layer and the enhancement layer to have identical or different spatial resolutions.

A method and a device for visual management of metadata. An area with a plurality of data elements is visualized (504) to the user who determines (508) a route on the area, said route including a number of preferred elements belonging to the plurality of elements, which is detected (512). The preferred elements shall act as targets for a predefined metadata operation (514), e.g. change of a metadata attribute value.

An external memory based FIFO (xFIFO) apparatus coupled to an external memory and a register bus is disclosed. The xFIFO apparatus includes an xFIFO engine, a wDMA engine, an rDMA engine, a first virtual FIFO, and a second virtual FIFO. The xFIFO engine receives a FIFO command from the register bus and generates a writing DMA command and a reading DMA command. The wDMA engine receives the writing DMA command from the xFIFO engine and forwards an incoming data to the external memory. The rDMA engine receives the reading DMA command from the xFIFO engine and pre-fetches a FIFO data from the external memory. The wDMA engine and the rDMA engine synchronize with each other via the first virtual FIFO and the second virtual FIFO.

A method for transmitting video information is shown, in which at least a first bit-stream (510) and a second bit-stream are formed. The first bit-stream (510) includes a video frame, and the second bit-stream (520) includes a predictive video frame (524). Different encoding parameters are used with encoding of the frames of the first bit-stream (510) and the second bit-stream (520). A frame of the first bit-stream (510) is transmitted, and the transmission is switched over from the first (510) to the second bit-stream (520) during which a secondary switching frame (550) is transmitted encoded using the encoding parameters of the second bit-stream (520) and at least one reference frame from the first bit-stream (510). The secondary switching frame (550) is used as a reference frame in the reconstruction of the predictive video frame (524) of the second set of video frames.

A system and method for testing information handling systems distributes test units across a network to communicate with a test server. The test server communicates test executables and runtimes to the test units according to scripts of a script package, test engines associated with the test server and a test unit profile. To load and execute an executable and runtime on a test unit, a test controller associated with the test server sends an execution identifier to a test unit process abstraction layer controller. A validator of the test unit controller responds to the execution identifier with test unit configuration profile information that the test server controller applies to one or more test engines and a script to generate an executable and runtime that is sent to the test unit controller. An activator of the test unit process abstraction layer controller activates the executable scripts through the runtime and tracks test results. The test unit process abstraction layer controller provides improved stability during test unit failures and remote control of runtime functions, such as dynamic runtime duration, pause and abort functionality.

An improved system and method for extending interface communications for a SCSI. The system and method provides SCSI extenders that are able to extend SCSI communications over relatively long distances between at least two SCSI interfaces while also being fast and efficient in operation and inexpensive in implementation. The present system and method reduces latency, buffering, error recovery code, and other such additional hardware and software. SCSI signals are received from one SCSI interface, and the SCSI signals from the one SCSI interface are parallel loaded into a parallel register. The SCSI signals from the one SCSI interface are serialized into serial data, and the serial data from the parallel register is transmitted over an optical communication system. The transmitted serial data is converted back to the SCSI signals that were originally from the one SCSI interface. The SCSI signals that were originally from the one SCSI interface are received by and shifted into a data management and driver system, and the data management and driver system is used to manage and drive the SCSI signals from the one SCSI interface to another SCSI interface. The same system and methodology is applied to extend communications in both directions between the at least two SCSI interfaces. The data management and driver system arbitrates, selects, and drives SCSI signals from one SCSI interface to another SCSI interface. The data management and driver system includes a receive serial shift register and a driver logic device.

The present invention relates to a reconstructed low-frequency data frequency domain full-waveform inversion method based on a convolution idea and an accurate earthquake source. The method comprisesthe steps that: a reliable earthquake source function is inverted by employing direct wave components of observation data; low-frequency data of self-excited self-closing points is reconstructed basedon the convolution idea; and finally, the reconstructed data is applied to perform a low-frequency starting part of multi-scale full-waveform inversion to allow the inversion to have a good beginningand finally obtain a good result. The method provided by the invention effectively avoids occurrence of cycle skips, so that the inversion result is greatly improved, and minimum convergence of various errors is effectively recovered. An idea of a supergun of dynamic random coding is employed at the final inversion part, so that the efficiency of the full-waveform inversion is effectively improved. The reconstructed low-frequency information of the self-excited self-closing points are low-frequency information on the aspect of mathematics to provide large-scale disturbance for the full-waveform inversion, are real low-frequency information on the aspect of objective physics, and can be used for other data processing directions.

One embodiment facilitates error recovery. During operation, the system receives an input/output request indicating data associated with a first logical block address. The system detects, in a mapping table, an error associated with the first logical block address, wherein the mapping table maps logical block addresses to physical block addresses. The system identifies a dedicated block which stores log entries with logical block addresses corresponding to sequentially programmed physical blocks. The system performs a search in the dedicated block to obtain a most recent valid log entry for the first logical block address. The system obtains a first physical block address corresponding to the first logical block address based on the sequentially programmed physical blocks or the dedicated block. The system executes the I/O request by accessing the first physical block address.

The invention mainly discloses a voice data coding and decoding method comprising the following steps: (a) coding voice data sent by a channel side to get a voice information packet Ss; (b) adding packet length and timestamp information to the header of the information packet Ss to get an extended information packet Ss', and pressing the extended information packet Ss' into a voice queue; (c) performing RS error-correction coding on the information packet Ss' through an RS coding mode to get a redundant packet Rs, adding related protection information to the header of Rs to get an extended redundant packet Rs', and packaging the information packet Ss and the extended redundant packet Rs' together to generate a combined packet; and (d) at a channel receiver, recovering a lost information packet by means of RS packet-loss recovery according to the information packet and the redundant packet received. The channel receiver unpacks and calibrates the received combined packet. If the sum of the number of associated information packets SN and the number of associated redundant packets RN is greater than or equal to k, the combined packet is transferred to the packet-loss recovery operation and then decoded. According to the method, whether a wrong packet can be recovered is detected at the receiver, and a wrong packet is recovered immediately if the wrong packet can be recovered. Delay is reduced. The problem concerning voice quality caused by network packet loss, delay and jitter is repaired effectively.

The invention relates to a state diagram-based coding verification method. The method comprises the following steps: 1) describing a target software requirement by using an ArgoUML state diagram, and carrying out requirement analysis; 2) taking a file output by ArgoUML as an extraction object to extract a state diagram description file; 3) analyzing the state diagram description file so as to obtain a node state, migration information and a state attribute of the state diagram; 4) converting the ArgoUML state diagram into a target MuSMV code according to the obtained node state, migration information and state attribute of the state diagram; 5) automatically extracting an inspection property and providing the inspection property to users in an interaction manner for secondary edition; and 6) calling an NuSMV inspector to execute inspection, returning whether the inspection property is satisfied or not, and if the inspection property is not satisfied, giving an error position point and displaying a route sequence. Compared with the prior art, the method disclosed in the invention can be used for carrying out modeling aiming at the software requirement and realizing automatic inspection, and enabling the design analysts to not consider how to compile complicated NuSMV programs any more, wherein the conversion is realized automatically.

Embodiments in accordance with the present invention provide a magnetic disk drive capable of achieving error recovery stably in a simple configuration in the event of thermal asperity (TA) and minimizing the error recovery time required, and a method for controlling the disk drive. According to one embodiment, if TA occurs, a cutoff frequency of a high-pass filter to which a data read signal is input is first increased and a loop gain of a low-order finite impulse response (FIR) filter connected in series to an FIR filter is also increased as high as possible. Next, a Viterbi decoder to which a signal is input from the low-order FIR filter provides feedback to the low-order FIR filter so that an input signal error becomes a minimum. Tap coefficients of the low-order FIR filter are thus optimized.

A synchronous high speed motion stop for a series of multi-top loaders residing on “n” controllers on one rail achieves effective detection of the servo-error status and shut off of the trailing controller's servo power within 3 ITP time. The control method reduces the unnecessary error recovery because it only shuts off its immediate trailing controller without aborting its leading controller, allowing the leading controller to complete the cycle tasks. The cascade control method produces a synchronous high-speed motion stop for the robots across the controllers and effectively prevents the collision between the robots.

The present invention relates to a method and system for close range communication involving colored images preferably involving concentric circles and/or arcs as coloured image based information identifiers. More particularly, the invention is directed to a method and system to communicate information between two mobile phones using the display (Screen) and Capturing units (Camera) of the mobile devices.

A non-volatile ferroelectric memory device is provided to output variously reference voltages by applying a programmable register device to a reference generation unit. A non-volatile ferroelectric memory device includes a reference program unit and a reference voltage generation unit. The reference program unit controls and outputs a voltage of a reference level control signal by controlling a state of a switch. The switch is used for controlling a capacitor connected to the driving power by using a programmable register device for programming a level of an output signal according to an external signal. The reference voltage generation unit outputs a reference voltage according to a reference level control signal.

A synchronous serial bus features a variable data size format and an in-line addressing and data architecture. Flexible addressing allows for a variety of slave devices and configurations. Frequent parity checking during a transaction allows for faster error recovery. Repeater devices connect multiple slaves to the master using only point-to-point physical connections, thus providing multidrop architecture while at the same time ensuring excellent signal integrity and allowing a very high speed operation.

The invention relates to the field of bioinformatics, and aims to provide a computing system and acceleration platform for reconfigurable gene alignment. The computing system for the reconfigurable genetic alignment includes at least one computation module, a first interconnection module and a management module, wherein the computation modules are used for acquiring genetic alignment sub-tasks and processing the genetic alignment sub-tasks, and the genetic alignment sub-tasks are acquired by dividing a genetic alignment task; the first interconnection module is used for retrieving the results of the genetic alignment sub-tasks which are processed by all the computation modules when all the computation modules complete the genetic alignment sub-tasks, and the management module is connected to the computation modules and an interconnection device and used for monitoring the running status of the computation modules and a first interconnection module. According to the computing system and acceleration platform for the reconfigurable gene alignment, parallel processing is conducted on the genetic alignment sub-task by at least one computation module, and meanwhile the results of the genetic alignment sub-tasks which are processed by all the computation modules are retrieved by the first interconnection module so as to achieve the purpose of decentralized processing and centralized management, and thus the calculation efficiency of the gene alignment is further improved.

During the operation, a computer receives, via a common user interface for different convenience services associated with providers, ordering information for an instance of a given convenience service in the convenience services, wherein the given convenience service includes a prespecified type of deliverable that is unchanged in different instances of the given convenience service. Moreover, the given convenience service includes providing the prespecified type of deliverable at a physical location of an individual. Then, the computer modifies the ordering information based at least in part on a predefined format. Next, the computer provides the modified ordering information to a given second computer in second computers associated with the providers, where the modified ordering information is provided via an application programming interface having the predefined format and associated with the given convenience service, and providing the modified ordering information orders the instance of the given convenience service.