Non-volatile memory and method with phased program failure handling
a technology of phased program failure and non-volatile memory, which is applied in the direction of memory adressing/allocation/relocation, fault response, instruments, etc., can solve the problems of limited range of logical units and also the scattering of memory units that the updates are obsolete, and achieve good ecc and extra reliability
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[0117]FIG. 1 illustrates schematically the main hardware components of a memory system suitable for implementing the present invention. The memory system 20 typically operates with a host 10 through a host interface. The memory system is typically in the form of a memory card or an embedded memory system. The memory system 20 includes a memory 200 whose operations are controlled by a controller 100. The memory 200 comprises of one or more array of non-volatile memory cells distributed over one or more integrated circuit chip. The controller 100 includes an interface 110, a processor 120, an optional coprocessor 121, ROM 122 (read-only-memory), RAM 130 (random access memory) and optionally programmable nonvolatile memory 124. The interface 110 has one component interfacing the controller to a host and another component interfacing to the memory 200. Firmware stored in nonvolatile ROM 122 and / or the optional nonvolatile memory 124 provides codes for the processor 120 to implement the ...
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