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Non-volatile memory and method with phased program failure handling

a technology of phased program failure and non-volatile memory, which is applied in the direction of memory adressing/allocation/relocation, fault response, instruments, etc., can solve the problems of limited range of logical units and also the scattering of memory units that the updates are obsolete, and achieve good ecc and extra reliability

Inactive Publication Date: 2005-07-28
SANDISK TECH LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The invention is a memory system that allows for efficient updating of data in a non-volatile memory. The system has multiple logical groups that can be updated simultaneously, and each group has its own dedicated memory block. The system also allows for easy handling of program failures and garbage collection. Additionally, the system uses a single index to track the updates of non-sequential update blocks, which further improves efficiency. Overall, the invention provides a faster and more efficient way to update data in a memory system.

Problems solved by technology

Thus, when a logical group is being updated, the distribution of logical units (and also the scatter of memory units that the updates obsolete) are limited in range.

Method used

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  • Non-volatile memory and method with phased program failure handling
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  • Non-volatile memory and method with phased program failure handling

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Embodiment Construction

[0117]FIG. 1 illustrates schematically the main hardware components of a memory system suitable for implementing the present invention. The memory system 20 typically operates with a host 10 through a host interface. The memory system is typically in the form of a memory card or an embedded memory system. The memory system 20 includes a memory 200 whose operations are controlled by a controller 100. The memory 200 comprises of one or more array of non-volatile memory cells distributed over one or more integrated circuit chip. The controller 100 includes an interface 110, a processor 120, an optional coprocessor 121, ROM 122 (read-only-memory), RAM 130 (random access memory) and optionally programmable nonvolatile memory 124. The interface 110 has one component interfacing the controller to a host and another component interfacing to the memory 200. Firmware stored in nonvolatile ROM 122 and / or the optional nonvolatile memory 124 provides codes for the processor 120 to implement the ...

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Abstract

In a memory with block management system, program failure in a block during a time-critical memory operation is handled by continuing the programming operation in a breakout block. Later, at a less critical time, the data recorded in the failed block prior to the interruption is transferred to another block, which could also be the breakout block. The failed block can then be discarded. In this way, when a defective block is encountered during programming, it can be handled without loss of data and without exceeding a specified time limit by having to transfer the stored data in the defective block on the spot. This error handling is especially critical for a garbage collection operation so that the entire operation need not be repeated on a fresh block during a critical time. Subsequently, at an opportune time, the data from the defective block can be salvaged by relocation to another block.

Description

CROSS REFERENCE TO RELATED APPLICATIONS [0001] This application is a continuation-in-part of U.S. patent application Ser. No. 10 / 750,155, filed on Dec. 30, 2003.FIELD OF THE INVENTION [0002] This invention relates generally to non-volatile semiconductor memory and specifically to those having a memory block management system with a time-critical, program failure handling. BACKGROUND OF THE INVENTION [0003] Solid-state memory capable of nonvolatile storage of charge, particularly in the form of EEPROM and flash EEPROM packaged as a small form factor card, has recently become the storage of choice in a variety of mobile and handheld devices, notably information appliances and consumer electronics products. Unlike RAM (random access memory) that is also solid-state memory, flash memory is non-volatile, and retaining its stored data even after power is turned off. Also, unlike ROM (read only memory), flash memory is rewritable similar to a disk storage device. In spite of the higher cos...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F11/20G06F12/02G11C7/00G11C11/56G11C16/10G11C16/34G11C29/00
CPCG06F11/1072G11C2211/5641G06F11/1415G06F11/1658G06F11/1666G06F12/0246G06F2212/7202G06F2212/7203G06F2212/7205G06F2212/7208G11C11/5621G11C11/5628G11C16/102G11C16/105G11C16/20G11C29/00G11C29/76G06F11/141G11C16/16G11C16/10
Inventor GOROBETS, SERGEY ANATOLIEVICH
Owner SANDISK TECH LLC
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