Non-volatile memory and method with phased program failure handling

Abstract

In a memory with block management system, program failure in a block during a time-critical memory operation is handled by continuing the programming operation in a breakout block. Later, at a less critical time, the data recorded in the failed block prior to the interruption is transferred to another block, which could also be the breakout block. The failed block can then be discarded. In this way, when a defective block is encountered during programming, it can be handled without loss of data and without exceeding a specified time limit by having to transfer the stored data in the defective block on the spot. This error handling is especially critical for a garbage collection operation so that the entire operation need not be repeated on a fresh block during a critical time. Subsequently, at an opportune time, the data from the defective block can be salvaged by relocation to another block.

Description

CROSS REFERENCE TO RELATED APPLICATIONS [0001] This application is a continuation-in-part of U.S. patent application Ser. No. 10 / 750,155, filed on Dec. 30, 2003.FIELD OF THE INVENTION [0002] This invention relates generally to non-volatile semiconductor memory and specifically to those having a memory block management system with a time-critical, program failure handling. BACKGROUND OF THE INVENTION [0003] Solid-state memory capable of nonvolatile storage of charge, particularly in the form of EEPROM and flash EEPROM packaged as a small form factor card, has recently become the storage of choice in a variety of mobile and handheld devices, notably information appliances and consumer electronics products. Unlike RAM (random access memory) that is also solid-state memory, flash memory is non-volatile, and retaining its stored data even after power is turned off. Also, unlike ROM (read only memory), flash memory is rewritable similar to a disk storage device. In spite of the higher cos...

AI Technical Summary

Benefits of technology

[0022] The efficient use of system resource allows multiple logical groups to be updated concurrently. This further increases efficiency and reduces overheads. Alignment For Memory Distributed Over Multiple Memory Planes

[0032] In one embodiment, after two copies of a given data have been programmed in an earlier programming pass, a subsequent programming pass avoids programming the memory cells storing at least one of the two copies. In this way, at least one of the two copies will be unaffected in the event the subsequent programming pass aborts before completion and corrupts the data of the earlier pass.

Problems solved by technology

Thus, when a logical group is being updated, the distribution of logical units (and also the scatter of memory units that the updates obsolete) are limited in range.

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