222 results about "Error reporting" patented technology

The invention discloses a method for processing an uncorrectable error of bus equipment and a server, relates to the technical field of servers, and aims to reduce the reporting frequency of the uncorrectable error by setting a suppression identifier of the uncorrectable error of the bus equipment and a time window of uncorrectable error statistics, and improve the reporting efficiency of the uncorrectable error when the uncorrectable error is triggered for the first time. According to the method, uncorrectable errors are reported, the uncorrectable errors are captured, it is ensured that initial errors are not missed, and when the error count of a time window is larger than a reporting threshold value, reporting is carried out again, error missing processing of error aggravation is avoided, redundant error reporting is reduced, an error reporting storm is inhibited through an inhibiting identifier, and the error reporting efficiency is improved. Therefore, the influence of frequent error triggering on the availability of a server system and normal operation of other services is reduced, the reliability of the server is improved, and the technical problems that frequent error triggering cannot be corrected, other service requirements are covered and the availability of the server system is influenced in the related technology are solved.

The invention discloses an intelligent news content error correction system based on a large model, particularly relates to the technical field of big data, and aims to extract key entity information of figures, positions and institutions in news texts and identify time sequence feature words in position description so as to identify association relationships among entities; historical job change records and latest information are obtained from multiple data sources, reliability scoring is performed through a large model, a multi-modal evidence chain with time sequence attributes is constructed, a prediction model is trained based on historical job data, the change probability of a specific job in a future time period is calculated, and space-time consistency of job information is analyzed. And in combination with the output change probability, identifying errors by comparing a multi-source evidence chain, implementing priority verification on a high-probability change event, generating a hierarchical error report, outputting a correction suggestion, updating an error correction result in real time, implementing two-factor authentication on the correction suggestion, and storing a typical job change mode and a correction scheme by creating a historical case library.

An approach is provided for large language model (LLM) map feedback reporting. The approach involves, for example, processing an input specifying a map error / feedback using an LLM to classify a map error type. The approach also comprises determining a map error template based on the map error type that specifies structured data fields for the map error type. The approach further involves using the template to construct prompts for the LLM to generate questions to collect data items for populating the data fields, and providing the prompts to the LLM to generate the questions and collect the data items from the user. The approach further involves using template to generate additional prompts to generate a map error report of the data items in a structured data format, and providing the additional prompts to the LLM to generate the map error report for transmission to a map feedback system.

The invention discloses a cross-device memory dynamic complementary utilization method based on CXL protocol interconnection and a computer system. The method comprises the following steps that an ECC module of a memory detects data in the data transmission process; when a data error is detected, the error is positioned by the ECC module, the error counting module corresponding to the position is updated, and an error report is generated; when the counting value of the error counting module reaches a set threshold value, the area corresponding to the position is marked as a failure area; evaluating the states of all memories based on the spatial dimension, the health dimension, the time delay dimension and the load dimension, and selecting a target memory according to an evaluation result of the states of the memories; distributing a new logic address for the failure area based on the error report and a selected target memory; the logic address is transmitted to a target memory through a CXL protocol, and an address mapping table is updated at the same time; and after the mapping is successful, migrating the data of the failure area to the healthy area of the target memory by the system through a CXL protocol.

The invention discloses a large model query generation system and method combining graph structure analysis and execution, and the system comprises a graph mode standardization module which converts a description file into a unified structured representation; the large language model module is used for screening out nodes, edges and sub-graph modes required by query statements according to the natural language problem and the structured representation of the user; the graph mode detection module is used for detecting and modifying the screened nodes, edges and sub-graph modes through scripts; the large language model module generates an initial query statement according to a natural language problem of a user and detected and modified nodes, edges and subgraph modes; the query statement detection module is used for detecting the initial query statement through a script and generating an error report; and the large language model module generates a modified query statement. According to the large model query generation system and method combining graph structure analysis and execution, the accuracy of graph mode selection is remarkably improved through the thinking ability of the large language model and the script error detection ability, and therefore the quality of graph database query statement generation is improved.

The invention belongs to the technical field of integrated circuit testing, and particularly relates to an FPGA software and hardware cooperation testing platform based on a BFM. The test platform is formed by connecting a BFM with a Testbench, an AXI bus, an off-chip DDR and a DUT. The test process comprises the steps that the Testbench issues parameters through a transaction function interface, the BFM reads an excitation vector from the off-chip DDR / on-chip BRAM through an Avalon main interface, adaptive transmission of a system bus clock domain and a DUT clock domain is completed through double asynchronous FIFO (SNDfifo / RECfifo), and signal level interaction with the DUT is achieved through a pin protocol interface; the state machine dynamically switches long and short simulation modes according to the vector length, and drives the output vector to be written back and stored; the error monitoring unit monitors data flow faults in the whole process and outputs seven types of error reporting codes. The simulation equivalent frequency reaches a 10 megahertz level, and the method is suitable for efficient verification of the digital IC.

The invention provides a two-hop incremental interface consistency verification method and system based on a knowledge graph, and the method comprises the steps: 1, carrying out the language analysis of a modified source file, and extracting an interface entity; 2, mapping the interface entity into a language-independent meta-model, and writing the language-independent meta-model into a knowledge graph; 3, executing a two-hop breadth-first traversal algorithm by taking a modified node in the knowledge graph as a starting point to obtain an affected sub-graph; 4, a hot-pluggable rule set is operated on the affected subgraph for verification, the rule set comprises a parameter number matching rule, a type compatibility rule, a version number increasing rule and a field deletion forbidding rule, and if verification is illegal, an error report is generated, and a blocking instruction is output; and if no violation exists in the verification, merging the affected sub-graphs back to the knowledge graph cache. According to the method and the device, online faults caused by field missing during operation are avoided, and the influence of back-end change on the front end is automatically detected and blocked.

The invention discloses an error reporting method of a processor platform and electronic equipment, and relates to the technical field of computer hardware, and the error reporting method comprises the steps that a plurality of error identifiers of the processor platform are acquired, and the error identifiers are used for representing information of fault types of the processor platform; the prediction model is constructed according to the historical data and the real-time operation parameters, the prediction model can improve the predictive maintenance capability of the processor platform, and then the fault type generated by the processor platform in a period of time in the future is determined according to the error identifier and the prediction model. The technical problem that a processor platform is difficult to warn potential faults in advance in the prior art can be solved, and the technical effects that the fault which is about to occur on the processor platform can be detected in time, then the fault is processed in time according to the prediction result, and the chance of taking preventive measures before the fault occurs is prevented from being missed easily are achieved.

An example operation may include one or more of receiving a report of an error from an installation process of a software program as the installation process is being performed by a computer, executing an artificial intelligence (AI) model to predict at least one instruction to fix the error based on the report of the error, and presenting the at least one instruction via a graphical user interface of the computer associated with the installation process.

A system comprises a machine check architecture and a processor. The machine check architecture is configured to log hardware errors. The processor is configured to obtain a log of one or more of the hardware errors from the machine check architecture and / or to generate a copy of the log. The processor is further configured to either (1) deliver the log to an in-band agent and the copy of the log to an out-of-band agent or (2) deliver the copy of the log to the in-band agent and the log to the out-of-band agent. Various other devices, systems, and methods are also disclosed.

The invention belongs to the technical field of large language models, and provides a financial text logicality evaluation method and system based on an AI Agent. The method comprises the following steps: performing digital conversion and preprocessing on an original financial text, segmenting according to a logic structure, and extracting key information to obtain structured standard data; performing fine tuning and initialization on the pre-trained large language model, and constructing a reasoning Agent and an reflecting Agent; based on a chain thinking prompt and a logic knowledge base, a reasoning Agent is guided to analyze the structured standard data, and logic vulnerabilities are identified; the method comprises the following steps of: performing rechecking through a reflection Agent, performing classification integration on logic vulnerabilities through a topic modeling technology, outputting a logic error report, performing visual display, and performing user-defined format export. According to the method, deep context expression and complex logic errors in the financial text can be accurately recognized, and financial text analysis requirements under different business scenes are met.

The invention discloses an automatic testing system and method for a modular interface, and relates to the technical field of interface testing, and the system comprises an interface analysis module which is used for loading a to-be-analyzed interface document and extracting interface basic information from the to-be-analyzed interface document; the test case generation module is used for generating test cases of normal and abnormal scenes based on the interface basic information and a preset case template; the interface information comparison module is used for automatically detecting updating of an interface document, positioning changed content and synchronously updating a test case before the test is executed; the test execution module is used for executing an interface test by calling a test tool or a built-in Selenium interface automation framework; the test data analysis module is used for collecting test data generated in a test process in real time, and calling AI model analysis to quickly position an interface error reason; and the test document output module is used for summarizing the test data and the AI analysis result and generating a test report in multiple dimensions. According to the invention, the test and maintenance work of various interfaces can be rapidly and accurately completed.

The invention relates to a multi-node memory synchronization method and device, equipment, a storage medium and a program product. The method comprises the following steps: establishing connection among nodes in a distributed system, configuring local / far-end queues for recording the busy degree of a thread for each node, creating a queue pair associated with a unique doorbell address for each node in combination, and optimizing a retention rule and an error reporting mechanism of a working queue element (WQE) in the queue pair, so that the busy degree of the thread is recorded; batch synchronization of multi-node memory data is achieved by adding an RDMA write operation WQE recording the busy state of a thread before a far-end mapping memory area is newly added and triggering hardware to execute RDMA write operations corresponding to all WQEs in a queue pair in sequence when the busy state of a local thread is updated. By the adoption of the method, the switching frequency of a CPU core between the synchronization task and the calculation task can be reduced, efficient, low-overhead and high-reliability multi-node memory synchronization is achieved, and the method meets the performance requirement of a large-scale distributed system.

The embodiment of the invention discloses a data synchronization method, device and system. In a scene of synchronizing data streams of a physical layer, the synchronization process of the data streams can be timed. Furthermore, whether the data stream with the time length meeting the timeout condition exists in the synchronization process is judged, which is equivalent to whether the situation that the synchronization time is too long exists. If the condition that the synchronization time is too long exists, it is indicated that a system fault or link deterioration may occur, then corresponding timeout processing, such as error reporting and system resetting, needs to be carried out, so that the system fault or link deterioration can be dealt with in time, and the data transmission efficiency is optimized.

The invention discloses an RPA process error positioning and repairing scheme based on a large language model, which is applied to an RPA process. Comprising the following steps of 1, capturing error events in RPA process execution in real time, collecting key information, and performing data structured processing on the collected key information to obtain structured error reporting information; 2, introducing a problem positioning Agent big language model, designing a problem positioning cue word, analyzing the context of the structured error report information, and obtaining an error positioning result; step 3, introducing a suggestion providing Agent large language model, designing suggestion providing cue words, analyzing error reasons based on an error positioning result and the structured error information, and generating repair suggestions; and 4, analyzing and integrating the error positioning result and the repair suggestion, and feeding back to a user in a visual form. According to the invention, the error positioning of the RPA process can be realized, the repair suggestion can be provided, the repair use threshold of the error report of the RPA process is reduced, and the maintenance efficiency of the RPA process is improved.

The invention discloses an information processing method, a chip system and electronic equipment, the chip system comprises a plurality of core particles, in each processing period, one core particle in the chip system is configured as a main core particle, the other core particles are configured as slave core particles, and the information processing method comprises the following steps: when the slave core particles obtain error information, the error information is sent to the chip system; determining, by the slave core particle, an information level of the error information; and under the condition that the information level meets the error reporting condition, the error information is sent to the main core particle by the slave core particle, so that the error information is processed by the main core particle.

The invention discloses a method and device for storing crash information, and relates to the technical field of safety protection. The method comprises the following steps: when a first kernel is started, reserving a system memory with target capacity as an information storage area through the first kernel; when the firewall is started, loading the second kernel into the memory by using the kernel calling command; when it is detected that the first kernel crashes, based on a crash recording function, crash information needing to be stored is written into the information storage area; wherein the crash information is used for representing an error report recorded in real time when the kernel crashes; after the second kernel is started, a crash information reading tool is used for reading the data in the information storage area and writing the data into a disk, a crash information record is obtained, and restarting operation is executed. The method is used for achieving the function of storing the crash information.

In various examples, static single assignment-based control flow graph traversal analysis for uninitialized variable detection system and methods are disclosed. A pre-compiler stage of a compiler system, may reconstruct source code into an SSA form IR and detect and identify uninitialized variables based on applying a variable analysis pass that traverses a CFG corresponding to the SSA form IR. A variable analysis pass may traverse through the CFG to build a defined variable map and a Phi variable map. The maps may be used to map undefined variables to basic blocks of the CFG where the undefined variables occur. The variable analysis pass may pass uninitialized variable data to a compiler error handling process. The compiler error handling process may produce an error report that traces the basic block with undefined variables to lines of the source code to assist in efficiently debugging the source code.

An exemplary computing device comprises an in-band processor and an out-of-band controller. The exemplary computing device also comprises a machine check architecture that includes a pipeline and a plurality of error detectors. The error detectors are configured to detect errors that occur in a plurality of circuits and report the errors to the in-band processor and the out-of-band controller via the pipeline. Various other devices, systems, and methods are also disclosed.

An exemplary computing device comprises an in-band processor and an out-of-band controller. The exemplary computing device also comprises a machine check architecture that includes a pipeline and a plurality of error detectors. The error detectors are configured to detect errors that occur in a plurality of circuits and report the errors to the in-band processor and the out-of-band controller via the pipeline. Various other devices, systems, and methods are also disclosed.

The invention discloses a processing method for correctable errors of a graphics processor and electronic equipment, relates to the technical field of servers, and aims at the graphics processor to determine a flexible processing strategy for correctable errors from double angles of error reporting time and error reporting times, so that the occupation of correctable error processing on the processor and bus resources is greatly reduced. Based on an intelligent time window and time threshold mechanism, the method can distinguish instantaneous interference from hardware faults, so that excessive interference of accidental errors on the system is avoided, the problem of hardware degradation can be warned in advance, and sufficient time is won for system maintenance.

According to the stocktaking robot, a plurality of modularized stocktaking units are stacked on a movable guide trolley in the vertical direction, so that a multi-layer structure is formed, cameras and lamps are installed on the stocktaking units respectively, the guide trolley moves to the parcel stacking position for shooting, and therefore information of bar codes on parcel surface sheets is scanned; therefore, the server can register and store the logistics information or notify the next process and the like, and also can send an error reporting signal to a package of which the information cannot be effectively read so as to notify a worker to process the package. Through the stocktaking robot, parcels can be quickly and accurately stocktaken, the working efficiency and accuracy are effectively improved, the possibility of mistaken stocktaking, mistaken stocktaking and missing stocktaking is greatly reduced, the stocktaking units in modular design are adopted, the specific number can be conveniently set according to needs, and the stocktaking robot is convenient to use. Therefore, the use requirements of various warehouse environments can be conveniently met.

In a wireless communication system, at least one UE detects GNSS signal spoofing / jamming and reports a detected spoofing / jamming attack to a server in the network apparatuses using an extended LPP GNSS error reporting format with an additional error cause and an attack probability metric. Further, the network apparatuses may take an implementation-dependent decision depending on crowd-sourced information of one or more spoofing / jamming attack reports received from one or more UEs.

Implementations for chiplet fault management through hierarchical error reporting and coordinated recovery in an accelerator interconnect. In some implementations, a system for a UALink-based network comprises a chiplet die coupled to an accelerator die, a management agent on the accelerator die, and a centralized controller. Upon fault detection, the chiplet die transmits a fault notification to the accelerator die, the management agent reports the fault to the centralized controller, and the centralized controller determines a recovery action based on the fault identifier and severity. In some implementations, the accelerator die reports the fault through dual paths, to a host processor via CXL or PCIe error reporting and to the centralized controller via the management agent, and the host processor and the centralized controller coordinate recovery, with the host managing workload-level recovery and the centralized controller managing network-level recovery.

The invention discloses an Excel data verification processing method and system based on dynamic annotation configuration, and relates to the technical field of data verification. The method comprises the following steps: after receiving an Excel file uploaded by a user, dynamically analyzing entity class annotation configuration data through a reflection mechanism to obtain a (at) Excel CheckProperty annotation labeled for an Excel column field, initializing a verification rule based on an analysis result, then performing batch data analysis processing on the Excel file to obtain current batch data to be verified and containing multi-row information, and performing data verification on the current batch data to be verified. The method comprises the following steps: initializing a verification rule, sequentially traversing and verifying each row of information in the current batch of data by applying the initialized verification rule to collect abnormal information, and finally, after all batches of data are verified, generating and outputting a data verification error report based on all the collected abnormal information. Therefore, the method has the advantages of configurable verification rule, high processing efficiency, high error positioning precision and / or low memory consumption and the like, and is convenient for practical application and popularization.

Embodiments of the present application provide a register state monitoring system, method and product. The system comprises: a static monitoring module configured to, according to register information of any first register in a static monitoring linked list, send an error reporting message corresponding to the first register to an error recovery module when a state error of the first register is monitored; a dynamic monitoring module configured to, according to register information of any second register in a dynamic monitoring linked list, send an error reporting message corresponding to the second register to the error recovery module when a state error of the second register is monitored; and the error recovery module configured to, in response to the error reporting message corresponding to the first register, recover a state value of the first register, or in response to the error reporting message corresponding to the second register, recover a state value of the second register. Embodiments of the present application aim to improve the efficiency of the error recovery process.

The present application provides an interface automation testing method, testing device, and testing system, the method comprising: upon receiving error information from an error reporting interface, obtaining target log data from an error log file based on target identification information, wherein the error reporting interface is an interface in which an error occurs during a transaction, and the target log data is log data carrying target identification information, wherein the target identification information is a transaction serial number corresponding to the error reporting interface; generating a target test case based on target key data in the target log data, wherein the target test case includes at least data for testing whether the error reporting interface has a target test problem, wherein the target test problem is a test problem corresponding to the error information of the error reporting interface; and upon completion of repair of the error reporting interface, testing the corresponding error reporting interface using the target test case to verify whether the repair of the error reporting interface is successful. This method solves the problem of the inability to automatically generate test cases in the prior art.

The invention relates to the technical field of liquid crystal display, in particular to a detection method and system based on automatic recovery of a liquid crystal screen, which comprehensively judges whether the display state of the liquid crystal screen is abnormal or not by reading a register value of a screen reading IC, detecting error type information of an error report of the liquid crystal screen and a TE pin signal output by the liquid crystal screen. Once abnormality is detected, relevant display parameters are automatically adjusted, so that the liquid crystal screen recovers normal display. The scheme can effectively solve the problem of abnormal display of the liquid crystal screen, reduce the complexity of manual operation of a user, and improve the user experience. Meanwhile, the service life of the liquid crystal screen can be prolonged, and the maintenance cost is reduced.

The invention provides a cross-application Excel data import processing method and system based on cloud storage, and relates to the technical field of data processing.The method comprises the steps that a processing request of an Excel file from a front-end service application is received through a unified service center; generating a pre-signature URL of the Alicloud OSS, and returning the pre-signature URL to the front end; the front end directly uploads the Excel file to the Alicloud OSS; based on the system configuration record, performing Excel file configuration matching to obtain complete configuration information; based on a Rocket MQ Tag mechanism, delivering the message meeting the condition to a corresponding target business application; the target business application automatically analyzes the Excel file; performing data verification and business logic processing on the analyzed Excel file; counting service logic processing results and generating an error report; and notifying the unified service center to update the processing state according to the business logic processing result.

This application discloses a method and electronic device for error reporting on a processor platform, relating to the field of computer hardware technology. The method includes acquiring multiple error identifiers of the processor platform, which characterize the types of faults encountered by the platform. Based on historical data and real-time operating parameters, a predictive model is constructed. This model improves the predictive maintenance capabilities of the processor platform. Then, based on the error identifiers and the predictive model, the types of faults that the processor platform may experience in the future are determined. Therefore, this method solves the technical problem in related technologies where it is difficult to provide early warnings of potential faults in processor platforms. It achieves the technical effect of timely detection of impending faults in the processor platform, allowing for timely handling based on the prediction results, and avoiding the loss of opportunities to take preventative measures before faults occur.