390 results about "User design" patented technology

A method of configuring the user interface of a portable electronic device is provided. A user designed user interface is created using authoring tools at a remote server and stored. A remote server file is accessed that stores a user designed user interface. The customized interface is selected and downloaded to the device.

A Model Transformation Authoring Framework (MTAF)method and apparatus for authoring and providing model-to-model transformations from one domain to another domain is disclosed. Given a domain and a target domain, at least the given domain having a respective structured hierarchy, the invention system enables a user to specify a declarative mapping (transformation declarative) between a domain specific language modeling the given domain and a modeling language modeling the target domain. The declarative mapping models how the domain specific language modeling the given domain relates to the modeling language of the target domain. The system generates a transformation code implementation of a transformation from the given domain to the target domain. The MTAF provides to the user design decisions with respect to Specification, Transformation Rules, Rule Organization, Rule Application Control, Source-Target Relationship, Incrementality, and Directionality and Tracing. The generated transformation code is executed at runtime to perform the transformation of the domain specific language of the given domain to the modeling language of the target domain. Instances of models of the target domain resulting from the performed transformation at runtime may be output to other model transformations, to JET templates, or may be persisted, merged or chained among other post processing.

A computer-implemented method guides a user in designing a product defined by data. The method involves examining (420) items of the data to detect whether each item conforms to rules (106) or violates the rules; performing (431 . . . ) at least one action in response to a detection of a rule violation; displaying (450) the data to the user in a manner emphasizing at least one particular data item that caused the rule violation; receiving (460) any new data input from the user; and repeating the examining, action performing, and displaying steps using the new data. The displaying step may involve displaying data defining a current state of the product in a tabular (spreadsheet) format, including displaying data detected to have caused the rule violation in a first manner that is visibly distinct from displaying other data that is not detected to have caused the rule violation.

The complexity of user designs, the limited capacity of FPGA chips, and the limited number of chip pinouts have resulted in the development of inter-chip communication technology that necessitates the transfer of a large amount of data across a limited number of pins in the shortest amount of time. The inter-chip communication system transfers signals across FPGA chip boundaries only when these signals change values. Thus, no cycles are wasted and every event signal has a fair chance of achieving communication across chip boundaries. The inter-chip communication system includes a series of event detectors that detect changes in signal values and packet schedulers which can then schedule the transfer of these changed signal values to another designated chip. Working with a plurality of signal groups that represents signals at the separated connections, the event detector detects events (or changes in signal values). When an event has been detected, the event detector alerts the packet scheduler. The packet scheduler employs a token ring scheme as follows. When the packet scheduler receives a token and detects an event, the packet scheduler “grabs” the token and schedules the transmission of this packet in the next packet cycle. If, however, the packet scheduler receives the token but does not detect an event, it will pass the token to the next packet scheduler. At the end of each packet cycle, the packet scheduler that grabbed the token will pass the token to the next logic associated with another packet.

An object-oriented design program provides is configured to instantly render in a three-dimensional interface user CAD designs received as CAD-based design elements (e.g., CAD blocks or lines). The object-oriented program renders the user CAD designs regardless of whether the user designs are practical, or use finishes or colors that are in-stock for the selected design elements. In addition, the object-oriented program can also create intelligent software objects for the CAD-based elements at a later time, upon request by the user. The intelligent software objects can be configured to automatically resolve themselves in view of one or more system limitations and rules in related components, and to replicate any such resolution back to the CAD-based blocks if desired. Thus, a user can have the benefits of instant 3D rendering of CAD drawings with or without the automatic resolution provided by intelligent software objects, depending on the situation.

A method and system for computer aided design (CAD) is disclosed for designing geometric objects. The present invention interpolates and/or blends between such geometric objects sufficiently fast so that real time deformation of such objects occurs while deformation data is being input. Thus, a user designing with the present invention obtains immediate feedback to input modifications without separately entering a command for performing such deformations. The present invention utilizes novel computational techniques for blending between geometric objects, wherein weighted sums of points on the geometric objects are used in deriving a new blended geometric object. The present invention is particularly useful for designing the shape of surfaces. Thus, the present invention is applicable to various design domains such as the design of, e.g., bottles, vehicles, and watercraft. Additionally, the present invention provides for efficient animation via repeatedly modifying surfaces of an animated object such as a representation of a face.

Some embodiments provide an integrated circuit (“IC”) with a primary circuit structure. The primary circuit structure is for performing multiple operations that implement a user design. The primary circuit structure includes multiple circuits. The IC also includes a secondary monitoring structure for monitoring multiple operations. The secondary monitoring structure includes a network communicatively coupled to multiple circuits of the primary circuit structure. The secondary monitoring circuit structure is for analyzing the monitored operations and reporting on the analysis to a circuit outside of the IC.

Design software in accordance with an implementation of the present invention is configured to provide believable three-dimensional representations of user selections in real-time. Design elements that would otherwise be difficult to efficiently render three-dimensionally in real-time are prerendered for realistic visual effects, such as realistic shading, which correspond to various positions of the elements in a design space. Blanks of the visual effects for each position are then stored in a data store for visual effects. At run time, data associated with user design choices, as well as the blanks for any corresponding design elements are fed in one implementation to peripheral processing hardware, such as a GPU, which sends the processed data to a display device. The user is therefore able to view complex visual data of certain design choices efficiently with added realism.

Exemplary embodiments of the present invention relate to a mobile information display system that may be configured by a user to have customized interface screens and to display individualized content. For example, upon starting of the ignition system, the mobile information display system may access a remote server using a radio network interface to download interface screens that have previously been designed by a user. Further, the mobile information display system may download information and content from the remote server, or from other websites, including, for example, navigational information, destination information, calendar and alarm entries, e-mail messages, voice mail messages, personal networking pages, internet phone service, internet audio programs, and internet video programs, among others.

Techniques for combining volatile and non-volatile programmable logic into one integrated circuit (IC) are provided. An IC is segregated into two portions. A first block of programmable logic is configured by bits stored in on-chip non-volatile memory. A second block of programmable logic is configured by bits stored in off-chip memory. The function of IO banks on the IC is multiplexed between the two logic blocks of the IC. The programmable logic in the first block can be configured and fully functional in a fraction of the time that the programmable logic in the second block can be configured. The programmable logic in the first block can configure fast enough and have enough independence to assist in the configuration of the second block. The non-volatile memory can also provide security features to a user design, such as encryption.

A method of monitoring operations of a set of ICs. The method loads a first set of configuration data into a first IC for configuring a group of configurable circuits of the first IC to perform operations of a user design. The method receives a definition of an event based on values of a set of signals in the user design and a set of corresponding actions to take when the event occurs. The set of signals includes at least one signal received from a second IC. The method generates an incremental second set of configuration data based on the definition of the event and the set of corresponding actions. While the first IC is performing the operations of the user design, the method loads the incremental second set of configuration data into the first IC and monitors the signals received from the second IC at the first IC.

A method of detailed placement for ICs is provided. The method receives an initial placement and iteratively builds sets of constraints for placement of different groups of cells in the IC design and uses a satisfiability solver to resolve placement violations. In some embodiments, the constraints include mathematical expressions that express timing requirements. The method in some embodiments converts the mathematical expressions into Boolean clauses and sends the clauses to a satisfiability solver that is only capable of solving Boolean clauses. In some embodiments, the method groups several cells in the user design and several sites on the IC fabric and uses the satisfiability solver to resolve all placement issues in the group. The satisfiability solver informs placer after each cell is moved to a different site. The method then dynamically builds more constraints based on the new cell placement and sends the constraints to the satisfiability solver.

A web design changing apparatus includes a web server for displaying a web screen on a user terminal when a user logs in a web member page through the user terminal, the web server displaying the web screen by activating a web menu screen according to a controlled menu position, a controlled menu color and a controlled menu shape if the position, the color and the shape of the menu are controlled by the user; and a database server having a user database, a user design database and a CSS (cascade style sheet) database, the database server being connected to the web server. The web server combines CSS information with HTML codes to thereby output them on the user terminal, and stores CSS information modified by the user terminal in the database server.

The invention discloses a circuit system design encryption circuit and an encryption method thereof. The encryption circuit comprises an FPGA and a CPU, wherein the CPU is connected with the FPGA through an address bus and a data bus; when the system is electrified, the configuration data bit stream in the FPGA is transmitted between the FPGA and an external memory; the circuit system design encryption circuit also comprises an encryption module connected with the FPGA; the encryption module comprises an algorithm engine and a corresponding key is stored in the encryption module; an algorithmmodule is also embedded in the FPGA and a key matched with that in the encryption module is also included in the FPGA; when the system is electrified, the FPGA reads the calculation result from the encryption module, compares the calculation result with that of the algorithm module in the FPGA and the user design is used if the results are matched with each other, if not, the user design is not used. The encryption design of the circuit is realized through an economic and reliable method so as to effectively prevent imitation of competitors and protect the interests per se.

This disclosure is directed to novel solutions for processing data in a manner similar to that employed by traditional spreadsheet applications (including, merely by way of example, evaluating expressions, producing reports and the like) without the need for a spreadsheet application. In an aspect, a spreadsheet calculation engine might be emulated in a Java environment, allowing for enhanced data input/output flexibility while still maintaining the ease with which traditional spreadsheet applications allow users to design a calculation model. In another aspect, the spreadsheet engine might be provided on a web server, database server and/or application server, allowing for data (including, for instance, reports comprising data processed and/or produced by the spreadsheet calculation engine) to be published easily (and, in some cases dynamically) on the web.

Some embodiments provide a method of dynamically tracking data values in a configurable integrated circuit (IC). The method, during a run time of the configurable IC, receives a request for a data value and dynamically configures the configurable IC to monitor the data value.

In some embodiments, the method, in dynamically configuring the configurable IC, dynamically configures a debug network of the configurable IC. In some such embodiments, the method, in dynamically configuring the configurable IC, further dynamically configures a set of configurable routing circuits of the configurable IC. In some embodiments the configuration is performed while the IC is implementing a user design circuit.