43 results about "Satisfiability" patented technology

Verifying large language model responses involves obtaining a query and its corresponding answer from a large language model. This conversational text is then fed into a second large language model, which translates the answer into first-order logic. The verification process uses an automated theorem prover. It checks the validity of this logic translation by determining the unsatisfiability of two scenarios: one where the negation of the logic translation and domain-specific logic formulas are combined, and another where the logic translation itself is combined with these formulas. Based on this analysis, the theorem prover ascertains whether the translated answer is valid, invalid, or neither. The final step is communicating this verification status through an appropriate output medium, such as a graphical user interface, a database, or a report, providing a structured and methodical approach to assessing the accuracy and reliability of language model responses.

Verifying large language model responses involves obtaining a query and its corresponding answer from a large language model. This conversational text is then fed into a second large language model, which translates the answer into first-order logic. The verification process uses an automated theorem prover. It checks the validity of this logic translation by determining the unsatisfiability of two scenarios: one where the negation of the logic translation and domain-specific logic formulas are combined, and another where the logic translation itself is combined with these formulas. Based on this analysis, the theorem prover ascertains whether the translated answer is valid, invalid, or neither. The final step is communicating this verification status through an appropriate output medium, such as a graphical user interface, a database, or a report, providing a structured and methodical approach to assessing the accuracy and reliability of language model responses.

The invention provides a software demand defect detection method based on a large language model and a satisfiability problem solver, and the method comprises the steps: constructing a domain knowledge base, guiding the large language model to extract key elements in a demand text through combining with a cue word project, and recognizing imperfect and ambiguous defects; and meanwhile, the demand is converted into a logic expression, and logic inconsistency is detected by using an SAT solver. According to the method, incremental updating of the knowledge base is supported, efficient retrieval and comparison are achieved through vectorization and Hash coding technologies, experiments show that the method is remarkably superior to a traditional technology in demand detection in the fields of finance and the like, defects can be accurately positioned, correction suggestions can be provided, and the efficiency and accuracy of demand analysis are effectively improved.

A machine learning method for learning and applying a rule set from relational data includes receiving a graph representing relational data, wherein nodes represent elements of the graph, and edges represent relationships between nodes, and generating an intermediate representation of the graph by mapping features of the nodes and edges of the graph to an intermediate vector representation. Optimized logical rules that define the nodes and edges of the graph based on the intermediate vector representation are learned by: defining a maximum satisfiability (MAX-SAT) problem for the graph; and estimating a gradient around a solution of the MAX-SAT problem to produce the optimized logical rules, which are applied to a new graph. The data can be medical data and the graph can be used in a machine-learning task, such as using the medical data for disease prediction, for optimization of the machine-learning task and / or to support decision-making.

The invention provides a formal verification method and device for state transition implementation codes and a program product, and the method comprises the steps: compiling a first state transition function implemented by a C language Switch Case statement to obtain a bit code file; obtaining a Cryptol file, wherein the Cryptol file comprises a second state transfer function which is realized by using a Cryptol programming language; acquiring a first input parameter set and a first output value set corresponding to the first state transfer function, and acquiring a second input parameter set and a second output value set corresponding to the second state transfer function; simulating state transition function symbolic execution based on the first output value set, the second output value set, the first input parameter set and the second input parameter set, converting the state transition function symbolic execution into a satisfiability model theory problem, and solving the satisfiability model theory problem through an external solver to obtain a verification result of a state transition implementation code; the problem that whether state transition is implemented correctly or not cannot be guaranteed only through a manual checking mode can be solved, and the state transition code implementation correctness is guaranteed.

The invention provides a semantic map construction method, device and system for robot navigation. The method provided by the embodiment of the invention can comprise the steps of geometry-topology SLAM increment updating, sparse imaging evidence generation, analysis availability field calculation, formalized semantic constraint compiling, increment satisfiability solving and minimum conflict processing, logic entropy driven active exploration, updating change arbitration and audit account book maintenance. Wherein the increment satisfiability solving and the minimum conflict processing comprise the following steps: executing increment satisfiability solving on a formalized semantic constraint set, if the formalized semantic constraint set cannot be satisfied, positioning a minimum unsatisfiability subset, approximately determining a minimum constraint set according to a rollback set, and executing minimum rollback processing to obtain a constraint solving output result, the constraint solution output result comprises a consistency solution space generated in the current period and a logic entropy value. According to the method, accumulated errors or logic contradictions of semantic information in long-term operation can be effectively avoided, and stable evolution of the semantic map is ensured.

This disclosure describes a policy validation system that determines the validity of RBAC policies. For example, the policy validation system determines when invalid RBAC policies implemented within a cloud computing system are granting resource and service requests that should be unauthorized. This way, the policy validation system ensures that RBAC policies adhere to a set of intended specifications across all conceivable inputs in user requests. In various implementations, the policy validation system utilizes symbolic abstraction models and satisfiability solver models to identify invalid policies based on determining valid counterexamples, which allow requests to be granted that should be blocked by the policy.

This invention discloses a deterministic protocol conversion method for multi-protocol industrial equipment, relating to the field of Internet of Things (IoT) technology. The method includes the following steps: Step S1: Initialize hardware; Step S2: The multi-protocol industrial equipment is sequentially connected to a protocol access module via different physical connectors; Step S3: Send a conversion operation to the protocol conversion configuration module; Step S4: Based on the conversion parameters and rules in the conversion operation, and combined with the constraints in the deterministic protocol conversion algorithm, a deterministic scheduling scheme is obtained by solving the optimization objective using a Satisfiability Model Theory solver; Step S5: According to the deterministic scheduling scheme, the protocol conversion scheduler moves data from shared memory blocks according to the conversion operation and sends it to the corresponding protocol access module for protocol conversion. This invention improves the interoperability of the equipment, enhances the flexibility and scalability of the conversion system, reduces the cost and time of system implementation and maintenance, and effectively improves the stability and predictability of the system.

The application belongs to the technical field of natural language processing and knowledge graph, and discloses a kind of multi-modal acquisition and evolution graph analysis method and system of policy text. In view of the passive decision problem caused by the rigidity of existing policy analysis, semantic understanding and lack of dynamic correlation, the application adopts visual and DOM feature weighted fusion and reinforcement learning agent to realize multi-modal adaptive acquisition and joint alignment in anti-crawling environment;Use large language model for semantic deconstruction, and convert implicit logic into computer-readable explicit logic expression through thought chain reasoning;Construct a policy evolution knowledge graph with time and validity level attributes, perform satisfiability analysis to output conflict detection results;Map the target object portrait to the graph and the logic expression to evaluate item by item, and output intelligent decision deduction results combined with quantitative dimensions. The application realizes the whole life cycle intelligent analysis of policy data acquisition, deep logic analysis and active deduction.

A machine learning method for learning and applying a rule set from relational data includes receiving a graph representing relational data, wherein nodes represent elements of the graph, and edges represent relationships between nodes, and generating an intermediate representation of the graph by mapping features of the nodes and edges of the graph to an intermediate vector representation. Optimized logical rules that define the nodes and edges of the graph based on the intermediate vector representation are learned by: defining a maximum satisfiability (MAX-SAT) problem for the graph; and estimating a gradient around a solution of the MAX-SAT problem to produce the optimized logical rules, which are applied to a new graph. The data can be medical data and the graph can be used in a machine-learning task, such as using the medical data for disease prediction, for optimization of the machine-learning task and / or to support decision-making.

A satisfiability modulo theories (SMT) solver accelerator is implemented with analog content addressable memory (CAM) cells. A job-shop scheduling problem (JSSP) may be mapped to expression clauses that are stored in an analog CAM array. A test cycle may be performed by searching for a test vector of input variables in the analog CAM array, selecting a candidate variable of the test vector that is violating a largest number of the expression clauses, and changing the candidate variable of the test vector. The test cycle may be repeated until none of the expression clauses are violated by the test vector of the input variables. The resulting test vector of the input variables that violates no expression clauses is a solution for the JSSP.

Techniques are described for executing a satisfiability modular theory (SMT) solver in a "shadow" system configuration in which an input query is provided to a primary SMT solver system and additionally to one or more secondary SMT solver systems. The SMT solver system can be used by a cloud provider and used in other computing environments to analyze the effects of configured user account policies that define permissions within the computing environment about user computing resources and associated actions to help ensure security of the computing resources and user data, among other things. The results generated by the primary SMT solver system may be provided to one or more secondary SMT solver systems, where each of the secondary SMT systems may include different system components or different versions of system components to assess correctness of the primary SMT solver system, compare performance metrics, and perform other possible types of analysis.

The invention relates to a method for generating a test case meeting functional safety requirements, which comprises the following steps of: extracting input and output information of a tested function through a front end of a compiler; based on the input and output information, constructing a program logic model of the tested function through static analysis and dynamic analysis; based on the program logic model, generating a test case truth table covered by correction condition judgment; generating constraint conditions based on the input and output information and the test case truth table; and based on the constraint condition, generating a test case through a satisfiability model theory solver or a large language model. According to the method, the test case is generated through the logic portrait input and output by the tested function in combination with the satisfaction model theory solver or the large language model, so that the coverage rate, accuracy and adaptability of the test case are improved.

The invention belongs to the field of model detection and symbol simulation, and relates to a symbol track value counting method and system based on a satisfiability model theory solver and limit model detection. The method comprises the following steps of: taking a hardware description language Chisel and a circuit specification described by extended track counting logic as input, reading the extended track counting logic through a preprocessing module, and performing logic synthesis and SMT (Surface Mount Technology) coding on a Chisel circuit; and the model detection rear-end module verifies the circuit specification based on SMT coding in combination with an STE algorithm and a BMC algorithm. According to the method, the respective advantages of the BMC and the STE are combined to enhance the solving capability of the symbol track value, the efficiency and the reliability of model detection are improved, meanwhile, the standard description capability of the STE is expanded on the Chisel level, and the verification process is greatly simplified.

The present application relates to the technical field of power system distribution network, and more particularly to a fault prediction self-healing power distribution method, which comprises the following steps: first, obtaining equivalent admittance and physical residual by controlled disturbance and synchronous phasor measurement, generating spectrum-topology co-embedded coordinates and innovation consistency index, and completing topology checking; then, fusing space evidence, time evidence and physical evidence, combining hazard rate evaluation to form control access strength value; performing bias search under the constraints of feasible domain prior, action shielding and control barrier, and obtaining self-healing operation sequence by power flow optimization with conditional value at risk as the target; finally, according to counterfactual energy margin shaping operation threshold, completing full sequence checking and generating execution package according to signal time sequence logic and satisfiability model theory, and realizing low misoperation, provable safety and rapid recovery.

The invention discloses a large language model reasoning path pruning method based on a satisfiability model theory, and aims to solve the problems that a heuristic evaluator depended by a multi-path reasoning framework such as an existing thinking tree is unreliable and the calculation cost is too high due to the unreliable heuristic evaluator. An intermediate reasoning step generated by a large language model LLM is automatically converted into formalized logic constraint, a satisfiability model theory SMT solver is used for carrying out millisecond-level satisfiability verification, logically inconsistent error reasoning branches can be actively and instantly recognized and cut off, and therefore computing resources are concentrated on potential correct branches. According to the method, the defects that an existing method passively accepts logic errors and depends on an unreliable evaluator, so that resources are wasted are overcome, the accuracy and reliability of large language model LLM complex reasoning are remarkably improved, and meanwhile the calculation overhead and token consumption are greatly reduced.

Techniques are described for providing a SAT-based solver for a quantifier-free theory of strings and bit vectors. The solver can be used by an automated reasoning service of a cloud provider network to analyze policies and policy consequences. The solver reduces an input formula to a Boolean satisfiability problem by encoding the input formula into an equivalently satisfiable propositional formula, where the satisfiability of the equivalently satisfiable propositional formula is determined by a SAT solver. Instead of using a traditional DPLL(T)-style algorithm, the solver described here limits the length of variables in an input formula and reduces the problem to a single formula, which can then be solved using incremental SAT solving.The solver can be used independently or as part of a portfolio of solvers to determine the satisfiability or unsatisfiability of certain formulas corresponding, for example, to questions about user policies within a cloud provider network.

This disclosure describes a policy deduplication system that determines duplicates among a set of RBAC policies. For instance, the policy deduplication system determines whether a pair of RBAC policies within a cloud computing system are semantically equivalent, even if they are syntactically distinct. In addition, the policy deduplication system utilizes symbolic abstraction models and satisfiability solver models to identify duplicate policies that are semantically equal for all user inputs by searching for counterexamples that would prove a pair of policies to be semantically unequal. However, if no counterexamples are found, the policy deduplication system determines that the policies are duplicates.

The embodiment of the invention provides a model training method, a data processing method and a related device, is applied to the field of artificial intelligence, and can improve the reasoning ability of a model for a multi-constraint satisfiability problem. The method comprises the steps of obtaining description information of a first question; the description information is input into the first sub-network, a first expression and a first solution of the first problem are obtained, the first expression comprises multiple constraint conditions, and the first solution meets at least one constraint condition; the first expression and the first solution are input into the second sub-network to obtain second solutions, and the number of the second solutions meeting the constraint condition is larger than or equal to the first solution; and training a target model based on the second solution, wherein the target model comprises a first sub-network and a second sub-network.

This invention discloses a model detection method based on temporal-cognitive hybrid logic APTEL, specifically implemented according to the following steps: Step 1. Obtain the input to be verified; Step 2. Construct a unified semantic model; Step 3. Perform formula parsing and paradigm transformation; Step 4. Construct a cognitive alternating Büchi automaton; Step 5. Perform symbolic model detection; Step 6. Perform model satisfiability determination; Step 7. Generate counterexamples when verification fails; Step 8. Perform formula satisfiability check. This invention also discloses a model detection device based on temporal-cognitive hybrid logic APTEL. This invention achieves unified expression and unified verification of temporal and cognitive properties, enhances the verification capability of complex hybrid properties, improves model detection feasibility, increases symbolic verification efficiency, and supports verification failure localization.

The invention discloses an on-cloud scheduler conflict detection method based on a formalization method, and the method comprises the following steps: 1, inputting and / or importing an affinity and / or anti-affinity rule, converting the affinity and / or anti-affinity rule into a unified intermediate representation form constraint, shielding grammatical and semantic differences for affinity and / or anti-affinity expression among different schedulers; step 2, converting the intermediate representation form obtained by conversion in the step 1 into a format which can be identified and processed by a solver again, and converting an affinity and / or anti-affinity management problem into a formalized satisfiability problem; and step 3, checking the satisfiability of the constraint set through a solver, and for the unsatisfied rule, positioning the source file of the conflict rule and the position of the unsatisfied rule in the source file according to the metadata. The invention also discloses a conflict detection system for realizing the conflict detection method, and application of the method or the system.

The present disclosure provides a satisfiability modulo theory (SMT) modeling system that includes graphical representation circuitry to generate graphical data representing a circuit design; finite state machine (FSM) discovery circuitry to discover, based on a feedback loop of the circuit design, an FSM contained within the graphical data; SMT assertion generation circuitry to generate an SMT assertion set of the FSM, based on the combinatorial and / or sequential logic elements associated with the FSM; and SMT modeling circuitry to determine a behavior of the FSM by applying one or more logical functions to the SMT assertion set.

A method and system for configuring a product is disclosed. The method includes obtaining, by a processor (102) of a PDM system (100), a plurality of options defined for a product and one or more constraints from a product database (116), wherein each of the options has one or more variations. Further, an ordered logical group is generated from the obtained plurality of options based on a weight associated with each of the options. Further, a branch and bound algorithm is used to determine one or more buildable product configurations based on the ordered logical group and one or more of the constraints applicable to the options, wherein the applicability of the one or more constraints is determined using a solver based on a satisfiability modulo theories. The one or more buildable product configurations are also output on an output device (110).

The invention relates to the technical field of quantum computing, and discloses a universal shuttle scheduling method and system. The method comprises the steps that formalized modeling is conducted on architecture constraints of quantum computing hardware, and hardware physical constraints are converted into a Boolean satisfiability constraint set through a Boolean satisfiability expression; performing feature extraction on an input quantum circuit, constructing a directed acyclic graph model, and extracting a dependency relationship between operations to form a logic constraint; generating a shuttle scheduling scheme based on the Boolean satisfiability constraint set and the logic constraint; the shuttle scheduling scheme comprises an accurate optimal scheduling mode and an efficient approximate scheduling mode; according to the method, a set of standardized shuttle scheduling process is established, and various quantum computing hardware architectures can be quickly adapted; and through binary search optimization and divide-and-conquer approximation strategies, the optimality of the small-scale quantum circuit is ensured, and meanwhile, efficient processing of the large-scale quantum circuit is realized.

The application discloses a kind of index verification methods of supporting model attribute quantification evaluation in the field of system engineering technology, comprising the following steps: using model-based system engineering method, construct the system engineering model of problem solving;According to the requirement and constraint of model, the verification script of the constraint condition not changing with time in system model is contained by using KARMA language index verification part syntax definition;Index verification compiler compiles KARMA language index verification text, calls solver based on satisfiability module theory;The method is developed based on GOPPRR modeling theory, can support the establishment of multi-architecture model, not limited to the model of a certain field, the expression of model relationship, constraint condition and verification object is realized by using the mode of combining satisfiability module theory and GOPPRR modeling theory, the unified modeling language is extended by using satisfiability module theory, supports the interaction of modeling data and solving data, and reduces the learning cost of engineering personnel.

A machine learning method for learning and applying a rule set from relational data includes receiving a graph representing relational data, wherein nodes represent elements of the graph, and edges represent relationships between nodes, and generating an intermediate representation of the graph by mapping features of the nodes and edges of the graph to an intermediate vector representation. Optimized logical rules that define the nodes and edges of the graph based on the intermediate vector representation are learned by: defining a maximum satisfiability (MAX-SAT) problem for the graph; and estimating a gradient around a solution of the MAX-SAT problem to produce the optimized logical rules, which are applied to a new graph. The data can be medical data and the graph can be used in a machine-learning task, such as using the medical data for disease prediction, for optimization of the machine-learning task and / or to support decision-making.

A satisfiability modulo theories (SMT) solver accelerator is implemented with analog content addressable memory (CAM) cells. A job-shop scheduling problem (JSSP) may be mapped to expression clauses that are stored in an analog CAM array. A test cycle may be performed by searching for a test vector of input variables in the analog CAM array, selecting a candidate variable of the test vector that is violating a largest number of the expression clauses, and changing the candidate variable of the test vector. The test cycle may be repeated until none of the expression clauses are violated by the test vector of the input variables. The resulting test vector of the input variables that violates no expression clauses is a solution for the JSSP.

Techniques are described for providing a SAT-based solver for a quantifier-free theory of strings and bit vectors. The solver can be used by an automated reasoning service of a cloud provider network to analyze policies and the consequences of policies. The solver reduces an input formula to a Boolean satisfiability problem by encoding the input formula into an equisatisfiable propositional formula, where the satisfiability of the equisatisfiable propositional formula is determined by a SAT solver. Rather than using a traditional DPLL(T) style algorithm, the solver described herein bounds the length of variables in an input formula and reduces the problem to a single formula, which can then be solved using incremental SAT solving. The solver can be used independently or as part of a portfolio of solvers used to determine the satisfiability or unsatisfiability of certain formula corresponding, e.g., to questions about users' policies within a cloud provider network.

The present disclosure provides a satisfiability modulo theory (SMT) modeling system that includes graphical representation circuitry to generate graphical data representing a circuit design; finite state machine (FSM) discovery circuitry to discover, based on a feedback loop of the circuit design, an FSM contained within the graphical data; SMT assertion generation circuitry to generate an SMT assertion set of the FSM, based on the combinatorial and / or sequential logic elements associated with the FSM; and SMT modeling circuitry to determine a behavior of the FSM by applying one or more logical functions to the SMT assertion set.

The embodiment of the present invention provides a state diagram generation method, device, electronic device and storage medium, which relates to the field of computer technology. In the method, a target network diagram corresponding to a target state set is obtained; the node coordinate constraint rules corresponding to the target state set and the target network diagram are input into a satisfiability model theory solver to obtain node coordinate values ​​corresponding to each node in the target network diagram output by the satisfiability model theory solver; and a state diagram corresponding to the target state set is generated based on the node coordinate values ​​and edges. In this way, visualization operations on a large number of state sets are realized, and the state positions can be solved through the satisfiability modulus theory, so that users can flexibly and conveniently set complex constraints for the solution process, and the complex constraints are accurately processed through the satisfiability modulus theory, and a state diagram layout that meets user needs is automatically generated, which helps to improve the efficiency of generating state diagrams corresponding to massive states.