26 results about "Satisfiability" patented technology

A machine learning method for learning and applying a rule set from relational data includes receiving a graph representing relational data, wherein nodes represent elements of the graph, and edges represent relationships between nodes, and generating an intermediate representation of the graph by mapping features of the nodes and edges of the graph to an intermediate vector representation. Optimized logical rules that define the nodes and edges of the graph based on the intermediate vector representation are learned by: defining a maximum satisfiability (MAX-SAT) problem for the graph; and estimating a gradient around a solution of the MAX-SAT problem to produce the optimized logical rules, which are applied to a new graph. The data can be medical data and the graph can be used in a machine-learning task, such as using the medical data for disease prediction, for optimization of the machine-learning task and / or to support decision-making.

The invention provides a formal verification method and device for state transition implementation codes and a program product, and the method comprises the steps: compiling a first state transition function implemented by a C language Switch Case statement to obtain a bit code file; obtaining a Cryptol file, wherein the Cryptol file comprises a second state transfer function which is realized by using a Cryptol programming language; acquiring a first input parameter set and a first output value set corresponding to the first state transfer function, and acquiring a second input parameter set and a second output value set corresponding to the second state transfer function; simulating state transition function symbolic execution based on the first output value set, the second output value set, the first input parameter set and the second input parameter set, converting the state transition function symbolic execution into a satisfiability model theory problem, and solving the satisfiability model theory problem through an external solver to obtain a verification result of a state transition implementation code; the problem that whether state transition is implemented correctly or not cannot be guaranteed only through a manual checking mode can be solved, and the state transition code implementation correctness is guaranteed.

The invention provides a semantic map construction method, device and system for robot navigation. The method provided by the embodiment of the invention can comprise the steps of geometry-topology SLAM increment updating, sparse imaging evidence generation, analysis availability field calculation, formalized semantic constraint compiling, increment satisfiability solving and minimum conflict processing, logic entropy driven active exploration, updating change arbitration and audit account book maintenance. Wherein the increment satisfiability solving and the minimum conflict processing comprise the following steps: executing increment satisfiability solving on a formalized semantic constraint set, if the formalized semantic constraint set cannot be satisfied, positioning a minimum unsatisfiability subset, approximately determining a minimum constraint set according to a rollback set, and executing minimum rollback processing to obtain a constraint solving output result, the constraint solution output result comprises a consistency solution space generated in the current period and a logic entropy value. According to the method, accumulated errors or logic contradictions of semantic information in long-term operation can be effectively avoided, and stable evolution of the semantic map is ensured.

This invention discloses a deterministic protocol conversion method for multi-protocol industrial equipment, relating to the field of Internet of Things (IoT) technology. The method includes the following steps: Step S1: Initialize hardware; Step S2: The multi-protocol industrial equipment is sequentially connected to a protocol access module via different physical connectors; Step S3: Send a conversion operation to the protocol conversion configuration module; Step S4: Based on the conversion parameters and rules in the conversion operation, and combined with the constraints in the deterministic protocol conversion algorithm, a deterministic scheduling scheme is obtained by solving the optimization objective using a Satisfiability Model Theory solver; Step S5: According to the deterministic scheduling scheme, the protocol conversion scheduler moves data from shared memory blocks according to the conversion operation and sends it to the corresponding protocol access module for protocol conversion. This invention improves the interoperability of the equipment, enhances the flexibility and scalability of the conversion system, reduces the cost and time of system implementation and maintenance, and effectively improves the stability and predictability of the system.

The application belongs to the technical field of natural language processing and knowledge graph, and discloses a kind of multi-modal acquisition and evolution graph analysis method and system of policy text. In view of the passive decision problem caused by the rigidity of existing policy analysis, semantic understanding and lack of dynamic correlation, the application adopts visual and DOM feature weighted fusion and reinforcement learning agent to realize multi-modal adaptive acquisition and joint alignment in anti-crawling environment;Use large language model for semantic deconstruction, and convert implicit logic into computer-readable explicit logic expression through thought chain reasoning;Construct a policy evolution knowledge graph with time and validity level attributes, perform satisfiability analysis to output conflict detection results;Map the target object portrait to the graph and the logic expression to evaluate item by item, and output intelligent decision deduction results combined with quantitative dimensions. The application realizes the whole life cycle intelligent analysis of policy data acquisition, deep logic analysis and active deduction.

A machine learning method for learning and applying a rule set from relational data includes receiving a graph representing relational data, wherein nodes represent elements of the graph, and edges represent relationships between nodes, and generating an intermediate representation of the graph by mapping features of the nodes and edges of the graph to an intermediate vector representation. Optimized logical rules that define the nodes and edges of the graph based on the intermediate vector representation are learned by: defining a maximum satisfiability (MAX-SAT) problem for the graph; and estimating a gradient around a solution of the MAX-SAT problem to produce the optimized logical rules, which are applied to a new graph. The data can be medical data and the graph can be used in a machine-learning task, such as using the medical data for disease prediction, for optimization of the machine-learning task and / or to support decision-making.

A satisfiability modulo theories (SMT) solver accelerator is implemented with analog content addressable memory (CAM) cells. A job-shop scheduling problem (JSSP) may be mapped to expression clauses that are stored in an analog CAM array. A test cycle may be performed by searching for a test vector of input variables in the analog CAM array, selecting a candidate variable of the test vector that is violating a largest number of the expression clauses, and changing the candidate variable of the test vector. The test cycle may be repeated until none of the expression clauses are violated by the test vector of the input variables. The resulting test vector of the input variables that violates no expression clauses is a solution for the JSSP.

Techniques are described for executing a satisfiability modular theory (SMT) solver in a "shadow" system configuration in which an input query is provided to a primary SMT solver system and additionally to one or more secondary SMT solver systems. The SMT solver system can be used by a cloud provider and used in other computing environments to analyze the effects of configured user account policies that define permissions within the computing environment about user computing resources and associated actions to help ensure security of the computing resources and user data, among other things. The results generated by the primary SMT solver system may be provided to one or more secondary SMT solver systems, where each of the secondary SMT systems may include different system components or different versions of system components to assess correctness of the primary SMT solver system, compare performance metrics, and perform other possible types of analysis.

The invention relates to a method for generating a test case meeting functional safety requirements, which comprises the following steps of: extracting input and output information of a tested function through a front end of a compiler; based on the input and output information, constructing a program logic model of the tested function through static analysis and dynamic analysis; based on the program logic model, generating a test case truth table covered by correction condition judgment; generating constraint conditions based on the input and output information and the test case truth table; and based on the constraint condition, generating a test case through a satisfiability model theory solver or a large language model. According to the method, the test case is generated through the logic portrait input and output by the tested function in combination with the satisfaction model theory solver or the large language model, so that the coverage rate, accuracy and adaptability of the test case are improved.

The present application relates to the technical field of power system distribution network, and more particularly to a fault prediction self-healing power distribution method, which comprises the following steps: first, obtaining equivalent admittance and physical residual by controlled disturbance and synchronous phasor measurement, generating spectrum-topology co-embedded coordinates and innovation consistency index, and completing topology checking; then, fusing space evidence, time evidence and physical evidence, combining hazard rate evaluation to form control access strength value; performing bias search under the constraints of feasible domain prior, action shielding and control barrier, and obtaining self-healing operation sequence by power flow optimization with conditional value at risk as the target; finally, according to counterfactual energy margin shaping operation threshold, completing full sequence checking and generating execution package according to signal time sequence logic and satisfiability model theory, and realizing low misoperation, provable safety and rapid recovery.

The invention discloses a large language model reasoning path pruning method based on a satisfiability model theory, and aims to solve the problems that a heuristic evaluator depended by a multi-path reasoning framework such as an existing thinking tree is unreliable and the calculation cost is too high due to the unreliable heuristic evaluator. An intermediate reasoning step generated by a large language model LLM is automatically converted into formalized logic constraint, a satisfiability model theory SMT solver is used for carrying out millisecond-level satisfiability verification, logically inconsistent error reasoning branches can be actively and instantly recognized and cut off, and therefore computing resources are concentrated on potential correct branches. According to the method, the defects that an existing method passively accepts logic errors and depends on an unreliable evaluator, so that resources are wasted are overcome, the accuracy and reliability of large language model LLM complex reasoning are remarkably improved, and meanwhile the calculation overhead and token consumption are greatly reduced.

This invention discloses a model detection method based on temporal-cognitive hybrid logic APTEL, specifically implemented according to the following steps: Step 1. Obtain the input to be verified; Step 2. Construct a unified semantic model; Step 3. Perform formula parsing and paradigm transformation; Step 4. Construct a cognitive alternating Büchi automaton; Step 5. Perform symbolic model detection; Step 6. Perform model satisfiability determination; Step 7. Generate counterexamples when verification fails; Step 8. Perform formula satisfiability check. This invention also discloses a model detection device based on temporal-cognitive hybrid logic APTEL. This invention achieves unified expression and unified verification of temporal and cognitive properties, enhances the verification capability of complex hybrid properties, improves model detection feasibility, increases symbolic verification efficiency, and supports verification failure localization.

The present disclosure provides a satisfiability modulo theory (SMT) modeling system that includes graphical representation circuitry to generate graphical data representing a circuit design; finite state machine (FSM) discovery circuitry to discover, based on a feedback loop of the circuit design, an FSM contained within the graphical data; SMT assertion generation circuitry to generate an SMT assertion set of the FSM, based on the combinatorial and / or sequential logic elements associated with the FSM; and SMT modeling circuitry to determine a behavior of the FSM by applying one or more logical functions to the SMT assertion set.

A method and system for configuring a product is disclosed. The method includes obtaining, by a processor (102) of a PDM system (100), a plurality of options defined for a product and one or more constraints from a product database (116), wherein each of the options has one or more variations. Further, an ordered logical group is generated from the obtained plurality of options based on a weight associated with each of the options. Further, a branch and bound algorithm is used to determine one or more buildable product configurations based on the ordered logical group and one or more of the constraints applicable to the options, wherein the applicability of the one or more constraints is determined using a solver based on a satisfiability modulo theories. The one or more buildable product configurations are also output on an output device (110).

The invention relates to the technical field of quantum computing, and discloses a universal shuttle scheduling method and system. The method comprises the steps that formalized modeling is conducted on architecture constraints of quantum computing hardware, and hardware physical constraints are converted into a Boolean satisfiability constraint set through a Boolean satisfiability expression; performing feature extraction on an input quantum circuit, constructing a directed acyclic graph model, and extracting a dependency relationship between operations to form a logic constraint; generating a shuttle scheduling scheme based on the Boolean satisfiability constraint set and the logic constraint; the shuttle scheduling scheme comprises an accurate optimal scheduling mode and an efficient approximate scheduling mode; according to the method, a set of standardized shuttle scheduling process is established, and various quantum computing hardware architectures can be quickly adapted; and through binary search optimization and divide-and-conquer approximation strategies, the optimality of the small-scale quantum circuit is ensured, and meanwhile, efficient processing of the large-scale quantum circuit is realized.

A machine learning method for learning and applying a rule set from relational data includes receiving a graph representing relational data, wherein nodes represent elements of the graph, and edges represent relationships between nodes, and generating an intermediate representation of the graph by mapping features of the nodes and edges of the graph to an intermediate vector representation. Optimized logical rules that define the nodes and edges of the graph based on the intermediate vector representation are learned by: defining a maximum satisfiability (MAX-SAT) problem for the graph; and estimating a gradient around a solution of the MAX-SAT problem to produce the optimized logical rules, which are applied to a new graph. The data can be medical data and the graph can be used in a machine-learning task, such as using the medical data for disease prediction, for optimization of the machine-learning task and / or to support decision-making.

The present disclosure provides a satisfiability modulo theory (SMT) modeling system that includes graphical representation circuitry to generate graphical data representing a circuit design; finite state machine (FSM) discovery circuitry to discover, based on a feedback loop of the circuit design, an FSM contained within the graphical data; SMT assertion generation circuitry to generate an SMT assertion set of the FSM, based on the combinatorial and / or sequential logic elements associated with the FSM; and SMT modeling circuitry to determine a behavior of the FSM by applying one or more logical functions to the SMT assertion set.

The invention relates to the technical field of urban operation management, in particular to an urban digital operation integration method, which comprises the following steps of: performing joint dynamic assimilation in an engineering feasible domain and a safety state domain, outputting an assimilated world state, a state uncertainty covariance and a time-varying causal map, and generating a coupling weight field by optimal transmission; writing the control barrier function, the conditional value-at-risk and geometric consistency and causal constraints based on optimal transmission into rolling optimization to obtain an optimal action and feasibility certificate; then, multi-domain coordination is achieved through the coupling constraint graph and dual decomposition, and a coupling feasible solution with a dual price vector consistent with the global situation is obtained; and finally, a policy contract is assembled and is checked and issued through a satisfiability model theory and a control barrier function, an execution record and anti-fact difference measurement backflow form a closed loop, and safe, steady and audible cross-domain cooperative control is realized.

The present disclosure provides a semantic map construction method, device and system for robot navigation. The method of the present disclosure embodiment can include: geometric-topological SLAM incremental updating, sparse imaging evidence generation, parsing availability field calculation, formalized semantic constraint compilation, incremental satisfiability solving and minimum conflict processing, logic entropy driven active exploration and update change arbitration and audit book maintenance; wherein the incremental satisfiability solving and minimum conflict processing includes: performing incremental satisfiability solving on the formalized semantic constraint set, if unsatisfiability occurs, locating the minimum unsatisfiable subset, approximately determining the minimum constraint set according to the rollback set and performing the minimum rollback processing to obtain the constraint solving output result, the constraint solving output result includes: the consistency solution space generated in the current period and the logic entropy value. The present disclosure can effectively avoid the accumulation of errors or logical contradictions of semantic information in long-term operation, and ensure the stable evolution of the semantic map.

The application provides a kind of explainable fault diagnosis system and method of discrete event system, adopts the calculation mode of combining off-line construction fault diagnosis device and on-line fault diagnosis, while fusing field expert knowledge, according to the possible mode of system fault given by field expert, customizes limited linear time logic formula template, takes the historical operation log of system as sample, encodes fault diagnosis problem as satisfiability problem, obtains the explanation of each type of fault behavior of system: FLTL formula with the help of SAT solving technique.These FLTL formulas can form on-line fault diagnosis device on the one hand, and also provide the explanation and analysis of system fault, which can provide decision support for later system fault recovery and system improvement;Thus, the defect that existing DES fault diagnosis technology is difficult to provide explainable fault diagnosis is solved.

Methods, systems, and apparatus, including computer-readable media, for circuit design using a Boolean satisfiability solver. In some implementations, a system accesses circuit data describing circuit behavior or logic for a circuit to be designed. The system generates one or more Boolean expressions with variables that each represent a different design characteristic for the circuit. The system defines a Boolean satisfiability problem for the class of circuits having a predetermined circuit size, where the Boolean satisfiability problem has criteria that include (i) the generated one or more Boolean expressions and (ii) an assertion that the circuit is faulted. The system uses a Boolean satisfiability solver to process the Boolean satisfiability problem, and after determining that the Boolean satisfiability problem is unsatisfiable, the system uses the Boolean satisfiability solver to solve a series of updated versions of the Boolean satisfiability problem, and the system generates circuit design parameters for the circuit.

Techniques are described for providing a SAT-based solver for a quantifier-free theory of strings and bit vectors. The solver can be used by an automated reasoning service of a cloud provider network to analyze policies and the consequences of policies. The solver reduces an input formula to a Boolean satisfiability problem by encoding the input formula into an equisatisfiable propositional formula, where the satisfiability of the equisatisfiable propositional formula is determined by a SAT solver. Rather than using a traditional DPLL(T) style algorithm, the solver described herein bounds the length of variables in an input formula and reduces the problem to a single formula, which can then be solved using incremental SAT solving. The solver can be used independently or as part of a portfolio of solvers used to determine the satisfiability or unsatisfiability of certain formula corresponding, e.g., to questions about users' policies within a cloud provider network.

The application provides a binary vulnerability detection method based on unified IR and verifiable reasoning framework, comprising the following steps: converting a binary code sample into a cross-architecture unified intermediate representation; constructing a multi-relation program graph based on the cross-architecture unified intermediate representation; performing feature extraction on the multi-relation program graph through double-channel collaborative representation learning; performing sample-level vulnerability type determination and node-level risk scoring based on the output of the double-channel collaborative representation learning, and obtaining a positioning set through threshold screening; performing verifiable construction on source-sink paths based on formalized taint propagation and constraint slicing, performing logical verification on candidate paths through SMT satisfiability checking; and generating a structured evidence package. The application is used for simultaneously improving the generalization ability, logical verifiability and engineering scalability of vulnerability detection in a complex scene with multiple architectures, no source code and existing differences in compilation optimization.

The invention discloses a Python program third-party library upgrading compatible version automatic inference method which comprises the following steps: extracting library version information and API and module definition thereof based on dependent file analysis and an AST abstract syntax tree; adopting a satisfiability model theory solving mode to generate a dependency file without a version compatibility problem; based on the AST abstract syntax tree, identifying a module and an API actually used by the project; analyzing module structures among different versions, names and parameters of APIs and modules and APIs actually used by a project, and identifying code compatibility problems caused by module removal, API change, parameter incompatibility and the like; automatically adjusting the version of the related library in combination with the dependency chain relationship and the calling path until a dependency file which simultaneously meets the requirements of version compatibility and code compatibility is generated; and supplementing a missing third-party library for the dependent file based on the version constraint. According to the method, the capability of automatically detecting and repairing dependency conflicts and code compatibility problems in the library version upgrading process of the Python project is improved.

This invention discloses a static vulnerability detection method and system based on a unified cross-language program structure graph, comprising the following steps: constructing a unified cross-language program structure graph based on the source code to be detected and its compilation metadata, and establishing interface semantic mapping relationships on the edges of cross-language interfaces; extracting cross-language paths from the program entry point to sensitive operation points on the unified cross-language program structure graph, marking elements with uncertainties in the cross-language paths and calculating path confidence; semantically aligning heterogeneous language states on the cross-language paths based on cross-language abstract domains, and converting path conditions and vulnerability establishment conditions into logical constraints; determining the satisfiability of the logical constraints, outputting vulnerability detection results based on the determination results, and generating a structured evidence chain. This invention can output a cross-language evidence chain, clearly displaying the witness information of the vulnerability path and triggering conditions, as well as the details of cross-language conversion, effectively supporting manual review, vulnerability remediation, and other work.

A satisfiability modulo theories (SMT) solver accelerator is implemented with analog content addressable memory (CAM) cells. A job-shop scheduling problem (JSSP) may be mapped to expression clauses that are stored in an analog CAM array. A test cycle may be performed by searching for a test vector of input variables in the analog CAM array, selecting a candidate variable of the test vector that is violating a largest number of the expression clauses, and changing the candidate variable of the test vector. The test cycle may be repeated until none of the expression clauses are violated by the test vector of the input variables. The resulting test vector of the input variables that violates no expression clauses is a solution for the JSSP.