The application discloses a kind of planning methods for
chip wiring
layout fusion evolution and SAT solution, it is related to
chip design technical field. Including: obtaining the
conjunctive normal form of
chip wiring
layout problem, the coding rule of individual is defined;According to the search strategy and simplified evolution process of stage, search the optimal parameter combination about the value of evolution
algorithm super parameter;Based on the optimal parameter combination and individual coding rule, initialize
population and carry out iterative evolution;In the
iteration process, based on conflict information and optimization target contribution, implement different cross
mutation strategy, dynamically adjust the cross rate and
mutation rate of each variable, while collecting key information, the individual that does not satisfy constraint is repaired directionally;Finally, according to the
evaluation result screening individual, obtain
global optimal solution set, realize the efficient solution to chip wiring
layout problem, solve the problems such as poor timeliness, weak
constraint satisfaction ability and low convergence quality of prior art.