106 results about "Test input" patented technology

Containerized orchestration of secure socket layer virtual private network benchmarking is disclosed. A test portal can accommodate developing test event information (TEI) based on test input information. Test input information can be used to generate event images, e.g., containers, that can be readily scaled, mutated, etc., via a containerization environment instance. One or more event image can be groups into a pod. An event image can be a new container, a previously used container, or a permutation of a container. Event image(s) can be retrieved from external sources, e.g., a library, a commercial vendor of event images, etc. TEI can be based on a pod(s) and communicated to a device-under-test (DUT). DUT performance can be measured, and results can be accessed by an entity, e.g., a test engineer, a results analysis engine, etc. Results can be employed to direct subsequent DUT testing.

The invention belongs to the technical field of automatic testing, and particularly relates to a web automatic testing method and system.The method comprises the steps of automatic script recording and dynamic adaptation, layered framework collaborative testing and data verification and continuous integration testing and test report generation. Wherein automatic script recording is dynamically adapted: recording a page operation script through a playwright tool and applying the page operation script to a UI layer, and when the page UI changes, recording the script again and replacing the original script without element-by-element positioning and code modification; in the hierarchical framework collaborative testing and data verification, a data access layer inputs test data, a UI layer executes page operation and captures display data, and a business logic layer calls an API interface to obtain real data and compares the real data with the display data for verification. According to the method, a web automatic test framework is constructed in combination with the advantages of playwright, a structured engineering project is more suitable for project operation and maintenance, and a sustainable integrated test environment is constructed by utilizing jenkins, so that test input, execution and output are automated.

A semiconductor device includes a plurality of test circuits connected between a test input pin and a test output pin, and a TAP controller connected to a plurality of test control pins and configured to define a data transmission path between the test input pin and the test output pin in response to test control signals received by the plurality of test control pins, the data transmission path including at least one of the plurality of test circuits.

A network function configuration and test generation framework are configured to generate a test script indicative of a configuration and test cases for verifying a virtual function implemented in a virtualized computing environment. A test input is received that encodes information for verifying a network function. The information includes identification of a test tool, a target testbed for testing the network function, and network information including parameters for network conditions to be operational during testing of the network function. A data parser translates and formats the test input. The formatted test input in input to a topology discoverer configured to identify a network topology of the testbed and which network functions deployed on the testbed are emulated and which network functions deployed on the testbed are real. A configuration generator generates a configuration file usable to configure applicable network functions and their functionalities.

A method of updating a sequence model for meta-continual learning, the method including generating an episode comprising a training dataset and a test dataset, updating an internal state of the sequence model by performing a forward pass of the training dataset on the sequence model, wherein the internal state is updated based on a parameter of the sequence model, generating an output corresponding to a test input included in the test dataset by performing a forward pass of the test input on the sequence model based on the updated internal state and the parameter, determining a difference between the output corresponding to the test input and a target test result corresponding to the test input as a meta-loss, and updating the parameter of the sequence model based on the meta-loss.

A network function configuration and test generation framework are configured to generate a test script indicative of a configuration and test cases for verifying a virtual function implemented in a virtualized computing environment. A test input is received that encodes information for verifying a network function. The information includes identification of a test tool, a target testbed for testing the network function, and network information including parameters for network conditions to be operational during testing of the network function. A data parser translates and formats the test input. The formatted test input in input to a topology discoverer configured to identify a network topology of the testbed and which network functions deployed on the testbed are emulated and which network functions deployed on the testbed are real. A configuration generator generates a configuration file usable to configure applicable network functions and their functionalities.

The invention discloses a method and a system for automatically repairing context learning code vulnerabilities of a large language model, and aims to solve the problems that invalid patches are easily generated, vulnerability causes are misunderstood and verification is lacked in existing LLM zero sample repairing, and a traditional method depends on annotated data or test input. The method comprises the following steps: processing a vulnerability code-patch pair containing a plurality of different CWE types and a target vulnerability code, extracting vulnerability-related codes and constructing an example pool; an adaptive example is selected through comprehensive comparison of semantics, lexical and structural similarity; generating prompt words in combination with related codes and adaptive examples, driving LLMs to generate candidate patches, and outputting effective patches after verification of multiple LLMs; the system comprises a code processing module, an example selection module and a patch generation and verification module. According to the method, LLM and a large amount of annotated data do not need to be finely adjusted, the repair efficiency and accuracy are improved, the labor cost is reduced, multi-language extension is supported, and industrialization potential is achieved.

The invention provides an automatic test system and test method for an input board, and relates to the technical field of railway signal equipment detection application. The method comprises the following steps: the industrial control computer controls the power supply to start and perform self-inspection; the upper computer software carries out initialization setting on communication parameters and working states of the processing board unit, the IO part mainboard, the camera, the controllable power supply and the tested input board and establishes a test log; the upper computer software judges whether each test point of the tested input board is short-circuited or adhered or not, whether an indicator lamp works normally or not and whether each channel runs normally or not by controlling the short-circuit judgment module, the camera and each path of output of the tested input board; and the upper computer software generates all test results into test records and uploads the test records to the control center. According to the invention, by simulating the real working state of the input board, the automatic test of the function and performance of the input board is realized, the test efficiency and the measurement accuracy are improved, the labor intensity is reduced, and the data management is more convenient.

The present application relates to a device for testing electrical performance parameters of bipolar transistors, comprising a test fixture for operatively mechanically and electrically coupling a bipolar transistor to be tested, a test circuit for applying a test input signal to the transistor under test, a measurement circuit for measuring an output signal of the transistor and determining electrical performance parameters thereof, and a controller for automating the testing process and analyzing the measurement data, wherein the test fixture has fluid cavities formed through its length by one or more flow holes, and at least one cooling section in the form of a uniform or non-uniform spiral is arranged in each fluid cavity to extend along the corresponding fluid cavity. The test circuit comprises a signal generator for generating the input signal and a power supply for providing necessary bias voltages to the transistor; the measurement circuit comprises an oscilloscope for measuring the output signal and a computer for processing the measurement data; the controller is capable of automatically acquiring and analyzing the measurement data of the transistor to determine the electrical performance parameters.

Methods and systems for automated generation of an advanced planning tool (APT) for an advanced planning system (APS) are described. One or more input questions for an operations plan are received. A generic APT contract that is relevant to a given one input question is retrieved. The generic APT contract is customized by mapping parameters defined in the data schema associated with the operations plan to placeholders in the generic APT contract. Generic APT code corresponding to the generic APT contract is customized by replacing placeholders in the generic APT code with parameters defined in the data schema, in accordance with the mapping. The customized APT code is deployed to obtain the executable customized APT. Verification of the customized APT is performed by automatically performing test executions of the customized APT using test inputs automatically generated using the data schema. The customized APT contract is outputted to a user device.

A device (1) having a DA conversion circuit is provided with at least: a processor (10P) that outputs a DA conversion target value; a pre-stage circuit (10FNT) that receives the DA conversion target value from the processor (10P), corrects the DA conversion target value in accordance with the correction data, and outputs the corrected DA conversion target value; a main body circuit (10BDY) that includes one or more DA converter elements to be corrected and that performs DA conversion on the corrected DA conversion value; and an AD converter (10AD). Here, the DA converter element to be corrected is a hybrid DA converter element that outputs, from an output terminal, an analog value obtained by adding an analog value output by a first-type circuit section (SEG1) responsible for an upper level and an analog value output by a second-type circuit section (SEG2) responsible for a lower level. Furthermore, as a calibration test for creating or updating calibration data, the processor (10P): A) acquires a plurality of test pairs, each of which is a pair of a test input value and a test result value having the following characteristics: (A1) the test input value is a value input to the main circuit in a corrected or uncorrected manner as a value to be subjected to DA conversion, and (A2) the test result value is a value input to the main circuit in a corrected or uncorrected manner as a value to be subjected to DA conversion; (A2) The test result value is a value obtained by AD-converting an analog value output by inputting the test input value to the main body circuit by means of an AD converter, and (B) the correction data is updated on the basis of the plurality of test pairs in (A). Here, the number of test pairs acquired during the calibration test is less than N power of 2, N being the number of bits indicating the resolution of the DA converter element to be calibrated.

The invention relates to the technical field of chip testing, and discloses a chip noise anti-interference testing system which comprises a first direct-current power supply, a signal generator, a coupling plate, an evaluation plate and an oscilloscope. The coupling plate is provided with a signal input connector, a power supply input connector, a filter circuit, an electronic switch and an output connector. The signal input connector is connected with the signal generator. The power supply input connector is connected with the output end of the first direct-current power supply. The control end of the electronic switch is connected with the signal input connector, the input end is connected with the power supply input connector through the filter circuit, and the output end is connected with the output connector. The evaluation board is provided with a test input connector, a test output connector, a feedback connector and a chip test seat which is electrically connected with the three connectors. The test input connector is connected with the output connector, the test output connector is connected with the oscilloscope, and the feedback connector is connected with the feedback end of the first direct-current power supply. The system can carry out anti-interference test on a high-current and low-voltage chip with low cost.

The invention discloses a deep learning auxiliary test case generation method for parallel program path coverage, and aims to improve the test efficiency of parallel program path coverage. The method comprises the following specific steps: (1) sampling a test input set conforming to uniform distribution characteristics, obtaining a parallel program execution path of each test input, and forming a representative training sample set; (2) training a deep learning model by using the representative training sample set, estimating a candidate test case of the target path by means of the model, and judging whether the candidate case can cover the target path or not; and (3) updating the deep learning model based on the candidate test cases not covering the target paths and the execution paths of the candidate test cases, and repeatedly iterating application and updating of the deep learning model until a test case set covering all the target paths is generated.

The invention discloses a deep learning library API fuzzy testing method based on semantic analysis, and belongs to the field of reliability testing of deep learning systems. The method comprises the following steps of: 1, analyzing an input check logic by using a large language model, extracting an edge condition and forming a structured expression; 2, converting the edge conditions into formalized logic predicates, performing semantic embedding and vectorization processing, and selecting representative conditions to form a variation condition set; 3, generating an executable test program, and automatically repairing a non-running program to form an executable seed program; and 4, generating diversified test input, running at the rear ends of the CPU and the GPU respectively, and identifying potential implementation defects of the deep learning framework by detecting collapse behaviors, running exceptions and cross-device output inconsistency. According to the method, the boundary condition coverage capability can be effectively improved, and the defect detection efficiency of the deep learning library API is improved.

This application proposes a software automated testing method and system, relating to the field of software testing technology. The method includes: constructing a directed acyclic graph (DAG), identifying call path fragments, and constructing test input data; driving the software system under test to execute a test run and generating new function call information; converting the new function call information into a sequence of new nodes, and performing structural difference analysis with historical test run records to generate a cumulative composite difference value; if the cumulative composite difference value is greater than a preset threshold, storing the test input data in a pre-constructed test case library as a new test case, forming an updated test case library; and executing multiple rounds of test runs on the software system under test based on the updated test case library. This allows potential defect paths that were previously continuously uncovered to be systematically discovered, reproduced, and solidified, fundamentally alleviating the dilemma of insufficient accuracy and resource waste caused by the non-evolving nature of testing behavior.

The invention discloses a method and a system for testing synchronous digital quantity injection of a regional stability control system based on network time synchronization, and the method is characterized in that the method comprises the following steps: S1, determining a test case needed by each control strategy function test of the stability control system according to the architecture and functions of the regional stability control system; s2, based on the test state sequence and the test input quantity determined by the test case, automatically generating a stability control system digital quantity injection test script matched with the test state sequence and the test input quantity; s3, through a network time synchronization mechanism, it is ensured that clock references of the test computer systems of all the sites are consistent, triggering time marks of test cases are set in a unified mode, and generated test case scripts are distributed to stability control devices of all the sites; and S4, analyzing the received test case script by the stability control device of each station, and extracting a test state sequence and characteristic parameters related to the station device.

The application provides a wire SI performance test board for rapid docking, comprising a test mainboard, a plurality of test output interfaces are arranged on the front surface of the test mainboard, a first SMA interface is arranged on the upper side of the test output interface, a second SMA interface is arranged on the left side of the test output interface, a test input interface is arranged on the back surface of the test mainboard, the test input interface is provided with a first magnetic attraction assembly, the test mainboard further comprises a test input connector, the test input connector is provided with a second magnetic attraction assembly, one end of the test input connector is rapidly docked with the test input interface through the second magnetic attraction assembly and the first magnetic attraction assembly, and the other end of the test input connector is provided with a wire docking interface. The application can significantly improve the wire connection / detaching efficiency, is simple and reliable to operate, reduces interface abrasion, and has good adaptability.

A semiconductor device includes: a plurality of test circuits connected between a test input pin and a test output pin; and a TAP controller connected to the plurality of test control pins and configured to define a data transmission path between the test input pin and the test output pin in response to test control signals received by the plurality of test control pins, the data transmission path including at least one of the plurality of test circuits.

This application discloses a method, computer device, and readable storage medium for determining SQL injection vulnerabilities in source code, belonging to the field of source code security detection technology. The method includes the following steps: responding to an SQL injection detection command in the source code, generating a set of legal input parameters based on a legal input scenario corresponding to the source code, and generating a set of test input parameters based on an injection statement library; wherein the injection statement library includes multiple injection statement templates; based on the set of legal input parameters and the source code, collecting first execution data through code instrumentation; based on the set of test input parameters and the source code, collecting second execution data through code instrumentation; and determining SQL injection vulnerabilities in the source code based on the first execution data and the second execution data. This application can reduce the false positive rate of SQL injection vulnerability detection and improve the targeting of SQL injection vulnerability detection.

The invention discloses a software project automation test efficiency analysis method and device and electronic equipment, and relates to the financial science and technology field or other related technology fields, the method comprises the steps that a pre-constructed index system model is called, the index system model at least comprises a test input index, an intermediate product and a test output index, based on the index system model, using a network efficiency DEA model to evaluate the static efficiency, and analyzing automatic test efficiency values of each development project team related to the target software project in a plurality of preset historical time periods in a predetermined historical period; and based on the index system model, analyzing the dynamic change of the automatic test efficiency value by using a dynamic Malmquist index, and outputting a test efficiency evaluation report. According to the method and the device, the technical problem of low evaluation accuracy due to dependence on qualitative or semi-quantitative indexes during software project automatic test efficiency evaluation in the related technology is solved.

The application provides an artificial intelligence service online testing method and device, the method comprises the following steps: receiving interface definition information and expected verification data for an artificial intelligence service to be published, wherein the artificial intelligence service is deployed in a running environment; generating test request data based on the interface definition information and obtained test input data, and sending the test request data to the artificial intelligence service; receiving actual response data fed back by the artificial intelligence service to the test request data; when it is determined that the actual response data matches the expected verification data, updating the state of the artificial intelligence service to a published state to open the external calling permission of the artificial intelligence service, so that the test process can flexibly adapt to the differences of online environments and support instant adjustment and verification of parameters, an integrated closed-loop process of testing and publishing is constructed, and therefore, seamless integration of the test activity and the publishing process is realized, and instant test verification and significant improvement in environmental authenticity are achieved.

A chip with boundary testing includes two circuit groups. During a first shift-in period, a first circuit group receives a first test input, and a first boundary circuit of the first circuit group has first boundary data after receiving the first test input. During a first calculation period after the first shift-in period, a second boundary circuit of a second circuit group captures the first boundary data, and the second circuit group performs circuit calculation according to the first boundary data to generate a first test output. During a second shift-in period after the first calculation period, a second main circuit of the second circuit group outputs the first test output.

This invention discloses a vehicle infotainment system testing method. By having a controller uniformly receive modal simulation parameters, generate precise multimodal interaction commands, and coordinate the synchronous actions of the multimodal interaction simulation device and the audio / video acquisition device, a fully automated closed-loop testing process is constructed. This application fundamentally eliminates the randomness and uncertainty caused by manual operation. Since the test input commands (such as voice content, touch coordinates, and timing) are precisely reproduced by the device according to preset parameters, and the entire execution, acquisition, and judgment process is automatically driven by the controller, it ensures that the test conditions, execution steps, and triggering logic remain consistent at any time and for any number of tests. This application's embodiments make performance test results (such as response latency) objectively comparable, providing a reliable and consistent technical foundation for accurately evaluating vehicle infotainment system performance and identifying performance regression between versions.

This invention provides a database testing method, apparatus, electronic device, and storage medium based on protocol layer interaction. It generates test SQL statements, performs parameterization to form parameter placeholder structures, and extracts parameter constraint information. Based on the parameter placeholder structures, parameter constraint information, and the current session state, it generates protocol test cases, sequentially sends multiple protocol data packets, receives and parses response data packets returned by the database system, records communication error information during response reading, and updates the current session state based on the parsing results of the response data packets. When the communication error information is detected during response reading, if a crash occurs or the verification results are inconsistent, an error report is generated. This invention can cover protocol processing paths under different execution stages and interaction sequences, reduce invalid requests with semantically invalid or easily rejected requests, improve the validity of test input, and enhance the coverage depth and defect detection capability of database protocol testing.

A computer-implemented method for verifying and / or validating whether a technical system fulfills a desired criterion with a predefined probability. The technical system emits output signals based on input signals supplied to the technical system. The method includes: obtaining models for components of the technical system and connections between the models; obtaining test outputs for the models based on test inputs of the models and the connections between the models; determining an upper or lower bound of an output of the technical system; verifying and / or validating whether the technical system fulfills the criterion with the predefined probability based on the determined upper or lower bound of the output.

Systems / methods for fuzzy testing provide internal monitoring or a device under test (DUT) as / while test inputs are being processed by software running on the DUT. The systems / methods use a fuzz monitor agent that resides within the DUT to monitor for occurrence of crashes, failures, faults, exceptions, and other unexpected or undesired events or behavior caused by the software attempting to process the test inputs. The fuzz monitor agent logs the occurrence of any such events or behavior, then reports or otherwise provides the monitor log and any associated data to the fuzzing engine. To improve efficiency, the fuzz monitor agent can be compiled and run within the target DUT itself in some embodiments. This is particularly effective for testing embedded devices or other special function devices that are included within another device or as part of a larger overall system.

The application provides a fuzzy test method for multimodal large model application. According to a preset test requirement, a corresponding test mode is selected as a target test mode, and under the target test mode, a test input content is constructed based on a preset prompt word library to test the application model under test. Meanwhile, based on a 3D label mapping algorithm, dimension label processing is performed on the test output content to obtain target test output content including a label dimension. Finally, according to the label dimension of the target test output content, the risk level of the application model under test is determined, so that model test of the application model under test is realized.

Example circuitry is usable in testing a device under test (DUT). The circuitry includes test inputs; a resistor ladder including resistors electrically connected in series, with the resistor ladder being electrically connected to each of the test inputs; and first operational amplifiers, with each first operational amplifier including a first input and a first output, with each first input being electrically connected to the resistor ladder, and with each first output to electrically connect to the DUT. The circuitry includes floating circuitry which includes a second operational amplifier. The second operational amplifier includes a second input electrically connected to the resistor ladder and a reference input; a first power input to receive a first voltage; and a second power input to receive a second voltage. The floating circuitry is configured to apply the first voltage and the second voltage to power inputs of each of the first operational amplifiers.

The invention provides a software testing method and device, equipment, a storage medium and a program product, and relates to the field of artificial intelligence. The method comprises the following steps: analyzing a test case based on a standardized table model, and generating a data object which can be processed by a to-be-tested program; the standardized table model comprises title information, field information and data volume information; according to the data format specification of the target communication protocol, converting the data object into test input data meeting the protocol requirement; the target communication protocol is obtained according to the title information; inputting the test input data into the to-be-tested program and running the test input data to obtain response data based on the test input data; and performing assertion verification on the response data based on a predefined expected result in the test case to obtain a test result. According to the method provided by the invention, the compatibility of the test method to the protocol is improved, and the software test efficiency is improved.

The invention relates to the technical field of test technologies, and discloses a test case generation method and system based on a small model. The method comprises the following steps: receiving a vehicle-mounted ECU control code, extracting a hardware interface, a control logic and a time sequence constraint feature, and generating a lightweight feature vector set; constructing a weight sharing feedforward neural network to train a vehicle-mounted test small model; establishing a security level constraint system to generate constraint-oriented test parameters; organizing test parameters according to real-time requirements, and generating a battery management and motor control test input sequence; and mapping to be an executable test function based on the code template, and compiling to generate an HIL test bench execution script. The problems that an existing large model test generation method cannot be deployed in real time in a vehicle-mounted edge environment and lacks real-time constraint perception capability are solved, and the real-time performance and pertinence of vehicle-mounted test case generation are improved.