31 results about "Random testing" patented technology

According to the game copy automatic test case generation method and the terminal, a copy digital twinning scene is constructed through an environment simulator, an intelligent agent is generated, and the intelligent agent makes a decision by using a dual-network mechanism of a layered DQN controller; training agents in a grading manner by utilizing dynamic course learning, gradually improving difficulty according to copy complexity and migrating low-level training weights, and guiding the agents to explore in combination with a multi-dimensional reward function; generating a test case according to the agent exploration trajectory; according to the method, the digital twinning scene is constructed through the environment simulator, and the intelligent agent autonomously explores and covers a hidden path and a dynamic mechanism based on layered DQN and dynamic course learning, so that the test coverage rate can be effectively improved, the effectiveness of test case generation is ensured, and the dynamic course learning can effectively improve the training efficiency and quickly adapt to copy updating; the defects of low random test efficiency and poor static algorithm adaptability are overcome, and high-coverage, efficient and self-adaptive test case generation is realized.

This invention relates to the field of chip verification technology, and more particularly to a random verification method, electronic device, and medium based on register arrays. S1: Set m=1, execute S2; S2: Send data to RA in the target register array. m and RB m Input the same random test stimulus; S3, RA m Predict the random write value, and set F m Updated to RA m Predicted random write values; S4, RB m Write random numbers based on the input random test stimulus; S5, read the currently stored data in the RTL instances of all registers in the chip under test design in random order and compare it with the corresponding reference value. If they are all the same, proceed to S6; otherwise, the verification fails and the process ends; S6, compare m and M. If m

A DMA controller verification method is disclosed, comprising: constructing a hierarchical coverage model of functional characteristics based on the functional characteristics of the DMA controller, wherein the hierarchical coverage model of functional characteristics includes multiple levels corresponding to different functional dimensions of the DMA controller, and each level includes one or more coverage points corresponding to one or more functional characteristics under the corresponding functional dimension; generating a functional characteristic cross-combination matrix based on the hierarchical coverage model of functional characteristics, wherein the functional characteristic cross-combination matrix of functional characteristics includes multiple cross-combinations of coverage points selected from at least two different levels of the hierarchical coverage model of functional characteristics, and each cross-combination represents a corresponding functional characteristic cross-combination of the DMA controller; and generating a coverage monitoring configuration based on the functional characteristic cross-combination matrix of functional characteristics for monitoring the number of hits of the functional characteristic cross-combinations represented by various cross-combinations in the functional characteristic cross-combination matrix in random tests of the DMA controller.

An embodiment of the present application provides an instruction verification method, device, electronic device and storage medium, the method comprising: obtaining an instruction set to be verified; performing directed testing and random testing on the instruction set to be verified, respectively, to obtain an assembly file corresponding to the instruction set to be verified; using preset simulation software and the assembly file corresponding to the instruction set to be verified, to determine a verification result corresponding to the instruction set to be verified. In an embodiment of the present application, directed testing and random testing are performed on the instruction set to be verified, wherein the directed test is used to test special functions of the set, and the random verification method can randomly verify the loop depth, number of loops, and instructions within the loop body. The instruction verification method provided by the present application has good scalability and reusability, and can meet the needs of related verification system upgrades brought about by future adjustments to the number of loop instructions, loop depth, etc.

The invention provides a game testing method and device and electronic equipment, and the method comprises the steps: controlling at least one electronic equipment to load a specified game function module, and collecting test data generated when an artificial intelligence (AI) virtual role executes a game task included in game content corresponding to the specified game function module in the specified game function module; performing rule verification on the test data based on a pre-generated game design rule; performing comparison verification on the test data based on the historical test data passing the verification; and generating a test result of the target game based on the abnormal test data and the normal test data determined by the rule verification and the comparison verification. According to the method, a corresponding test script does not need to be written for each game task, and the AI virtual character is used for carrying out random running test, so that each function point in the game with high degree of freedom can be covered.

The embodiment of the invention provides a semi-random automatic testing method and system for an Android local library, and the method comprises the steps: taking an Android APK as input, and generating a local library function list; c / C + + codes in the APK are converted into Java byte codes, and the Java byte codes are repackaged to obtain a cross-language unified APK; based on the cross-language unified APK, constructing a composite call relation graph containing App states, UIs and cross-language function calls; according to the composite calling relation graph, guiding random testing so as to generate a state transition event library; based on the state transition event library, generating a test case pool by adopting a permutation and combination strategy; and selecting a test case from the test case pool, and executing a semi-random automatic test on the Android local library function. According to the invention, the pertinence, the coverage rate and the efficiency of the test can be obviously improved.

The invention relates to the field of quantum key distribution, and discloses a key distribution anti-attack method and system based on decoy state coding and an irrelevant protocol, and the method comprises the steps: Alice generates a signal state quantum pulse and a three-intensity decoy state quantum pulse in a mixed manner, and transmits and monitors channel parameters in real time through a quantum channel; bob randomly selects a measurement base for measurement, records original data and delays to obtain a state type identifier; the Charlie transmits a random test state, collects Bell inequality verification parameters, and implements equipment-independent security verification; the two parties screen matched data through base comparison, evaluate channel security and correct a signal state bit error rate by using a decoy state bit error rate; and based on the screened keys, a Toeplitz matrix negotiation protocol is adopted for compression to generate a final key, 10% of the keys are randomly extracted for cross validation, and after the cross validation is passed, the keys are stored, and the decoy state strength and the measurement base group parameters are updated. According to the method, an Alice, Bob and Charlie three-party system is constructed to form an iterative security closed loop, attack is comprehensively resisted, and a security key is generated.

Methods, systems, and apparatus, including computer-readable storage media for testing features of a database management system (DBMS). A DBMS testing framework generates new random test cases for testing database features on the system. The framework receives a query grammar specifying the structure of queries to generate and generates the queries randomly. The framework executes the queries with database features randomly enabled or disabled and generates performance data from the results of executing those queries. The framework identifies points of failure in the performance data, corresponding to instances in which queries executed with certain combinations of database features result in incorrect output, or degraded performance relative to executing the queries without the database features enabled. The testing framework divides the database preparation, query generation, and query execution parts of a test pipeline into separate components, which can be modified separately or left to proceed in a default operating mode.

The application discloses a random test case generation method. The method comprises the following steps: generating at least one random factor, and acquiring a current test step in a plurality of type step libraries matched with a test object according to the value of each random factor; if the current test step satisfies a legality condition according to a generated test step set, the current test step is added to the generated test step set; returning to the operation of generating at least one random factor until the number of test steps in the generated test step set reaches a target number threshold; and constructing at least one random test case according to the generated test step set at the end of the cycle. Through the above technical scheme, the test case of the random scene can be automatically generated according to the test requirement, and the coverage of the test is effectively improved.

This application provides an asynchronous communication management method, apparatus, electronic device, and storage medium, relating to the field of chip design and manufacturing technology. The method includes: modifying the instruction count and / or data volume count in the memory barrier data block of the asynchronous communication unit based on instructions sent by the asynchronous communication unit; and modifying the status bits in the memory barrier data block of the asynchronous communication unit when the instruction count and data volume count meet preset conditions. The method and apparatus provided by this application not only manage the synchronization state between producers and consumers based on memory barriers, ensuring the consistency and correctness of data exchanged between producers and consumers, but also abstract the complex count update and status judgment logic from specific test cases, forming a general asynchronous communication management mechanism that can be implemented by a dedicated memory barrier controller, supports random testing, and improves the flexibility of test verification.

Embodiments of the present application disclose an application program testing method and device, electronic equipment and storage medium. The method comprises: obtaining a first test duration of a random test mode; according to a graph of a to-be-tested application program, executing a segment corresponding to a control in a page of the to-be-tested application program by the random test mode, recording a first segment and a first page that have been executed, obtaining a test result of the first segment, until the test duration of the random test mode reaches the first test duration; the segment is test content corresponding to the control; according to the graph, the first segment and the first page, determining a second segment that has not been executed and a second page where the second segment is located; according to the second page, executing the second segment by a traversal test mode, and obtaining a test result of the second segment. The embodiments of the present application can improve test efficiency and software quality of the application program.

The invention discloses a simulation test method, device and equipment of an urban rail system and a storage medium, and relates to the field of electrical digital data processing, the method adopts a JSON configuration file to integrate rail topology and kinetic parameters, converts operation data through an OPC-UA server, realizes data intercommunication of heterogeneous systems through a preset JSON format, and improves compatibility; a Unity3D engine is used for building an equal-proportion digital model, the position and operation data of a train are mapped in real time, the visual limitation of traditional two-dimensional simulation is broken through, and system response of complex scenes such as high-density traffic flow and sudden failures can be observed conveniently; a multi-objective function is defined based on an operation strategy, a comprehensive optimal scheme is automatically output through a Pareto optimal solution set, the randomness defect that a traditional method depends on manual repeated testing is avoided, and the testing efficiency and decision scientificity are improved. Multi-train analogue simulation is realized, and the potential problems of interface fragmentation, insufficient scene visualization and low random test efficiency are solved.

The invention discloses a vehicle-mounted multi-source signal cloud test method, system and device, and relates to the technical field of vehicle-mounted electronic testing, and the method comprises the steps: obtaining a platform collection list, so as to generate a plurality of groups of random test data file information; constructing a DDS service simulation environment, and generating a corresponding signal sending sequence script and a reference data recording script according to each group of random test data files; based on a DDS service simulation environment, calling a signal sending sequence script and a reference data recording script, injecting signals according to a sequence, and recording reference data to a reference data file at the same time; and receiving and analyzing the cloud log collected by the vehicle end according to the collection strategy of the platform collection list to generate a result data file, and comparing the reference data file with the result data file to generate a test result. According to the invention, cloud testing of multi-source signals is realized, the coverage rate and efficiency of vehicle-mounted signal testing are greatly improved, the testing cost is reduced, and the problem of multi-source signal collaborative testing is solved.

The invention discloses a dynamic simulation execution extension and verification method for an instruction. The method comprises the following steps: 1) acquiring instruction semantic data of a target processor and defining a group of metamorphic relationships; 2) generating an instruction semantic function based on the instruction semantic information as a reference model; 3) generating a random test case based on the reference model; 4) mining a metamorphic relation of the instruction by using a large model; 5) formalizing each metamorphic relation into a logic constraint, and verifying whether the reference model conforms to the metamorphic relation or not; if the verification is passed, confirming that the corresponding metamorphic relationship is valid; if a counter example occurs, rejecting an unestablished metamorphic relationship; the method comprises the steps of (1) verifying a random test relation and a metamorphic relation, (2) generating a metamorphic test case based on each verified metamorphic relation, (7) completing simulation implementation of an instruction function according to an instruction semantic assembly interface, (8) executing the generated random test and metamorphic test cases and comparing an execution result with output of a reference model, if the execution result is inconsistent with the output of the reference model, readjusting instruction implementation, and otherwise, completing verification.

The application discloses a simulation test method, device and equipment of a city rail system and a storage medium, relates to the field of electric digital data processing, and integrates track topology and dynamic parameters by using a JSON configuration file, converts operation data through an OPC-UA server, realizes heterogeneous system data intercommunication through a preset JSON format, and improves compatibility; a Unity3D engine is used to build a digital model with the same proportion, real-time mapping of train position and operation data is realized, the visual limitation of traditional two-dimensional simulation is broken, and system response to complex scenes such as high-density traffic and sudden faults can be observed; a multi-objective function is defined based on an operation strategy, a comprehensive optimal scheme is automatically output through a Pareto optimal solution set, the randomness defect of traditional methods depending on artificial repeated testing is avoided, and the test efficiency and decision scientificity are improved. Multi-train simulation is realized, and potential problems such as interface fragmentation, insufficient scene visualization and inefficient random testing are solved.

The invention discloses a test case generation method and device, equipment and a computer storage medium. The method comprises the steps of performing static analysis on a to-be-tested program to obtain program structure information; executing an initial test based on the program structure information, and collecting initial coverage information; selecting a target path from the to-be-covered path set based on a dynamic evaluation mechanism and the initial coverage information; performing symbolization processing on the target path, generating a path constraint and performing constraint solution; when constraint solving succeeds, generating a test case covering the target path; and when the constraint solution fails, generating a guide signal based on the unsuccessfully solved part, and executing a guide type search based on the guide signal to generate a test case covering the target path. According to the method, the problems that complex branches are difficult to cover due to low random test efficiency, symbolic execution path explosion and constraint solution are difficult, a search technology is easy to fall into local optimum, and initial exploration efficiency is low can be solved, and test case generation efficiency and path coverage capability are improved.

The invention relates to a PCIe bus test verification system, which is characterized in that an excitation generator generates a corresponding random test sequence according to the specific content of a test case; the driving module packages or encodes the random test sequences into corresponding signals or levels according to transaction types of the random test sequences, and sends the signals or levels to the PCIe module to be verified from different interfaces; the PCIe reference model serves as a control group of the to-be-verified PCIe module, excitation input to the to-be-verified PCIe module is synchronously input to the PCIe reference model to be processed, and output data are sent to the comparator; the monitoring module monitors a port level signal of the to-be-verified PCIe module, converts the output of the to-be-verified PCIe module into a test result transaction and sends the test result transaction to the comparator; the comparator collects test result transaction data, calls a result output by the PCIe reference model for real-time comparison, and judges the function operation condition of the to-be-verified PCIe module; and the function coverage rate module summarizes verification results of the comparators, and counts the coverage rate by sampling function coverage points to obtain a final verification result.

Hardware errors can be detected by generating a plurality of test templates to perform testing on an integrated circuit (IC) device. A set of random tests can be generated corresponding to the plurality of test templates. The set of random tests can be executed on the IC device for multiple passes, and the results of the multiple passes can be compared to detect the hardware error in the IC device. The set of random tests can be generated as a binary image for execution on the IC device. The IC device may include multiple processing cores, and executing the multiple passes may include changing logical role of each processing core between subsequent passes. The set of random tests can be executed in a bare-metal mode, or at an application level of the IC device.

This invention provides a fully randomized testing method, apparatus, device, medium, and product for an SGPIO master module. The method involves simultaneously transmitting the SGPIO master module's configuration object to the APB driver component, the SGPIO driver component, and the SGPIO sampling component. If the APB bus write transaction is an SGPIO control register configuration transaction, the parallel write data from the APB bus is parsed to obtain configuration information. The configuration object of the SGPIO master module is modified according to the configuration information, enabling the SGPIO driver component or the SGPIO sampling component to promptly change the protocol mode. Multiple reference models for interrupt states are instantiated in the basic test class. In the test case component, the reference model is selected using an override mechanism based on the currently verified interrupt triggering method. By comparing the expected value and the actual value of the interrupt status register, fully randomized verification of the SGPIO master module's interrupt status register value can be achieved. This invention improves the comprehensiveness and effectiveness of SGPIO master module testing.

A computer system, computer readable storage medium, and computer-implemented method for retrograding an instruction stream to enhance random test generation. The method includes generating a test case for a design-under-test (DUT) comprising positioning one or more placeholder instructions in the test case. The method also includes identifying one or more benefiting instructions. The method further includes executing the test case by replacing the one or more placeholder instructions with one or more respective retrograding instructions. The one or more retrograding instructions influence the one or more benefiting instructions.

The invention relates to a method and equipment for testing forwarding performance of a network switch and a medium. The method comprises the steps that a tester detects whether the network switch is qualified or not through a random test rate, and the random test rate belongs to a first rate interval; if it is detected that the network switch is qualified, determining a candidate test rate of the network switch through the minimum test rate or the maximum test rate; and the tester determines the actual forwarding rate of the network switch through a set test rate, and the set test rate is determined based on the candidate test rate. According to the technical scheme, the test time is reduced as much as possible in each step, the test efficiency is improved, the coverage is considered, and the accuracy is ensured.

The application provides a method for improving the teaching effect of simulator operation by means of examination, and is used for improving the teaching effect. Specifically, a directed acyclic graph is used to describe the knowledge system in the teaching of simulator operation. The knowledge system is composed of multiple knowledge paths, each knowledge path is composed of theoretical knowledge nodes and skill nodes which appear alternately, and the direction of the knowledge path represents the learning sequence. Each node contains multiple test questions. The examination strategy of this time is determined according to the importance of the node and the examination state of the previous node. After completing this examination, the examination state of all nodes is updated to prepare for the next examination strategy. The application can adjust the examination strategy in multiple rounds of examination according to the answer results of the learners, the importance of the knowledge points and the historical examination situation, continuously eliminate the test questions which cannot effectively detect the mastery of the knowledge points through the test question evaluation, optimize the test question library, enhance the pertinence of the teaching, and thus improve the efficiency of the teaching of simulator operation.

This invention discloses a compatibility testing method for frequency-using devices based on a recording and playback device, belonging to the field of wireless communication testing technology. The method constructs a joint action set consisting of desired signal input power levels and interference frequency levels. Under each joint action, it collects and stores IQ sample data of the frequency-using device under test, calculates the bit error rate and the proportion of demodulated effective data, and forms a test trajectory. The IQ sample data is replayed, and a state-action reward function is constructed based on the test trajectory to generate a random testing strategy. During online testing, the candidate interference frequency set is dynamically eliminated based on the threshold power estimate and confidence margin, and backoff control is performed in the unlocked state. Finally, the most unfavorable interference frequency level is located, and the minimum desired signal input power that satisfies the preset bit error rate threshold and the preset demodulated effective data proportion threshold is determined, outputting the digital sensitivity result. This invention can improve the efficiency, stability, and consistency of compatibility testing.

The application provides a game level difficulty evaluation method and system, the method comprises the following steps: obtaining a current game level to be tested; obtaining random AI parameters and specific level pass parameters, setting and using a preset random AI test tool to simulate the pass operation of the current game level to be tested to obtain initial pass test data; correcting the initial pass test data by using a preset probability model to obtain current level pass difficulty data; and performing personalized setting on the game level to be tested according to the current level pass difficulty data. The application solves the technical problems of high dependence on human engineering, low consistency of test results, low test configuration efficiency and poor applicability.

The invention relates to a test method and device based on a verification configuration file, electronic equipment and a medium. The method comprises the steps of generating a verification configuration file in response to a circuit test request in a UVM verification environment; performing Hash calculation on the verification configuration file to obtain a Hash value as a file name of the verification configuration file; storing the verification configuration file to an archiving directory, and determining a storage path of the verification configuration file; generating a simulation log corresponding to the verification configuration file by using the hash value, the storage path and a rerun command constructed by the hash value; and loading the corresponding verification configuration file by utilizing a rerun command carried in a regression test request and utilizing the simulation log to carry out a regression test. The rerun command and the simulation log in the regression test request are used for loading the configuration file to carry out the regression test, so that the problem debugging and testing efficiency is improved, the reproduction time is shortened, the automatic fusion of random testing and directional testing is realized, and the automatic accumulation of test cases is supported.

The application provides a non-overlapping template matching method and device for random number detection, an electronic device and a non-transitory computer readable storage medium. The matching method comprises initializing a target template array and a statistical array according to the length of a target template; determining the element value of the position corresponding to the target template array by using the target template; shifting the non-overlapping template to obtain a subsequence of the non-overlapping template; judging whether the subsequence is the target template by using the target template array; and updating the statistical array according to the judgment result. According to some embodiments, the non-overlapping number of multiple target templates in the non-overlapping template can be determined by reading the non-overlapping template only once. Compared with the prior art, the requirement for hardware is greatly reduced, and the overall test time of random testing is reduced.

The invention discloses a game video memory fragment test method and system, and the method comprises the steps: defining an intelligent agent for triggering memory overflow, respectively defining a state space, an action space and a reward function of the intelligent agent, training the intelligent agent based on the state space, the action space and the reward function through employing a near-end strategy optimization algorithm, a game operation sequence for triggering memory overflow is generated, a video memory fragment test is performed on a game by utilizing a reinforcement learning algorithm, the limitation of a traditional random test and a static scene test library is broken through by actively exploring the game operation sequence for triggering the OOM through an intelligent agent, the reproduction efficiency of the video memory fragment OOM is remarkably improved, and the test efficiency of the OOM is improved. According to the method and the device, omission of the game operation causing the video memory fragment OOM is avoided, and the high-risk operation chain causing the video memory fragment OOM in the game is accurately positioned, so that the game operation triggering the video memory fragment OOM is accurately and comprehensively tested.

The invention discloses a fuzzy testing method and system for a vehicle electronic control unit, and belongs to the technical field of automobile testing. Comprising the steps that a test host is in communication connection with a target electronic control unit of a target vehicle, and a plurality of target test cases of the target electronic control unit are generated according to a preset generation algorithm; according to a preset test strategy, the multiple target test cases are injected into the target electronic control unit for testing, and a test response result is obtained; performing vulnerability analysis on the test response result to generate a vulnerability analysis report; the self-adaptive optimization module optimizes the generation algorithm according to the vulnerability analysis report; performing an iterative test on the target electronic control unit according to the mode; according to the method and the device, the boundary value test case, the random test case and the historical vulnerability guide test case for testing the target electronic control unit in the next round are generated according to the target vulnerability proportion of the current round, so that the dynamic allocation of the target test case proportion is realized.

The invention provides an EMMC chip performance test method and system, and relates to the technical field of chip testing, and the method comprises the steps: generating a pseudo-random test sequence in combination with EMMC chip attributes; carrying out global test on the EMMC chip by utilizing the pseudo-random test sequence, and recording bad block distribution data and read-write speed data under different concurrent thread counts; dividing a depth test area of the EMMC chip based on a morphological expansion principle; performing local test on the depth test area by using the pseudo-random test sequence, and determining a target bad block through a clustering algorithm; according to the read-write speed data, determining a maximum concurrent thread count and read-write speed data corresponding to each concurrent thread count under the maximum concurrent thread count through a maximum Lyapunov index; and outputting the target bad block, the maximum concurrent thread count and the read-write speed data under each concurrent thread count, and completing the performance test of the EMMC chip. And the test efficiency and accuracy are improved.

The invention discloses a digital sensitivity test method based on IQ signal sampling, storage and playback, and belongs to the technical field of radio measurement. The method comprises the following steps: controlling to input a test signal of power to a tested radio station, calculating a bit error rate to demodulate a valid data proportion, and forming and storing an expert track; performing inverse reinforcement learning on the expert trajectory to obtain reward function parameters; estimating a state transition probability, an action value function and a state value function based on the expert trajectory and / or a new trajectory obtained by a subsequent test; and acquiring a random test strategy: iteratively selecting an input power gear according to the random test strategy and carrying out test to generate a new track update state transition probability and / or a value function until a convergence condition is met, and determining the minimum input signal power meeting a set threshold condition as the receiver digital sensitivity of the tested radio station. According to the invention, the digital sensitivity of the radio station receiver to be tested is determined with fewer test points and higher efficiency, and the test consistency and repeatability are improved at the same time.