6 results about "Hardware trojan horse" patented technology

The hardware Trojan detection method and system based on low activity and low observation node joint analysis belong to the technical field of integrated circuit security, and solve the problem of how to improve the accuracy of identifying high-concealment hardware Trojan; the gate-level netlist is abstracted into a signal propagation directed graph, the nodes in the low activity candidate trigger node set are taken as the starting nodes, the nodes in the low observation candidate load node set are taken as the target nodes, the effective signal propagation path from the starting node to the target node is searched in the directed graph, and if the effective signal propagation path exists, it is determined as a high-risk hardware Trojan potential link; the application proposes a method for identifying high-concealment hardware Trojan potential signal link based on gate-level netlist static analysis, which does not depend on the golden reference model, and does not need to know the Trojan feature library, and is especially suitable for third-party IP core access security detection, backdoor review and logic credibility verification scenes.

The application provides a multi-dimensional layered hardware Trojan evaluation method for an IP soft core, constructs a Trojan multi-dimensional feature library, performs function integrity analysis to identify a first module in which a Trojan may exist, obtains equivalent RTL level code for a module in which no anomaly is found, takes each module of the RTL level code as a node and takes the calling relationship between each module as a weight to establish an information flow graph, compares the information flow graph with the Trojan multi-dimensional feature library to obtain a second module in which a Trojan may exist, analyzes the information flow graph, and takes a module in which the calling is less than a set threshold, a module with an isolated node and a module adjacent to the isolated node in the information flow graph as a third module in which a Trojan may exist, analyzes the first module, the second module and the third module, calculates code coverage, signal flip rate, signal and clock delay anomaly, power consumption anomaly and layout blocking anomaly, and comprehensively evaluates to locate a module in which a Trojan exists in the to-be-detected IP soft core.

The application discloses a GPU delay type hardware Trojan design method for NVLink interconnection triggering, belongs to the field of integrated circuit security, and is suitable for a multi-GPU system adopting an NVLink high-speed interconnection. The method implants a hardware Trojan into an NVLink control circuit of a host GPU, collects and counts traffic features of multiple NVLink ports within a preset time window, and judges whether a triggering condition is met based on correlation measurement values between the ports. When the correlation measurement values exceed a preset threshold, delay control is preferentially exerted on control type transactions, atomic transactions and other time delay sensitive transactions in a target port. The application adopts a random bit sequence mapping mode to generate delay strength, and randomly implements non-uniform communication delay without analyzing communication content, so that communication time delay in a multi-GPU cooperative calculation process is increased and overall execution efficiency of the system is reduced.

A method for online monitoring and tracing of hardware Trojans implanted in AI accelerators based on heterogeneous side-channel perception is proposed. This method collaboratively schedules heterogeneous native monitoring resources on FPGAs to capture multi-dimensional side-channel feature fingerprints in situ. It utilizes deep neural networks for spatiotemporal joint modeling and behavior reconstruction, and integrates adaptive compensation strategies to resist thermal drift interference. This enables autonomous monitoring of hardware Trojan behavior and precise physical region tracing within the AI ​​accelerator. This method significantly improves the robustness of hardware Trojan detection under complex conditions without requiring external audit intervention or significantly impacting accelerator inference performance. It also demonstrates good detection generalization ability for various unknown triggering mechanisms, providing a key technical path for the security assessment and risk hardening of convolutional neural network accelerators.

This invention relates to a hardware Trojan side-channel detection method based on an autoencoder, belonging to the field of network security side-channel analysis technology, specifically a side-channel detection method for artificial intelligence hardware Trojans based on an autoencoder. The method of this invention is easy to implement, the normal data used for training is easy to collect, and the autoencoder method has relatively low computational cost, making it suitable for application in practical scenarios. This method uses side-channel information as input to the autoencoder and performs anomaly detection based on the encoding results obtained by the encoder, providing intuitive and accurate results.