Hardware Trojan horse detection method based on information flow security verification

Abstract

The invention provides a hardware Trojan horse detection method based on information flow security verification. The method includes constructing an information flow model for integrated circuit hardware design; defining information flow security attributes required to be met by hardware design; adopting an EDA formal verification tool for information flow safety verification, detecting potentialTrojans in hardware design by capturing the situation that information flow safety attributes violate, and achieving accurate positioning of Trojan design and triggering mechanism revealing of the Trojan design by means of the reverse tracking capacity provided by the information flow model. The method can effectively avoid additional design expenditure caused by semantic difference between the hardware design language and the verification language, and improves the efficiency of security verification and Trojan horse detection.

Description

technical field [0001] The present invention relates to the field of information security, in particular to a hardware Trojan horse detection method, which is a processing and analysis method for integrated circuit hardware design, using information flow security verification technology to analyze hardware design, and through information flow security verification means, to determine the integrated Whether there is a Trojan horse in the circuit hardware design. Background technique [0002] IC hardware design and supply has become a global industrial chain. The integrated circuit design process often involves multiple teams distributed around the world, and usually integrates a large number of IP (Intellectual Property) core products from untrusted third parties. The uncontrollability of the design process will lead to potential hardware Trojan horses and backdoors in the hardware design. and other security vulnerabilities. Hardware Trojan horses are security threats cause...

AI Technical Summary

Problems solved by technology

However, the existing security verification methods usually need to use a formal language to reconstruct the security verification model of the hardware design. There are significant semantic differences between the formal language and the hardware design language, which will increase a large amount of additional design costs.

Furthermore, existing methods often fail to pinpoint the Trojan design or reveal the Trojan trigger mechanism from the entire design

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