149 results about "Unit testing" patented technology

The invention belongs to the technical field of equipment knowledge engineering and natural language processing, and discloses an LLM-based constraint and self-repairing uniformization equipment knowledge graph automatic construction method. The method comprises the following steps: firstly, acquiring equipment related document data through network collection, document arrangement and database query; then, utilizing an equipment domain ontology and constraints as preposed soft and hard constraints, driving LLM to generate semantic intermediate representation, and obtaining candidate triples through structured compiling; then, a self-repairing closed loop is formed through semantic unit testing, logic consistency detection and evidence binding verification, and triples which violate constraints and have conflicts or illusions are automatically recognized and repaired; and finally, entity standard identification, cross-document duplicate removal combination and conflict resolution are realized through cross-segment unification and incremental alignment. According to the method, the fragile path that the LLM directly generates the triple and blindly stores the triple is avoided, the illusion and inconsistency problems are effectively inhibited, and the correctness, interpretability and maintainability of the equipment knowledge graph are remarkably improved.

The invention discloses a method and device for automatically generating a Java method unit test case based on AI, and the method comprises the steps: building a structured annotation specification, carrying out the automatic traversal and intelligent analysis of a Java project, extracting a method signature, a parameter type and a parameter constraint condition, constructing a test data generation model, and carrying out the automatic generation of the test case. The model is transmitted to an AI service to analyze business logic and boundary conditions, test case codes are generated, test cases are optimized and integrated to a project test directory, finally, code areas with insufficient coverage are identified through coverage rate analysis, a test completion strategy is generated, and iterative perfection of the test cases is completed. The technical problems that in the prior art, project-level automatic test case generation cannot be achieved, the generated test case cannot fully cover business logic and boundary conditions, and context relation understanding is lacked are solved, full-automatic project-level test generation is achieved, and the test efficiency and quality are improved.

An assert statement generator employs a neural transformer model with attention to generate candidate assert statements for a unit test method that tests a focal method. The neural transformer model is pre-trained with source code programs and natural language text and fine-tuned with test-assert triplets. A test-assert triplet includes a source code snippet that includes: (1) a unit test method with an assert placeholder; (2) the focal method; and (3) a corresponding assert statement. In this manner, the neural transformer model is trained to learn the semantics and statistical properties of a natural language, the syntax of a programming language, and the relationships between the code elements of the programming language and the syntax of an assert statement.

The invention discloses a method for realizing a redundant function memory chip test, which relates to the technical field of memory chip test, and comprises the following steps: calculating hyperedge coupling strength based on a hypergraph fault model, and generating a test vector sequence and a memory unit test instruction by adopting a weighted flipping mode according to the hyperedge coupling strength; injecting the test vector sequence into a tested memory chip, executing memory unit test instructions one by one, and capturing a failure unit coordinate and a failure mode category at the same time; constructing a Hall triad based on the failure unit coordinates and the failure mode category, executing theorem proving on the Hall triad by using a theorem proving device to verify the test completeness, generating an increment test vector when the verification fails, executing theorem proving again, and recording the result of the test completeness; according to the method, the hypergraph fault model is established, so that the coverage rate of non-independent faults is increased, the number of redundant test instructions is reduced, the test time and resource consumption are reduced, and the defect detection efficiency is improved.

The invention relates to the technical field of artificial intelligence, can be applied to the medical field and the financial field, and discloses a software unit testing method and device, computer equipment and a storage medium. The method comprises the steps that an original version and an updated version of a production code are received, and the code difference between the original version and the updated version is analyzed based on a large language model; identifying an affected target element; calling a code analysis tool to obtain a context definition corresponding to the target element; constructing a structured prompt in combination with the code difference and the context definition, and generating an initial version of the updated unit test based on the structured prompt; and performing a verification correction loop test on the initial version of the unit test until a preset termination condition is met or the maximum number of iterations is reached, and outputting a corresponding test result. The method can solve the problems that the context is not fully acquired, only can be repaired but cannot be enhanced, the accuracy is low due to lack of verification and correction of a closed loop, task processing is not specialized due to single architecture, and the like.

The embodiment of the invention relates to a test code generation method, device and equipment and a readable storage medium, test codes are iteratively generated through an LLM model, coverage rate improvement is automatically verified, a compilation failure rollback mechanism and environment adaptation are combined, automatic closed-loop control of test code generation and coverage rate improvement is achieved, and the test code generation efficiency is improved. And the manual writing and debugging cost is effectively reduced. And the generated test code is subjected to multiple rounds of compilation verification, so that the grammar correctness and the execution feasibility are ensured. The generation direction is continuously optimized through a dynamic feedback mechanism, and the coverage range of unit testing on target codes is systematically improved. And finally, automatically terminating the process when a preset quality index is reached, and outputting an effective test code set which is fully verified.

The invention relates to a code generation method and device, electronic equipment and a storage medium. Comprising the steps of obtaining a programming problem data set and a code generated by a target model, and obtaining a data set with rewards; based on an MSE regression training strategy and a comparison loss training strategy, training a reward model by using the data set with the reward to obtain a code reward model; and obtaining programming problem training data, sorting the programming problem training data by using the code reward model to obtain sorted training data, and obtaining a final reward according to the sorted training data, a reward model score output by the code reward model and a preset unit test score, and reinforcement learning training is carried out on a preset language model to obtain a code generation model, so that codes meeting preset performance requirements are generated through the code generation model. Therefore, the problems that in the prior art, the model reasoning cost is high, and it is difficult to capture the intermediate state and partial correctness in the code execution process to evaluate the code quality in a fine-grained mode are solved.

In a first use case, a description of source code to be created is validated and used to form a prompt for a large language model (LLM). The prompt is provided to the LLM to generate an output. The output from the LLM is post-processed to generate the source code. In a second use case, a source code file is processed and provided, along with instructions, to an LLM. The LLM provides a list of the methods in the source code file. The LLM is requested to provide a unit test for each of the listed methods. The output from the LLM is post-processed to generate unit tests for the methods in the identified source code file. In a third use case, the LLM is used to generate unit tests for new methods added to the source code file after unit tests were generated.

The invention relates to the technical field of board card testing, in particular to a board card automatic testing system and method and a storage medium, and the system comprises an upper computer which comprises a processor, a memory, a human-computer interaction interface and a communication interface; the tool body comprises a test bottom plate, a board card clamp and a pneumatic execution unit which are arranged in the tool case, and the test bottom plate is connected with the power supply module and is provided with an instruction analysis and drive circuit; the instruction analysis and drive circuit is connected with a communication interface of the upper computer and is in control connection with the pneumatic execution unit; the pneumatic execution unit is provided with a needle bed, and the needle bed is provided with a test needle. The board card control unit comprises a communication interface circuit which is electrically connected with the microcontroller and is connected with a communication interface of the upper computer; the detection end of the function detection sensor is electrically connected with the test needle; the signal processing module is electrically connected with the function detection sensor; and the microcontroller is electrically connected with the function detection sensor and the signal processing module. According to the invention, efficient, accurate and full-automatic board card testing can be realized.

One or more unit-test cases are generated from a monolingual code corpus and the generated unit-test cases are filtered to generate a corpus of unit-test cases which have acceptability scores exceeding one or more predefined thresholds. One or more of the code samples of the monolingual code corpus are translated from a source language to a target language using a pretrained Large Language Model and the generated unit-test cases are translated from the source language to the target language. The LLM-translated code samples are validated using the translated unit-test cases and a parallel-data training corpus comprising the LLM-translated code samples that pass the validation is created. The pretrained large language model (LLM) is fine-tuned using the parallel-data training corpus, a given code segment is translated using the fine-tuned large language model (LLM), the translated given code segment is tested and the tested given code segment is deployed.

The invention relates to an OCamml unit test system, which adopts a layered architecture design and comprises a test driving layer, a test case regulation layer and a test suite function layer. The test driving layer automatically manages compiling, execution and result archiving of OCAML test codes through Makefile scripts; the test case regulation layer defines and organizes test cases based on a standardized template, and each test case annotates and declarates information such as a unique identifier and an airworthiness demand number through structured metadata; the test suite function layer comprises an assertion module, a report generation module, a data conversion module and a test auxiliary module. Through the layered architecture design, standardized management and automatic execution of the test process are realized, the standardization and traceability of the test activity are ensured, a complete demand-test-verification traceability evidence chain is provided for airworthiness certification, and the strict requirement of the high-security field for unit test is met.

The invention relates to the technical field of ball elasticity detection, in particular to a basketball elasticity testing device and method.The basketball elasticity testing device comprises a testing rack, a testing frame, a feeding mechanism, a circulating mechanism and a control unit, the testing frame is arranged on the testing rack, a testing inlet is formed in the top of the testing frame, and an elasticity detection unit is arranged on the wall face of the testing frame; a first outlet is formed in the left side of the bottom of the testing frame, a second outlet is formed in the front side of the bottom of the testing frame, a sorting unit is further arranged on the second outlet, the feeding mechanism is arranged on the right side of the testing frame and comprises a conveying unit and a clamping unit, and the circulating mechanism is arranged on the first outlet and comprises a sliding way, a containing frame, a label recognizer, a stirring unit and a moving unit. The testing frame, the feeding mechanism and the circulating mechanism are all in circuit connection with the control unit. According to the invention, the same basketball can be circularly detected for multiple times, so that the elasticity data of different positions of the basketball are obtained, and the elasticity uniformity of the basketball is effectively judged.

A test case generation method. The method comprises: acquiring a structured rule for a first application programming interface (API) and a natural language description for the first API; querying a domain-specific language (DSL) database on the basis of the natural language description for the first API to obtain a query result, wherein the query result comprises at least one of: a DSL sample where a natural language description part matches the natural language description for the first API, a DSL error correction example, or a DSL syntax; constructing a prompt on the basis of the query result, the natural language description and the structured rule; and inputting the prompt into a language model to generate a target DSL code, wherein the target DSL code is used for testing the first API, or is used for generating a test case for performing integration testing on the first API and a second API. In the method, a DSL sample, an error correction example, and a syntax are dynamically matched from a DSL database to generate a highly controllable and structured context, and a test case is generated by means of language model inference on the basis of the context, thereby integrating unit testing and integration testing, and reducing repeated development.

A neural transcompilation model is tested with a set of syntax unit tests to determine the syntax elements of a source code program written in a source programming language that fail to translate properly into a target programming language. The syntax elements having a translation defect is identified and ranked according a translation failure rate. The neural transcompilation model is then fine-tuned with training samples of the syntax elements having the highest translation failure rates and their paired correct translation in order to teach the model to learn the association between the syntax elements of a source programming language causing translation defects and its correct translation in a target programming language.

The invention discloses a software testing method and device, a medium and a product, and relates to the technical field of software test.The software testing method includes the steps that coverage rate data of unit testing, integration testing and system testing of target software are collected through a code coverage rate analysis tool, and the coverage rate data are converted into target text files; the coverage rate data comprises execution times and coverage rates of the codes; storing each target text file in a corresponding target directory, and reading and analyzing the target text file in each target directory to obtain corresponding analyzed data; the analyzed data comprises a total row number, a total branch number, a total function number, a total coverage row number, a total coverage branch number and a total coverage function number; and merging and storing the analyzed data into a preset nested dictionary, traversing the preset nested dictionary to determine the code coverage rate of the target software based on the traversed analyzed data, and determining the software defect of the target software by using the code coverage rate. The quality and stability of software can be improved through testing.

An object of a system according to an embodiment is to quickly determine a result of an AB test and generate an optimal content variation.SOLUTION: A system according to an embodiment includes a user reaction prediction unit, a user behavior analysis unit, an AB test determination unit, and a content generation unit. The user reaction prediction unit predicts a user's reaction and engagement. The user behavior analysis unit analyzes the behavior of the user predicted by the user reaction prediction unit in real time. The AB test determination unit immediately determines an AB test result based on the data analyzed by the user behavior analysis unit. The content generation unit automatically generates a variation of the content on the basis of the result determined by the AB test determination unit.SELECTED DRAWING: Figure 1

Systems and methods for translating a first encoded language to a second encoded language train a machine learning (ML) model on a first encoded language specific data set associated with the first encoded language, where the ML model is trained to translate one or more code sets of the first encoded language to respective one or more code sets of the second encoded language; generating various unit test cases by using the ML model, where the unit test cases run the one or more code sets of the second encoded language in parallel with the one or more code sets of the first encoded language; iteratively testing and refining the ML model until a maturity threshold value is reached; and upon reaching the maturity threshold, containerizing the one or more code sets of the second encoding language into the one or more applications.

The application discloses a thyristor control unit test system and method, and belongs to the field of power system testing. The method comprises the following steps: deciding test execution parameters of a debugging instrument based on acquired parameter information of a thyristor control unit; generating analog quantity input for thyristor control unit test through a program-controlled source based on the test execution parameters of the debugging instrument; and performing thyristor control unit test through the debugging instrument and a power load plug-in based on the analog quantity input; wherein the thyristor control unit test comprises forward normal trigger characteristic test and on-state protection and reverse recovery characteristic test; and when the thyristor control unit test is performed, test data of the thyristor control unit collected by the debugging instrument is used to generate a thyristor control unit test result. The application can realize automatic test of the thyristor control unit, and the test is efficient and convenient, and can be applied to in-plant single-plug production batch test.

The invention discloses a flight control test system, and relates to the field of unmanned aerial vehicles. The flight control test system comprises a test main control unit, a simulation test module, an interface test module, a power supply adaptation module and a data recording and analyzing unit, and the test main control unit coordinates the modules to work cooperatively, outputs a standardized test instruction, automatically collects tested flight control response data and completes analysis and report generation. According to the flight control test system, all the modules are coordinated to work cooperatively through the test main control unit, a full-process automatic test framework is constructed, multi-dimensional tests of starting performance, attitude calculation precision, interface functions and the like can be completed without manual intervention, and the problems that a traditional test is low in efficiency and poor in repeatability are thoroughly solved.

The invention relates to a pattern result matching storage method and a chip testing machine, an upper computer issues a pattern file, an operation mode configuration parameter and a storage mode configuration parameter to a testing unit in a testing board card, the testing unit extracts a matching microinstruction and an expected pattern in the pattern file, the expected pattern is called according to the matching microinstruction, and the pattern file is stored in the testing unit. And obtaining a pin matching result obtained by matching the output signal of the to-be-tested device. And the test unit performs matching completion processing according to the operation mode configuration parameters and the pin matching result, and generates corresponding matching result data according to the storage mode configuration parameters for storage. The operation mode configuration parameters and the storage mode configuration parameters can be configured according to actual needs, so that corresponding pattern result matching and matching result data storage operation are performed, result data query is facilitated, and test convenience is improved.

This invention provides a continuous integration testing system and method for application software, relating to the field of software testing technology. A control terminal constructs test tasks based on the code to be tested and a pre-configured test process, sends them to a test host, and the test host initiates the code to be tested and executes the test tasks through an integration testing module. The integration testing module integrates distributed testing units, which execute corresponding test tasks and output test results. The distributed testing units include page character testing units, page layout testing units, media performance testing units, navigation function testing units, refresh update testing units, and traffic / power testing units. A test result feedback module receives test results from the distributed testing units and feeds them back to the test host. This invention solves the problem that current testing systems can only test individual projects one by one, which is inconvenient for continuous integration testing and results in low testing efficiency, thus improving software testing efficiency.

A system for generating a unit test based on source code is disclosed having a computer, a source code file, an abstract syntax tree, and at least one unit test. The source code file contains a source code having a plurality of constructs each belonging to a type including functions, return statements, attribute assignments, function calls, and branches. An abstract syntax tree is generated by a computer based on a source code and a plurality of constructions, the abstract syntax tree having a plurality of nodes, where each of the plurality of constructions in the source code has a corresponding node. At least one unit test is generated by a computer based on nodes of the abstract syntax tree and predefined rules, the unit test comprising at least one packet function corresponding to a function configuration or a branch configuration, and the unit test comprising at least one trial function corresponding to a return statement configuration, an attribute assignment configuration, or a function call configuration.

The present disclosure provides a method and device for generating unit test code, electronic equipment and storage medium, relating to the technical field of computer, especially to the technical field of data processing, artificial intelligence and the like. The specific implementation scheme is as follows: obtaining target function code in inventory code; extracting function information and statement information from the target function code; generating unit test code corresponding to the target function code based on the function information and the statement information; and performing function test on the target function code based on the unit test code.

The invention relates to a BMS control unit test system and method. Comprising the steps that a first direct-current power supply outputs a first output parameter to a BMS control unit to be tested according to a first test instruction; the second direct-current power supply outputs a second output parameter to the BMS control unit to be tested according to the second test instruction; the control assembly sends a first test instruction to the first direct-current power supply, sends a second test instruction to the second direct-current power supply, and recovers a first output parameter of the first direct-current power supply and a second output parameter of the second direct-current power supply; the BMS control unit to be tested outputs a first test result based on the first output parameter and a second test result based on the second output parameter, and obtains a preliminary test result according to the first output parameter, the second output parameter, the first test result and the second test result. Therefore, the problems of tedious operation, low efficiency, low integration level and the like of a test system in related technologies are solved, the operation process is simplified, and the test convenience is improved.

The utility model relates to the field of circuit board function testing, in particular to a circuit board testing device, which comprises a power supply unit, a testing unit and a user interaction unit. And the tested circuit board is fixedly arranged on the test unit. The test unit is electrically connected to both the test unit and the user interaction unit. The power supply unit is electrically connected to the tested circuit board through a first channel and is connected to the test unit and the user interaction unit through a second channel. And the first channel and the second channel are electrically isolated. The circuit board testing device provided by the utility model is convenient and simple in testing operation, improves the working efficiency of testing the circuit board, and increases the reliability of a testing result. Meanwhile, the display interface content of the user interaction unit of the circuit board testing device is clear, the operation process is simple and convenient, and the testing function with high calibration rate and high precision can be realized. Finally, the circuit board testing device can feed back the testing state in real time, and the real-time working state of the tested circuit board can be judged conveniently.

A deep learning model is trained to learn generation of higher quality unit test cases for a method under test by using reinforcement learning of reward scores for static code quality attributes that account for optimal coding criteria. The static code quality attribute includes an assertion in the predicted unit test case, a call of a method under test in the predicted unit test case, and a descriptive name of the predicted unit test case. A reward model is trained to calculate a reward score for the unit test case predicted by the model based on the static code quality attributes. The reward score is used in an approximate policy optimization method to generate a policy loss that updates the parameters of the deep learning model to generate higher quality unit test cases.

This application relates to a method, apparatus, computer device, and storage medium for single-unit testing of UFS storage devices based on the MT6891 platform. The method includes: developing an interface for sending commands to UFS in the Linux source code UFS module; developing the UFS device on the platform and generating device node files based on the Linux character device driver development method; developing command interface functions and library functions supported by subsequent single-unit testing based on the UFS3.1 Jedec protocol; compiling the developed code into an image file and burning the image file to the MT6891 platform; starting the MT6891 platform and using ADB tools to execute the developed UFS commands to verify correctness. This invention improves the underlying framework of UFS single-unit testing, enhances the completeness of UFS3.1 product feature testing, ensures the accuracy and robustness of UFS product single-unit testing, and further enhances the competitiveness of UFS storage products.

A data processing system defines a unit test for a dataflow graph comprising a plurality of executable components. The system receives an indication of a portion of a dataflow graph for testing. The system receives a parameter set indicating expected output data to be generated by execution of a component of the graph. The system receives input data for the component. The input data are indicated by the parameter set and configured to test a functionality of the component. The system defines a unit test of the component based on the parameter set. The unit test provides the input data to inputs of the dataflow graph, causes processing of the input data by the component of the dataflow graph to generate output data, and generates results data indicating a correspondence between the output data and the expected output data indicated by the parameter.

The application discloses a method and system for constructing a parameter of an unsigned type pointer, and belongs to the technical field of software testing, and comprises the following steps: collecting function call information and pointer allocation information through pre-compiled stage code insertion; analyzing and determining memory structure information corresponding to an unsigned type pointer parameter based on the collected information; and constructing the unsigned type pointer parameter in unit testing according to the memory structure information. The application solves the problem that the length and structure of a memory pointed to by a void unsigned pointer cannot be accurately determined in automatic unit testing, avoids test false positives caused by unmatched pointer structures, and improves the accuracy and reliability of unit testing.