The present invention is a computationally-efficient compensator for removing 
nonlinear distortion. The compensator operates in a digital post-compensation configuration for 
linearization of devices or systems such as analog-to-digital 
converters and RF 
receiver electronics. The compensator also operates in a digital pre-compensation configuration for 
linearization of devices or systems such as digital-to-analog 
converters, RF power amplifiers, and RF 
transmitter electronics. The compensator effectively removes 
nonlinear distortion in these systems in a computationally efficient hardware or 
software implementation by using one or more factored multi-rate Volterra filters. Volterra filters are efficiently factored into parallel FIR filters and only the filters with energy above a prescribed threshold are actually implemented, which significantly reduces the complexity while still providing accurate results. For extremely 
wideband applications, the multi-rate Volterra filters are implemented in a demultiplexed polyphase configuration which performs the filtering in parallel at a significantly reduced 
data rate. The compensator is calibrated with an 
algorithm that iteratively subtracts an 
error signal to converge to an effective compensation 
signal. The 
algorithm is repeated for a multiplicity of calibration signals, and the results are used with 
harmonic probing to accurately estimate the Volterra filter kernels. The compensator improves 
linearization processing performance while significantly reducing the computational complexity compared to a traditional nonlinear compensator.