214 results about "Test status" patented technology

A chip tester, comprising: a support frame movable in the vertical direction and a movable plate movable in the horizontal direction. An upper test base is mounted on the support frame; a lower test base capable of moving to a position directly below the upper test base along with the movable plate is mounted on the movable plate; a recess is formed in a lower surface of the upper test base and / or an upper surface of the lower test base; when the chip tester is in a test state, the lower surface of the upper test base is tightly attached to the upper surface of the lower test base to form at the recess region a sealing cavity used for accommodating a chip to be tested; and a PCB and a partition plate are sequentially stacked above the upper test base. Flat attachment is ensured while realizing standard conversion after the upper test base and the lower test seat are subjected to mold closing, thereby improving the consistency of test data, and improving the safety of the chip in a high-current and high-voltage test state.

Automated test case validation execution is presented herein. A system obtains image data representing a test result of a test step of a validation process; extracts the test result from the image data; derives an expected result from an expected result sentence that has been obtained from a first cell of a row of a table of a document, in which the row corresponds to the test step; based on the test result and the expected result, determines a test status of the test step; generates a result sentence comprising the test result and a portion of the expected result sentence; generates a javascript object notation (JSON) data structure comprising the result sentence and the test status; and populates, using the JSON data structure, a second cell of the row with the result sentence and a third cell of the row with the test status.

The invention relates to a vacuum test device and method for leakproofness detection of a patrol bomb launch canister. The leakproofness qualification of the launch canister is judged by putting the launch canister into a vacuum test cavity, vacuumizing and observing the pressure drop of a vacuum gauge. The device is formed by sequentially connecting an exhaust valve, a vacuum test cavity (including a vacuum meter), a control valve, a pneumatic pipeline, a pneumatic flow regulating valve, a switching valve, a vacuum buffer tank (including a stop valve) and a vacuum pump according to the air exhaust direction. During vacuumizing, the vacuum pump is started to vacuumize the vacuum buffer tank, after a certain vacuum degree is achieved, the buffer tank serves as a vacuum generator to vacuumize the vacuum test cavity, the air exhaust rate is adjusted and set through the pneumatic flow adjusting valve, and opening and closing control over an air channel is achieved through the control valve. The vacuum buffer tank serves as a vacuum generator, frequent starting and stopping of a vacuum pump are avoided, and the service life of equipment is prolonged; the test requirements of multiple products can be met through one-time evacuation, and the test efficiency is improved; the air exhaust rate is stable and adjustable, and the consistency of product test states is ensured.

The invention relates to a train wake-up test method and an implementation system, and the method comprises the steps: enabling DWUs at the head end and the tail end to achieve the power-on of a train through a double-end alternate wake-up mechanism according to a preset sequence after the DWUs at the head end and the tail end receive a wake-up command from an ATS and the state of the train meets a remote wake-up condition in a dormant state of the train; after the train is awakened and powered on, the vehicle-mounted controllers VOBCs at the head end and the tail end execute self-inspection, and the self-inspection state of the train is obtained through the TCMS; entering a static test stage after the self-inspection is passed, sequentially activating the vehicle-mounted controllers VOBCs at the head end and the tail end to be upgraded to a master system, enabling the vehicle-mounted controller VOBCs at the opposite end of the master system to be a slave system, and performing static test on the vehicle-mounted controller VOBCs of the master system; and when the VOBCs at the head end and the tail end serve as main systems to complete the static test and the test is passed, it is confirmed that awakening succeeds. Compared with the prior art, the reliability of the main-standby switching mechanism and the effectiveness of the whole redundancy architecture can be fully verified at the initial stage of starting of the vehicle-mounted operation control system.

The invention relates to the field of storage device testing, and discloses a storage device power consumption testing method, device and system and a storage medium. The method comprises the following steps: generating a test command based on constructed test scene elements; sending a test command to the eMMC equipment to be tested through the serial port, and obtaining a power consumption parameter of the eMMC equipment in a corresponding test state; each test scene element corresponds to one test command; and performing power consumption analysis on the eMMC equipment according to the power consumption parameters. According to the method, the test command is generated by constructing different test scene elements, and then the performance power consumption of the storage device in the corresponding test scene is tested based on the test command; moreover, the power consumption test requirements in different test states can be met, and the power consumption test flexibility is improved.

The invention discloses a power line carrier communication chip test system and test method, and belongs to the technical field of electronics. The test system comprises a test platform configured to provide a test instruction used for indicating a test item; the accompanying test module comprises a processing unit and a first interface unit, a second interface unit and a third interface unit which are connected with the processing unit, the first interface unit is connected with the test platform, and the second interface unit and the third interface unit are connected with the chip to be tested; the third interface unit comprises a wireless test interface unit and / or a power line carrier test interface unit; wherein the processing unit is configured to receive a test instruction or feed back a test result through the first interface unit, control the to-be-tested chip to enter a target test state corresponding to the test item through the second interface unit according to the test instruction, and perform a data communication test through the third interface unit to obtain the test result. The configuration requirement for the test platform is reduced, the cost is reduced, and implementation is easy.

The invention relates to the technical field of controller testing, and provides a testing method and device based on a multi-module load box. The method comprises the steps of determining a target test condition based on a target test instruction; determining a corresponding target load module, a test load state and a target test state corresponding to each target load module and a corresponding input excitation signal in all the load modules based on the target test working condition; setting the real-time load state of each target load module as a corresponding test load state; a corresponding input excitation signal is sent to the target load module so as to act on the to-be-tested equipment and enable the to-be-tested equipment to generate an excitation response result; acquiring a real-time response signal returned by the target load module based on the excitation response result; and performing test condition analysis according to all the input excitation signals and all the real-time response signals to obtain a test result of the to-be-tested equipment corresponding to the target test condition. According to the invention, the performance test of the to-be-tested equipment can be efficiently and comprehensively realized.

A memory built-in self-test (BIST) controller, corresponding to a partition BIST controller, is configured to control memory testing in one or more corresponding static random access memories (RAMs) and has a first corresponding register configured to store a failure indicator for each of the one or more corresponding RAMs and a second corresponding register configured to store an uncorrectable failure indicator for each of the one or more corresponding RAMs. The partition BIST controller is configured to generate, based on the first and second registers of the MBIST controller, a first in-field test status indicator which indicates whether a failure occurred during memory testing of any RAM corresponding to the partition BIST controller and a second in-field test status indicator which indicates whether an uncorrectable failure occurred during the memory testing of any RAM corresponding to the partition BIST controller.

The invention discloses a mainboard function automatic detection method and device, and relates to the technical field of computer hardware detection. The method comprises: receiving a user instruction through a graphical interface to generate a test queue; distributing an independent thread for each test item to execute hardware detection, and dynamically mapping the position of a physical port; analyzing a test state in real time and updating interface feedback; comparing the actual hardware parameters with preset parameters; and hot update of the test script is supported. The device comprises a graphical interface module, a multi-thread execution engine, a scripted hardware detection module and the like. The mainboard function detection device can perform efficient, automatic and visual detection on the mainboard function, and is suitable for quality control of mainboard production, maintenance and research and development links.

The invention relates to an automatic test method and device for network card performance, a storage medium and electronic equipment, and relates to the technical field of automatic test.The method comprises the steps that a to-be-tested network card obtains a PXE bootstrap file from a PXE server based on the IP address of the PXE server, and executes the PXE bootstrap file to obtain a PXE bootstrap program so as to transfer the control right to the PXE bootstrap program; the PXE bootstrap program downloads the PXE configuration file; the PXE bootstrap program executes the operating system kernel file to obtain an operating kernel execution program, and transfers the control right to the operating kernel execution program to obtain test state information of the network card to be tested; and operating the kernel execution program to call an initialization script in the initialization memory file, and executing the initialization script to update test state identification information in a test state file in the PXE server according to the test state information, so that the PXE server determines the test state of the to-be-tested network card according to the updated test state identification information. The test efficiency is improved.

The invention provides an aircraft full-process collaborative design and assembly test system and method, which support rapid realization of collaborative design and assembly test control and analysis of an aircraft in each stage of a full life cycle, and establish an efficient and normative full-process collaborative design and assembly test system and method. Information integration of the whole life cycle is achieved through an information technology means, multi-user collaborative design and dynamic assembly test records of cross-specialty, cross-information-system and cross-regional systems in the development process are achieved, the development efficiency is improved, and design and assembly test state carding according to model requirements is supported. The method supports the selection of comparison data columns according to needs, obtains a more targeted result, and promotes the standardization and collaboration of the test process, improves the data reuse capability, enhances the interaction friendliness, and improves the efficiency through the classified display, the mastering of the data change trend, and the comprehensive and effective control of the assembly test data of each stage. Real-time operation and later-period management are based, and records are reserved according to the basis.

The invention provides a test method, a test device, electronic equipment, a readable storage medium and a chip, the test method is used for at least one unmanned ship, and the test method comprises the following steps: obtaining test environment parameters and a simulation scene corresponding to the test environment parameters, and collecting motion data of the at least one unmanned ship in the simulation scene through a sensor; determining at least one piece of annotation information associated with the motion data, storing the corresponding annotation information and the motion data in a database in a preset format, obtaining a training algorithm model, determining test state information based on the training algorithm model and the corresponding annotation information and the motion data, and according to the test state information, the test environment parameters and the motion data, obtaining a test result. Evaluation parameters corresponding to the at least one unmanned ship are determined.

The invention relates to the technical field of chip function testing, and particularly discloses a multi-site testing method for TOF sensor chip function testing, which comprises the following steps: completing hardware self-inspection and software loading; the host receives a'ready 'signal fed back by the sorting machine / probe station through GPIB communication, and confirms that each slave and the corresponding peripheral are in a'to-be-tested' state through TCP communication or Pipe interaction; the host issues an independent test instruction to each slave; after each slave receives the instruction, the corresponding test resource board card is controlled to provide a test condition for the chip to be tested, and the chip output data is collected at the same time; after completing the single-station test, each slave uploads a test result to the host; the host captures the test data from the corresponding network disk and counts the yield; and the host sends the final result of the multi-station test to the sorting machine / probe station through the communication driver and automatically grabs the next batch of chips to be tested. According to the method, the overall test time is greatly shortened through the multi-site parallel test.

The invention belongs to the field of cross-application function automatic testing in mobile applications, and relates to a large model driven cross-application function testing method and system based on memory implantation. The method comprises the following steps: constructing a cross-application function knowledge base for storing and organizing complete information of historical cross-App tasks; searching a historical path most similar to the current test task from the cross-application function knowledge base, reconstructing the historical path into a dialogue memory format conforming to the natural interaction habit of the large language model, and implanting the large language model; and dynamically generating a test path matched with task semantics by utilizing a large language model according to an implanted dialogue memory format, and realizing test state monitoring and feedback correction in the whole process in combination with a local state sensing mechanism. According to the method, a cross-application function knowledge base is constructed, and a global + local memory implantation mechanism is designed, so that the model has a long-term memory ability and a real-time state sensing ability, and therefore, the model can stably run in a complex scene, and a test task can be efficiently completed.

The invention relates to a low-pin-number chip test circuit, test method and equipment, the low-pin-number chip test circuit is characterized in that a control module is connected with a test module, input and output pins are connected with a function module and an enable module, and the enable module is connected with the control module and the test module; wherein when the enabling module gates the test mode, the control module generates a one-hot code according to a first test requirement so as to gate the test module based on the one-hot code; the input / output pin generates a first test signal according to the first test requirement, and the test module generates a test result in response to the first test signal; or, when the enabling module gates the function mode, the input and output pins generate a second test signal according to a second test requirement, the function module triggers the function test state in response to the second test signal and generates a test result, and the problem that the number of the input and output pins cannot meet the chip test requirement is solved.

The embodiment of the invention relates to a check code simulation system used in a test environment. The system comprises a check code sending simulation interface, a check code verification simulation interface, a check code query simulation interface, a simulation control module and a check code cache queue, the simulation control module is respectively connected with the check code sending simulation interface, the check code verification simulation interface, the check code query simulation interface and the check code cache queue; the check code sending simulation interface and the check code verification simulation interface are also connected with a registration / login server outside the system; and the check code query simulation interface is also connected with a test end outside the system. According to the invention, the problem of insufficient user serial number resources in a conventional test state can be solved.

The invention provides a plastic pipe service life test method and device, and the method comprises the steps: filling a low-level water tank and a circulation test pipeline communicated with the low-level water tank with a test solution, injecting the test solution into a high-level water tank communicated with the low-level water tank, and enabling the interior of the high-level water tank to have a preset test solution initial volume; wherein the high-level water tank is higher than the low-level water tank by a preset height, and a gas phase space is formed at the top of the high-level water tank; charging compressed gas into the gas-phase space to enable the gas-phase space of the high-level water tank to have preset pressure so as to apply back pressure to the test solution in the low-level water tank; under the back pressure condition, heating the test solution in the low-level water tank to a target test temperature; the backpressure condition and the target test temperature are maintained, and the service life of the plastic pipe sample in the circulation test pipeline is tested. Through the integrated structure and process design, the system is in a stable high-temperature and high-pressure test state, the energy utilization efficiency is improved, the operation cost is reduced, and the test efficiency is improved.

The invention discloses a software and hardware adaptive test method and system for a PLC system, and relates to the PLC and programmable control technology, and the method comprises the steps: analyzing a tested PLC system configuration and test sequence description file, and generating a configuration parameter sequence of the tested PLC system; determining predicted result data of each test item, and generating a test data set; traversing each minimum executable dynamic test unit in the dynamic test unit set, generating a test program according to the test data set, setting a tested point in the test program, and recording a variable set; determining an execution sequence of the minimum executable dynamic test unit; generating a minimum executable dynamic test unit scheduling strategy; all minimum executable dynamic test units are loaded, and initialization of a dynamic test state machine is completed; and according to the execution sequence, executing the minimum executable dynamic test units one by one in sequence. The test efficiency, flexibility and adaptability can be improved, and the flexibility and portability of the test system are greatly improved.

The invention discloses a test method and device, electronic equipment and a vehicle, and relates to the technical field of data processing. The method comprises the steps of obtaining a test configuration file; analyzing the test configuration file to obtain structural data corresponding to the configuration information; performing registration by using the use case information, and adjusting the test environment and the target object to a test state based on the registered use case information and use rule information; based on the registered business case and the test environment, triggering to test the target object, and obtaining an actual value fed back by the target object based on the trigger signal; and comparing the actual value with a preset expected value, and determining a test result of the target object. Compared with the prior art, a tester only needs to adjust the environment and the target test object by using the test configuration file to determine the test result, so that the problems that the requirement for the tester is relatively high, and relatively high labor cost is needed are solved.

The embodiment of the invention relates to the technical field of data processing, and discloses an automatic distribution method and system for test data, and the method comprises the steps: determining a data source needing to be collected according to a test demand; collecting test data from the data source; according to test requirements and test scenes, test types are determined, corresponding data distribution strategies are selected according to the test types, the test data are automatically distributed to different test cases, and the test types comprise function tests, performance tests and other tests; executing the test case, monitoring the test progress and the test state in real time, and obtaining a test result; and adjusting the data distribution strategy according to the test result. Therefore, the test data is dynamically and automatically distributed in real time, and the technical effect of improving the test efficiency and the test accuracy is achieved.

To provide an autonomous testing device for generating an object description described in a time-phase logic expression, and autonomously performing a test using the generated object description related to autonomous performance when a test object is changed in model checking.SOLUTION: An autonomous testing device 100 for executing model testing is provided with a test execution determining unit 90 and a time-phase logic expression generating unit 50. The test execution determining unit 90 determines whether or not to execute a test for a test target by using a test execution status for a target function and product update information that is information indicating the version of the target function. The time-phase logic expression generating unit 50 generates the object description of a time-phase logic expression by using multiplicity information indicating the multiplicity of each stereotype corresponding to each product included in the test object, metamodel information indicating the relationship between each operand name and each stereotype, and pattern information indicating the relationship between a template of the time-phase logic expression and a description rule of the object of the time-phase logic expression.SELECTED DRAWING: Figure 1

The application discloses a sample additional testing method, an additional system, a scheduling system and an analysis system. The method comprises the following steps: selecting a sample to be tested in an additional project and confirming the sample as an additional sample; judging a position state and a testing state of the additional sample; judging and obtaining a scheduling result according to the testing state and the position state of the additional sample; scheduling a sample rack where the additional sample is located to a corresponding track sample suction position according to the scheduling result; and testing the additional sample in the additional project. The application can effectively complete the operation of the additional project test according to different position states and testing states of the additional sample, and the user does not need to worry about invalid additional test caused by improper additional time, so that the user operation is more convenient.

The invention provides chip testing equipment and a testing method, and relates to the technical field of chip testing. At least one tested chip is placed on a first test platform deck, and the first test platform deck is set to be controlled to move in the front-back direction of the chip test equipment. The second test platform deck is arranged on the side, away from the first test platform deck, of the test machine, at least one tested chip is placed on the second test platform deck, and the second test platform deck is arranged to move in the front-back direction in a controlled mode. The first test platform deck and the second test platform deck are arranged to alternately move into the test machine, so that the test machine alternately performs functional test on the tested chips on the first test platform deck and the second test platform deck. According to the technical scheme, the first test platform deck and the second test platform deck alternately enter the test machine, so that the loading waiting time is shortened, the test machine alternately tests the tested chips on the first test platform deck and the second test platform deck and is always in a test state, and the test efficiency of the chips is improved.

The embodiment of the invention provides a chip test system and method and electronic equipment, and the system can comprise a test state judgment circuit which is connected with a plurality of cores and is used for obtaining test results outputted by the plurality of cores based on test data; based on a preset arrangement sequence of the plurality of kernels, comparing the test results of the two adjacent kernels to obtain a plurality of comparison results; the plurality of comparison results are used for determining abnormal conditions of the plurality of kernels; the abnormal condition can be judged by using the comparison results, the abnormal range can be quickly narrowed and the abnormal kernel can be positioned by combining the distribution of all the comparison results, and the whole process is completed by an internal circuit closed loop, is efficient and does not occupy extra port resources, so that the diagnosis efficiency is improved.

The invention belongs to the technical field of impeller detection, and provides an air floating type clamping tool and impeller dynamic balance testing device.The air floating type clamping tool comprises an outer fixing sleeve, a first air inlet connecting hole, a second air inlet connecting hole and a third air inlet connecting hole are formed in the outer fixing sleeve, and an inner mounting cylinder is fixedly mounted in the outer fixing sleeve; a wheel shaft sleeve is mounted in the inner mounting cylinder through an end cover and a locking pressing ring; an outer end face groove is formed in the side, away from the wheel shaft sleeve, of the end cover. The first air inlet connecting hole communicates with the outer end face groove through a first airflow channel. In a test state, the wheel shaft sleeve and the middle part of the wheel shaft of the impeller are encircled to form a middle cavity, and the second air inlet connecting hole is communicated with the middle cavity through a second airflow channel; a plurality of blowing holes are formed in the inner walls of the top and the bottom of the wheel shaft sleeve. The third air inlet connecting hole communicates with the blowing holes through a third airflow channel. According to the invention, the dynamic balance test precision of the impeller is higher, secondary damage possibly caused to the impeller in the test process is avoided, and the test efficiency of the impeller is greatly improved.

The invention discloses a chip testing machine which comprises a supporting frame capable of moving in the vertical direction and a movable plate capable of moving in the horizontal direction, an upper testing seat is installed on the supporting frame, and a lower testing seat capable of moving to the position under the upper testing seat along with the movable plate is installed on the movable plate. A groove is formed in the lower surface of the upper testing seat and / or the upper surface of the lower testing seat, and when the chip testing machine is in a testing state, the lower surface of the upper testing seat is tightly attached to the upper surface of the lower testing seat, and a sealing cavity used for placing a chip to be tested is formed in the groove area; and a PCB and a partition plate are sequentially stacked above the upper test seat. According to the invention, while reference conversion after die assembly of the upper and lower test bases is realized, smooth lamination is ensured, the consistency of test data is improved, and the safety of a chip in a high-current and high-voltage test state is also improved.

The invention relates to a four-point bending test method which comprises the following test steps: I, preparing a spare part, namely manufacturing a test sample piece which must be made of the same material as a composite material part on an airplane; iI, state inspection before testing: (1) vibration requirements, (2) electromagnetic requirements, (3) temperature and humidity requirements, and (4) setting of an upper clamp and a lower clamp of a testing machine; iII, loading a test sample; iV, testing the test sample piece, and driving the upper clamp to move downwards for loading, namely (1) preloading setting, (2) sample piece measurement and (3) loading setting in sequence; and V, comparing test results, and correcting the load and the deformation in consideration of the deviation between the actual size and the nominal size. The four-point bending test method has different test standards for aircraft shell parts of different types and specifications, data is corrected based on tested data set deviation, the data precision is improved, and then safe flight of an aircraft is guaranteed.

Insert (40) for a test contactor (1) for testing an electrically conductive test element (10), - wherein the insert (40) comprises several contact elements (8) which are designed to electrically contact the electrically conductive test element (10) in the test state of the test contactor (1), - wherein the insert (40) comprises a plurality of openings (67), wherein the openings (66) are arranged on an upper side of the insert (40) facing the test element (10) in the test state, - wherein in the test state at least one pin (68) is arranged in at least one opening (67) of the plurality of openings (67) such that the insert has a coding for a test element (10) corresponding to the coding.

The application discloses a passenger car four-channel chassis component durability test device and relates to the field of durability tests, which comprises a test frame main body, a tractor one installed at the bottom of the test frame main body, a tractor two installed at the left side of the test frame main body, a tractor three installed at the right side of the test frame main body and a control module installed on the front of the test frame main body, wherein the tractor one, the tractor two and the tractor three are used for fixing the tested components and conducting horizontal, vertical and torsional fatigue tests; a prediction model is constructed, the test state of a future period is predicted and obtained based on the test data of the current test project, the mapping relationship between the initial period damage state of the test component and the future period fission and deformation state is analyzed, and then the long-term test performance of the tested object can be quickly obtained through short-term actual tests.

The application discloses a memory test method and a test system. The memory test method is used for controlling the test state and test flow of each to-be-tested memory through at least two layers of loop control and read-write sequence operation. The at least two layers of loop control include: algorithm loop, each algorithm loop controls the execution of all algorithm steps of one to-be-tested memory, and the test flow of the corresponding to-be-tested memory is ended after the execution of all algorithm steps; address loop, the test address is traversed in the execution process of each algorithm step, each traversed address is executed the read-write sequence operation, and the address loop is ended after the traversal of the test address is completed. The application realizes algorithm atomization, so that the MBIST memory built-in self-test architecture can realize a more flexible test process.