731 results about "Single test" patented technology

Devices for dispensing test strips and methods of using the same are provided. The subject devices are characterized by having a housing made of a cover and a base configured to retain a plurality of test strips. In certain embodiments, the height of the base is less than the height of each of the test strips, such that a portion of each of the test strips extends beyond the distal or top edge of the base. The subject devices may further be characterized as having a substantially air and moisture tight seal. In using the subject devices, a plurality of test strips stored in a subject device are provided. A single test strip is removed from the subject device by moving the test strip distal to the remaining test strips. Also provided by the subject invention are kits for use in practicing the subject methods.

The present invention is directed to a single test system and method for determining the integrated glycemic condition of a subject by measuring the concentration of glucose and the level of protein-bound glucose in a subject's body fluid, such as whole blood. The glucose concentration is indicative of the subject's immediate glycemic condition, whereas the protein-bound glucose concentration is indicative of either intermediate or long-term glycemic condition. Optionally, other analytes indicative of glycemic condition, such as ketone bodies or fatty acid derivatives, can also be measured. The present invention also provides a method of diagnosing diabetes. The invention additionally provides a method for analyzing the concentration of fructosamine in less than or equal to five minutes without the use of a reaction accelerator.

The present invention provides a method and device for conducting a rapid in vitro enzyme immunoassay test for the direct and qualitative detection of two or more viral antigens from specimens of symptomatic patients. The method for immunoassay of viral antigens is performed on a membrane. Non-immunological capture of viral antigens takes place by absorption onto the membrane. Captured antigen binds to a detection reagent that includes a label conjugated to a specific antibody. The test is a differentiated test such that two or more viral antigens may be distinguished from each other in a single test. The invention also includes a kit for performing an assay in accordance with the method of the present invention, wherein the kit comprises the device of the present invention.

Devices for dispensing test strips and methods of using the same are provided. The subject devices are characterized by having a housing made of a cover and a base configured to retain a plurality of test strips. In certain embodiments, the height of the base is less than the height of each of the test strips, such that a portion of each of the test strips extends beyond the distal or top edge of the base. The subject devices may further be characterized as having a substantially air and moisture tight seal. In using the subject devices, a plurality of test strips stored in a subject device are provided. A single test strip is removed from the subject device by moving the test strip distal to the remaining test strips. Also provided by the subject invention are kits for use in practicing the subject methods.

An impedance compensation circuit and method for an input / output buffer provides dynamic impedance compensation by using programmable impedance arrays and a dynamically adjustable on-chip load. Accordingly, among other advantages, only a single off-chip or external calibrated impedance resistor is used and only a single test pad is necessary.

Devices and methods for determining the concentration of an analyte in a physiological sample are provided. The subject devices are meters characterized by having an internal structure that includes a test strip selecting element having a continuously reduced cross-sectional area configured to select a single test strip at a time and means for determining the concentration of an analyte in a physiological sample applied to the selected test strip. In the subject methods for containing at least one test strip and dispensing a single test strip at a time, a meter having at least one test strip contained therein is provided. The meter is positioned with respect to the ground to cause the single test strip to move from a contained position to a dispensed position. The subject invention also includes kits for use in practicing the subject methods.

The invention relates to the use of model checkers to generate efficient test sets for hardware and software systems. The method provides for extending existing tests to reach new coverage targets; searching *to* some or all of the uncovered targets in parallel; searching in parallel *from* some or all of the states reached in previous tests; and slicing the model relative to the current set of coverage targets. The invention provides efficient test case generation and test set formation. Deep regions of the state space can be reached within allotted time and memory. The approach has been applied to use of the model checkers of SRI's SAL system and to model-based designs developed in Stateflow. Stateflow models achieving complete state and transition coverage in a single test case are reported.

A single test access port, such as a JTAG-based debug port may be utilized to perform debug operations on logic cores of a multi-core integrated circuit, such as a multi-core processor. The shared debug port may respond to a particular command to enter a debugging mode and may be configured to forward all commands and data to a debugging controller of the integrated circuit during debugging. A mask register may be used to indicate which logic cores of the multi-core integrated circuit should be debugged. Additionally, custom debugging commands may include mask or core select fields to indicate which logic cores should be affected by the particular command. Debugging mode may be initialized for one or more logic cores either externally, such as be asserted a DBREQ signal, or internally, such as by configuring one or more breakpoints.

An apparatus and method for the indirect determination of concentrations of additives in metal plating electrolyte solutions, particularly organic additives in Cu-metalization baths for semiconductor manufacturing. The apparatus features a reference electrode housed in an electrically isolated chamber and continuously immersed in the base metal plating solution (without the additive to be measured). An additive concentration determination method comprises electroplating a test electrode at a constant or known current in a mixing chamber wherein the base metal plating solution is mixed with small volumes of the sample and various calibration solutions containing the additive to be measured. Plating potentials between the electrodes are measured and plotted for each of the solution mixtures, and data are extrapolated to determine the concentration of the additive in the sample. A multi-cycle method determines the concentration of both accelerator and suppressor organic additives in Cu plating solution in a single test suite.

A computer system and method tests various language installations of an application program using a single test script. The various language translations existing with the application program are used to provide translations of test command strings from one language to the specific language of the application program (operating system locale for executing the program). The test script may then be translated at runtime using the predefined program-established translations to allow the testing program to test the application program in accordance with the language of the application program / operating system locale.

A detection method is based on a statistical analysis of the appearance of model patches from all possible viewpoints in the scene, and incorporates 3D geometry during both matching and pose estimation processes. By analyzing the computed probability distribution of the visibility of each patch from different viewpoints, a reliability measure for each patch is estimated. That reliability measure is useful for developing industrial augmented reality applications. Using the method, the pose of complex objects can be estimated efficiently given a single test image.

Architecture, circuitry, and methods are provided for programming, writing to, or reading from one or more integrated circuits which may be arranged upon a printed circuit board. Programming and read / write operations can, therefore, be done after integrated circuits are populated upon a printed circuit board to control those integrated circuits using a standard JTAG interface, well-known as the IEEE Std. 1149.1 interface. A shift register used to control one or more electronic subcomponents can be programmed, written to, or read from using JTAG programming languages. However, the shift register, or multiple shift registers, used to control electronic subcomponents need not be JTAG compliant. The shift registers may be those found within proprietary circuits, such as analog-to-digital converters or digital-to-analog converters, and include any shift register than receives serial data and produces parallel data, or vice-versa, where the loading and serial shifting of data is controlled using a generic interface, such as enable, reset, capture, etc. One or more shift registers can be distributed among one or more integrated circuits proprietary to the manufacturer of that circuit, and the circuits which embody the shift registers need not have a JTAG interface. Yet, the shift registers can be controlled by a single test access port (TAP) external to the integrated circuits, but which controls the non-JTAG compliant shift registers of each integrated circuit bearing the same. This allows a JTAG programming language which can be readily obtained off-the-shelf to control integrated circuits which do not recognize JTAG control signals, nor do such integrated circuits necessarily have a JTAG four-pin interface.