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276results about How to "Consumes less power" patented technology

Doorbell communication systems and methods

Methods can include using a doorbell to wirelessly communicate with a remotely located computing device. Doorbells can include a speaker, a microphone, a camera, and a button to sound a chime. A doorbell shipping mode can detect whether the doorbell is electrically coupled to an external power source. Methods can include entering a setup mode or a standby mode in response to detecting electricity from the external power source.
Owner:SKYBELL TECH IP LLC

Doorbell communication systems and methods

Methods can include using a doorbell to wirelessly communicate with a remotely located computing device. Doorbells can include a speaker, a microphone, a camera, and a button to sound a chime. Some embodiments include using a doorbell to close an electrical circuit that has a sound output device in a way that precludes the sound output device from inappropriately emitting a notification sound.
Owner:SKYBELL TECH IP LLC

Semiconductor device and manufacturing method thereof

In a method for manufacturing a semiconductor device, a semiconductor film formed over an insulator is doped with an impurity element to a depth less than the thickness of the semiconductor film, thereby forming an impurity doped layer; a metal silicide layer is formed on the impurity doped layer; the metal silicide layer and the semiconductor film are etched to form a recessed portion; and a layer which is not doped with the impurity element and is located at the bottom of the recessed portion of the semiconductor film is thinned to make a channel formation region. Further, a gate electrode is formed in the recessed portion over the thinned non impurity doped layer, with an insulating film interposed therebetween.
Owner:SEMICON ENERGY LAB CO LTD

Method and system for controlling MRAM write current to reduce power consumption

In a method and system for reducing power consumed by a magnetic memory, magnetic memory cells are coupled to a bit line and are associated with a plurality of digit lines. A bit line current is provided in the bit line. Digit currents are provided in parallel in the digit lines at substantially the same time as the bit line current. The digit and bit line currents allow the magnetic memory cells to be written to a plurality of states in parallel.
Owner:WESTERN DIGITAL TECH INC +1

Spatial-based power savings

Described herein are systems and methods that reduce power consumption for an electronics device that includes a display. Power conservation systems and methods described herein alter video information in one or more inactive portions of a display area such that the alteration decreases power consumption. The invention finds use with many electronics devices, such as portable computing devices powered from a battery or other limited source of power. Since video output often dominates power consumption for an electronics device, decreasing display power consumption may extends battery longevity for the portable device.
Owner:SAMSUNG ELECTRONICS CO LTD

Adaptive shading in a graphics processing pipeline

One embodiment of the present invention includes a parallel processing unit (PPU) that performs pixel shading at variable granularities. For effects that vary at a low frequency across a pixel block, a coarse shading unit performs the associated shading operations on a subset of the pixels in the pixel block. By contrast, for effects that vary at a high frequency across the pixel block, fine shading units perform the associated shading operations on each pixel in the pixel block. Because the PPU implements coarse shading units and fine shading units, the PPU may tune the shading rate per-effect based on the frequency of variation across each pixel group. By contrast, conventional PPUs typically compute all effects per-pixel, performing redundant shading operations for low frequency effects. Consequently, to produce similar image quality, the PPU consumes less power and increases the rendering frame rate compared to a conventional PPU.
Owner:NVIDIA CORP

Power Control of Servers Using Advanced Configuration and Power Interface (ACPI) States

A method of managing power consumption by a plurality of blade servers within a processing system. The speed of at least one of the plurality of blade servers is reduced in response to the processing system reaching a power or thermal threshold. At least one of the plurality of blade servers is identified as not being critical to maintain in a working state and the critical blade server is put in a sleep state. A satellite management controller may control blade server power consumption and heat generation in various ways that combine processor speed-stepping and control of processor sleep states. Known sleep states save more power than speed-stepping by turning off the processor and / or volatile memory. The processor speed and sleep-states of at least one non-critical blade server, and optionally the processor speed of a critical processor, may be changed in order to control the power consumption below a power threshold or control the temperature below a thermal threshold.
Owner:IBM CORP

Adaptive shading in a graphics processing pipeline

One embodiment of the present invention includes a parallel processing unit (PPU) that performs pixel shading at variable granularities. For effects that vary at a low frequency across a pixel block, a coarse shading unit performs the associated shading operations on a subset of the pixels in the pixel block. By contrast, for effects that vary at a high frequency across the pixel block, fine shading units perform the associated shading operations on each pixel in the pixel block. Because the PPU implements coarse shading units and fine shading units, the PPU may tune the shading rate per-effect based on the frequency of variation across each pixel group. By contrast, conventional PPUs typically compute all effects per-pixel, performing redundant shading operations for low frequency effects. Consequently, to produce similar image quality, the PPU consumes less power and increases the rendering frame rate compared to a conventional PPU.
Owner:NVIDIA CORP

Doorbell communication systems and methods

Methods can include using a doorbell to wirelessly communicate with a remotely located computing device. Doorbells can include a speaker, a microphone, a camera, and a button to sound a chime. Some embodiments include using a doorbell to close an electrical circuit that has a sound output device in a way that precludes the sound output device from inappropriately emitting a notification sound.
Owner:SKYBELL TECH IP LLC

Semiconductor device

In a multi-core semiconductor device, a data bus between CPUs or the like consumes a larger amount of power. By provision of a plurality of CPUs which transmit data by a backscattering method of a wireless signal, a router circuit which mediates data transmission and reception between the CPUs or the like, and a thread control circuit which has a thread scheduling function, a semiconductor device which consumes less power and has high arithmetic performance can be provided at low cost.
Owner:SEMICON ENERGY LAB CO LTD

Image display device, image display method, and television receiver

An image display device controls a screen luminance to an appropriate value in response to switching of a display mode, thereby displaying each of television broadcast program images and graphic user interface images (including an electronic program guide, and a variety of setting menus) in an easy-to-see and power-saving manner. The image display device switches between a mode of displaying the television image and a mode of displaying the graphic user interface image. In response to the mode switching instruction, the device controls variably luminance intensity of a backlight source, thereby providing a screen luminance appropriate for each mode.
Owner:SHARP KK

Image display method and apparatus

There is provided a correlation between adjustment of luminance of a LCD and adjustment of luminance of a backlight. Luminance average value “Iave” is determined from display data. Luminance maximum value “I1max” in a macro area is determined from the display data. Luminance is adjusted with reference to luminance-transformed luminance. In luminance transformation, slope average “r1” in a range of 0≦I<Iave, slope average “r2” in a range of Iave≦I<I1max, and slope average “r3” in a range of I≧I1max establish a relationship of r1≧r2>r3 in an area defined by a horizontal axis showing luminance “I” and a vertical axis showing luminance-transformed luminance “I#”.
Owner:PANASONIC CORP

Continuous-time decision feedback equalizer

A continuous-time domain Decision Feedback Equalizer (DFE) for use in a serial communication channel comprises in one embodiment a summer, a decision circuit, a capture flip-flop (FF) and an N-th order active filter. The DFE and its active filter operate in continuous time to give improved performance over a discrete-time DFE. In one embodiment involving a first-order active filter, the capture FF is outside the continuous-time negative feedback loop of the DFE and involves a differential signal amplifier. In another embodiment, the capture flip-flop is inside the DFE loop, and in a third embodiment the decision circuit comprises a comparator.
Owner:AVAGO TECH INT SALES PTE LTD

Structures and methods for proximity communication using bridge chips

One embodiment of the present invention provides a system that facilitates proximity communication using a bridge chip. This system includes a base chip with an active face, upon which active circuitry and signal pads reside, and a back face opposite the active face. The bridge chip is mounted to the base chip using a mounting, interconnection, and communication structure. The bridge chip is positioned so that a free end is proximate to a neighboring chip, thereby supporting proximity communication between the base chip and the neighboring chip.
Owner:SUN MICROSYSTEMS INC

Resonant tree driven clock distribution grid

An integrated circuit (IC), IC assembly and circuit for distributing a clock signal in an integrated circuit includes a capacitive clock distribution circuit having at least one conductor therein. At least one inductor is formed in a metal layer of the integrated circuit and is coupled to the clock distribution circuit. The inductor, generally in the form of a number of spiral inductors distributed throughout the integrated circuit, provides an inductance value selected to resonate with the capacitive clock distribution circuit at resonance, power dissipation is reduced while skew and jitter performance can be improved.
Owner:IBM CORP

Processing involving multiple sensors

In a particular embodiment, an apparatus includes a first sensor that has an active mode and a dormant mode. When operating in the active mode, the first sensor has a first power consumption level. The apparatus further includes a second sensor that has a second power consumption level that is less than the first power consumption level (i.e., the power consumption level of the first sensor). The second sensor is deactivated when the first sensor is operating in the active mode. The apparatus includes logic to activate the second sensor when the first sensor transitions from the active mode to the dormant mode.
Owner:QUALCOMM INC

Implantable pulse generators and methods for selective nerve stimulation

An Implantable Pulse Generator (IPG) includes a surgically implantable housing, a battery, a first waveform generator, a second waveform generator, a modulator, and electrodes. The IPG produces a pulse envelope, a carrier waveform, and a modulated waveform. The pulse envelope is a low frequency waveform with specific pulse width, amplitude and shape to selectively stimulate a target nerve or body part. The carrier waveform is a high frequency waveform with properties such as amplitude, frequency and the like chosen so as to overcome tissue impedance and the stimulation threshold of the target nerve. The modulated waveform is the waveform obtained by modulating the carrier waveform by the pulse envelope.
Owner:ETHICON INC

Resonant clock distribution for very large scale integrated circuits

A circuit for distributing a clock signal in an integrated circuit includes a capacitive clock distribution circuit having at least conductor therein. At least one inductor is formed in a metal layer of the integrated circuit and is coupled to the clock distribution circuit. The inductor, generally in the form of a number of spiral inductors distributed throughout the integrated circuit, provides an inductance value selected to resonate with the capacitive clock distribution circuit. By operating the clock distribution circuit at resonance, power dissipation is reduced while skew and jitter performance can be improved.
Owner:THE TRUSTEES OF COLUMBIA UNIV IN THE CITY OF NEW YORK

Delay locked loop device

A delay locked loop device includes a first delay line for receiving an external clock signal and a first delay control signal to generate a first internal clock signal; a second delay line for receiving the external clock signal and a second delay control signal or the first delay control signal to generate a second internal clock signal; a first delay control block for receiving the external clock signal to generate the first delay control signal; a second delay control block for receiving the external clock signal to generate the second delay control signal; and a phase detecting block for receiving the first internal clock signal and the second internal clock signal to generate the on-off signal by comparing a phase of the first internal clock signal with a phase of the second internal clock signal.
Owner:SK HYNIX INC

Light emitting device having organic light emitting material with mixed layer

A light emitting device is provided which has a structure for lowering energy barriers at interfaces between layers of a laminate organic compound layer. A mixed layer (105) composed of a material that constitutes an organic compound layer (1) (102) and a material that constitutes an organic compound layer (2) (103) is formed at the interface between the organic compound layer (1) (102) and the organic compound layer (2) (103). The energy barrier formed between the organic compound layer (1) (102) and the organic compound layer (2) (103) thus can be lowered.
Owner:SEMICON ENERGY LAB CO LTD

Robust transmission system and method for mobile television applications

A data transmission system and method for DVB-H signals for enhancing data robustness of a DVB-H receiver in additive white Gaussian noise (AWGN) channels includes transmitting IP datagrams from a DVB-H transmitter to the DVB-H receiver; applying a MPE section and a FEC section to the transmitted IP datagrams; mapping the transmitted IP datagrams to TS packets; aligning boundaries of the transmitted IP datagrams to a given number of TS packets; fixing a size of the IP datagrams to a known value at the DVB-H receiver; and extracting the IP datagrams from the DVB-H receiver.
Owner:ATMEL CORP

Dynamic, low if, image interference avoidance receiver

A dynamic low IF image interference avoidance receiver shifts the local oscillator frequency to avoid image interference and shifts the center frequency of the band pass filter to track the frequency shift of the local oscillator or uses two local oscillators, a first to shift frequency and separate the desired frequency and image interference frequency and the second to track the first and maintain the output IF at a fixed frequency
Owner:LOJACK OPERATING COMPANY

Gas turbine engine electromechanical variable inlet guide vane actuation system

An electromechanical inlet guide vane actuation system includes one or more electric motor driven actuators that are used to appropriately position the inlet guide vanes in a gas turbine engine. The actuation system includes a control circuit that supplies guide vane actuation control signals in response to guide vane position command signals it receives. The guide vane actuation control signals are supplied to one or more electric motors, which position actuators, and thus the inlet guide vanes, to the commanded position.
Owner:HONEYWELL INT INC

Application processor, mobile device having the same, and method of selecting a clock signal for an application processor

An application processor includes a main central processing device that operates based on an external main clock signal received from at least one external clock source when the application processor is in an active mode, at least one internal clock source that generates an internal clock signal, and a sensor sub-system that processes sensing-data received from at least one sensor module on a predetermined cycle when the application processor is in the active mode or a sleep mode, and that operates based on the internal clock signal or an external sub clock signal received from the external clock source depending on an operating speed required for processing the sensing-data.
Owner:SAMSUNG ELECTRONICS CO LTD

Method For Optimized Automatic Clock Gating

A method of optimizing clock-gated circuitry in an integrated circuit (IC) design is provided. A plurality of signals which feed into enable inputs of a plurality of clock gates is determined, where the clock gates gate a plurality of sequential elements in the IC design. Combinational logic which is shared among the plurality of signals is identified. The clock-gated circuitry is transformed into multiple levels of clock-gating circuitry based on the shared combinational logic.
Owner:SYNOPSYS INC

Display device

A display device capable of allowing a page to be turned to give a feeling as if a page is actually turned includes a memory for storing information, a display for displaying information, a page turn instruction unit for detecting that the unit itself is tilted to output a detection signal indicating the direction of the tilt, and a display control unit for receiving an instruction from the page turn instruction unit to read information of the next or previous page from the memory according to the direction of the tilt and display the read information on the display.
Owner:SHARP KK

Resonant clock distribution for very large scale integrated circuits

A circuit for distributing a clock signal in an integrated circuit includes a capacitive clock distribution circuit. At least one additional inductor is formed in a metal layer of the integrated circuit and is coupled to the clock distribution circuit. The inductor, which may distributed throughout the integrated circuit, has an inductance value selected to resonate with impedance of the capacitive clock distribution circuit. By operating the clock distribution circuit at resonance, power dissipation is reduced while skew and jitter performance can be improved.
Owner:THE TRUSTEES OF COLUMBIA UNIV IN THE CITY OF NEW YORK
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